From e463600fdfb3a8b7e056758a1300528bcc52541c Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Fri, 27 Jun 2025 14:13:45 +0800 Subject: [PATCH 1/4] Fix the typo bfloat16 -> zvfhmin/zvfh --- rvv-intrinsic-generator/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/rvv-intrinsic-generator/Makefile b/rvv-intrinsic-generator/Makefile index a18115211..58ee00d21 100644 --- a/rvv-intrinsic-generator/Makefile +++ b/rvv-intrinsic-generator/Makefile @@ -555,12 +555,12 @@ git-commit-autogen-doc: git-commit-autogen-zvfhmin-doc: make gen-zvfhmin-document OUTPUT_DIR=${OUTPUT_DIR} git add ${ZVFHMIN_DIR}/* - git commit -m "[Auto-gen] Update bfloat16 documents under ${OUTPUT_DIR}. (make git-commit-autogen-zvfhmin-doc)" + git commit -m "[Auto-gen] Update zvfhmin documents under ${OUTPUT_DIR}. (make git-commit-autogen-zvfhmin-doc)" git-commit-autogen-zvfh-doc: make gen-zvfh-document OUTPUT_DIR=${OUTPUT_DIR} git add ${ZVFH_DIR}/* - git commit -m "[Auto-gen] Update bfloat16 documents under ${OUTPUT_DIR}. (make git-commit-autogen-zvfh-doc)" + git commit -m "[Auto-gen] Update zvfh documents under ${OUTPUT_DIR}. (make git-commit-autogen-zvfh-doc)" git-commit-autogen-bf16-doc: make gen-bf16-document OUTPUT_DIR=${OUTPUT_DIR} @@ -581,12 +581,12 @@ git-commit-autogen-test: git-commit-autogen-zvfhmin-test: make gen-zvfhmin-test git add ${ZVFHMIN_DIR}/* - git commit -m "[Auto-gen] Update bfloat16 tests under ${OUTPUT_DIR}. (make git-commit-autogen-zvfhmin-test)" + git commit -m "[Auto-gen] Update zvfhmin tests under ${OUTPUT_DIR}. (make git-commit-autogen-zvfhmin-test)" git-commit-autogen-zvfh-test: make gen-zvfh-test git add ${ZVFH_DIR}/* - git commit -m "[Auto-gen] Update bfloat16 tests under ${OUTPUT_DIR}. (make git-commit-autogen-zvfh-test)" + git commit -m "[Auto-gen] Update zvfh tests under ${OUTPUT_DIR}. (make git-commit-autogen-zvfh-test)" git-commit-autogen-bf16-test: make gen-bf16-test From 233760524d105bbd6dbb55379c91914dfd7dd881 Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Fri, 27 Jun 2025 11:17:20 +0800 Subject: [PATCH 2/4] Remove _rod intrinsic from zvfhmin zvfhmin doesn't have `_rod` instructions. --- .../rvv_intrinsic_gen/templates/cvt_op_template.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/cvt_op_template.py b/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/cvt_op_template.py index 49700244b..5b7baf9b6 100644 --- a/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/cvt_op_template.py +++ b/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/cvt_op_template.py @@ -165,8 +165,8 @@ def render(G, op_list, type_list, sew_list, lmul_list, decorator_list): if decorator.flags & ExtraAttr.HAS_FRM: continue - # BFloat16 converts do not have `_rod`/`_rtz` instructions - if type_list == "bfloat16": + # Float16 and BFloat16 converts do not have `_rod`/`_rtz` instructions + if type_list == "float16_zvfhmin" or type_list == "bfloat16": continue if args["TYPES1"] != args["TYPES3"] and args["TYPES3"] == "f": From b8af1b07b508b28e0e03f8b255b7c27566d3aea2 Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Fri, 27 Jun 2025 14:16:15 +0800 Subject: [PATCH 3/4] [Auto-gen] Update zvfhmin documents under ../auto-generated. (make git-commit-autogen-zvfhmin-doc) --- auto-generated/zvfhmin/intrinsic_funcs.adoc | 15 ------- .../04_vector_float16_intrinsics.adoc | 15 ------- .../zvfhmin/overloaded_intrinsic_funcs.adoc | 10 ----- .../04_vector_float16_intrinsics.adoc | 10 ----- .../zvfhmin/policy_funcs/intrinsic_funcs.adoc | 45 ------------------- .../04_vector_float16_intrinsics.adoc | 45 ------------------- .../overloaded_intrinsic_funcs.adoc | 40 ----------------- .../04_vector_float16_intrinsics.adoc | 40 ----------------- 8 files changed, 220 deletions(-) diff --git a/auto-generated/zvfhmin/intrinsic_funcs.adoc b/auto-generated/zvfhmin/intrinsic_funcs.adoc index f9d875087..a36d47d78 100644 --- a/auto-generated/zvfhmin/intrinsic_funcs.adoc +++ b/auto-generated/zvfhmin/intrinsic_funcs.adoc @@ -1771,36 +1771,21 @@ vfloat32m8_t __riscv_vfwcvt_f_f_v_f32m8_m(vbool4_t vm, vfloat16m4_t vs2, [,c] ---- vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl); vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_rm(vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_rm(vfloat32m1_t vs2, unsigned int frm, diff --git a/auto-generated/zvfhmin/intrinsic_funcs/04_vector_float16_intrinsics.adoc b/auto-generated/zvfhmin/intrinsic_funcs/04_vector_float16_intrinsics.adoc index 4aabb6d2a..cab78321a 100644 --- a/auto-generated/zvfhmin/intrinsic_funcs/04_vector_float16_intrinsics.adoc +++ b/auto-generated/zvfhmin/intrinsic_funcs/04_vector_float16_intrinsics.adoc @@ -31,36 +31,21 @@ vfloat32m8_t __riscv_vfwcvt_f_f_v_f32m8_m(vbool4_t vm, vfloat16m4_t vs2, [,c] ---- vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl); vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_rm(vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_rm(vfloat32m1_t vs2, unsigned int frm, diff --git a/auto-generated/zvfhmin/overloaded_intrinsic_funcs.adoc b/auto-generated/zvfhmin/overloaded_intrinsic_funcs.adoc index 8bb53ffe9..5f9142270 100644 --- a/auto-generated/zvfhmin/overloaded_intrinsic_funcs.adoc +++ b/auto-generated/zvfhmin/overloaded_intrinsic_funcs.adoc @@ -1266,26 +1266,16 @@ vfloat32m8_t __riscv_vfwcvt_f(vbool4_t vm, vfloat16m4_t vs2, size_t vl); [,c] ---- vfloat16mf4_t __riscv_vfncvt_f(vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f(vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f(vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f(vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f(vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f(vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f(vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f(vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vbool32_t vm, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f(vbool32_t vm, vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vbool16_t vm, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f(vbool16_t vm, vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f(vbool8_t vm, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f(vbool8_t vm, vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f(vbool4_t vm, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f(vbool4_t vm, vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f(vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vfloat32m1_t vs2, unsigned int frm, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vfloat32m2_t vs2, unsigned int frm, size_t vl); diff --git a/auto-generated/zvfhmin/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc b/auto-generated/zvfhmin/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc index b58233a4c..6738a1749 100644 --- a/auto-generated/zvfhmin/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc +++ b/auto-generated/zvfhmin/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc @@ -26,26 +26,16 @@ vfloat32m8_t __riscv_vfwcvt_f(vbool4_t vm, vfloat16m4_t vs2, size_t vl); [,c] ---- vfloat16mf4_t __riscv_vfncvt_f(vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f(vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f(vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f(vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f(vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f(vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f(vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f(vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f(vbool64_t vm, vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vbool32_t vm, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f(vbool32_t vm, vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vbool16_t vm, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f(vbool16_t vm, vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f(vbool8_t vm, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f(vbool8_t vm, vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f(vbool4_t vm, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f(vbool4_t vm, vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f(vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f(vfloat32m1_t vs2, unsigned int frm, size_t vl); vfloat16m1_t __riscv_vfncvt_f(vfloat32m2_t vs2, unsigned int frm, size_t vl); diff --git a/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs.adoc b/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs.adoc index c4e15b235..faf32f191 100644 --- a/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs.adoc +++ b/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs.adoc @@ -2447,92 +2447,47 @@ vfloat32m8_t __riscv_vfwcvt_f_f_v_f32m8_mu(vbool4_t vm, vfloat32m8_t vd, ---- vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, - vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, - vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, - vfloat16mf4_t vd, - vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, - vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_rm_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, unsigned int frm, size_t vl); diff --git a/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs/04_vector_float16_intrinsics.adoc b/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs/04_vector_float16_intrinsics.adoc index 0237740ef..fa4ca5e3b 100644 --- a/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs/04_vector_float16_intrinsics.adoc +++ b/auto-generated/zvfhmin/policy_funcs/intrinsic_funcs/04_vector_float16_intrinsics.adoc @@ -61,92 +61,47 @@ vfloat32m8_t __riscv_vfwcvt_f_f_v_f32m8_mu(vbool4_t vm, vfloat32m8_t vd, ---- vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, - vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, - vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, - vfloat16mf4_t vd, - vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, - vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f_f_w_f16mf4_rm_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, unsigned int frm, size_t vl); diff --git a/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs.adoc b/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs.adoc index 664f284ed..d3645f588 100644 --- a/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs.adoc +++ b/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs.adoc @@ -1910,84 +1910,44 @@ vfloat32m8_t __riscv_vfwcvt_f_mu(vbool4_t vm, vfloat32m8_t vd, vfloat16m4_t vs2, ---- vfloat16mf4_t __riscv_vfncvt_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, - size_t vl); vfloat16m1_t __riscv_vfncvt_f_tu(vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl); vfloat16m2_t __riscv_vfncvt_f_tu(vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl); vfloat16m4_t __riscv_vfncvt_f_tu(vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_tum(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tum(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_tum(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_tum(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_tum(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_tumu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tumu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_tumu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_tumu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_tumu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_mu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_mu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_mu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_mu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_mu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, diff --git a/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc b/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc index 40e5b5106..28339fde5 100644 --- a/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc +++ b/auto-generated/zvfhmin/policy_funcs/overloaded_intrinsic_funcs/04_vector_float16_intrinsics.adoc @@ -57,84 +57,44 @@ vfloat32m8_t __riscv_vfwcvt_f_mu(vbool4_t vm, vfloat32m8_t vd, vfloat16m4_t vs2, ---- vfloat16mf4_t __riscv_vfncvt_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, - size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, - size_t vl); vfloat16m1_t __riscv_vfncvt_f_tu(vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl); vfloat16m2_t __riscv_vfncvt_f_tu(vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl); vfloat16m4_t __riscv_vfncvt_f_tu(vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_tum(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tum(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_tum(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_tum(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_tum(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_tumu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tumu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_tumu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_tumu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_tumu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); // masked functions vfloat16mf4_t __riscv_vfncvt_f_mu(vbool64_t vm, vfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl); -vfloat16mf4_t __riscv_vfncvt_rod_f_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_mu(vbool32_t vm, vfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl); -vfloat16mf2_t __riscv_vfncvt_rod_f_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl); vfloat16m1_t __riscv_vfncvt_f_mu(vbool16_t vm, vfloat16m1_t vd, vfloat32m2_t vs2, size_t vl); -vfloat16m1_t __riscv_vfncvt_rod_f_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl); vfloat16m2_t __riscv_vfncvt_f_mu(vbool8_t vm, vfloat16m2_t vd, vfloat32m4_t vs2, size_t vl); -vfloat16m2_t __riscv_vfncvt_rod_f_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl); vfloat16m4_t __riscv_vfncvt_f_mu(vbool4_t vm, vfloat16m4_t vd, vfloat32m8_t vs2, size_t vl); -vfloat16m4_t __riscv_vfncvt_rod_f_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl); vfloat16mf4_t __riscv_vfncvt_f_tu(vfloat16mf4_t vd, vfloat32mf2_t vs2, unsigned int frm, size_t vl); vfloat16mf2_t __riscv_vfncvt_f_tu(vfloat16mf2_t vd, vfloat32m1_t vs2, From cbbc136e6e33b17a1b47cc072427908756ae176b Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Fri, 27 Jun 2025 14:16:32 +0800 Subject: [PATCH 4/4] [Auto-gen] Update zvfhmin tests under ../auto-generated. (make git-commit-autogen-zvfhmin-test) --- .../zvfhmin/api-testing/vfncvt_rod.c | 47 -------- .../zvfhmin/llvm-api-tests/vfncvt_rod.c | 52 --------- .../llvm-overloaded-tests/vfncvt_rod.c | 52 --------- .../overloaded-api-testing/vfncvt_rod.c | 47 -------- .../policy_funcs/api-testing/vfncvt_rod.c | 102 ----------------- .../policy_funcs/llvm-api-tests/vfncvt_rod.c | 107 ------------------ .../llvm-overloaded-tests/vfncvt_rod.c | 107 ------------------ .../overloaded-api-testing/vfncvt_rod.c | 102 ----------------- 8 files changed, 616 deletions(-) delete mode 100644 auto-generated/zvfhmin/api-testing/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/llvm-api-tests/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/llvm-overloaded-tests/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/overloaded-api-testing/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/policy_funcs/api-testing/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/policy_funcs/llvm-api-tests/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/policy_funcs/llvm-overloaded-tests/vfncvt_rod.c delete mode 100644 auto-generated/zvfhmin/policy_funcs/overloaded-api-testing/vfncvt_rod.c diff --git a/auto-generated/zvfhmin/api-testing/vfncvt_rod.c b/auto-generated/zvfhmin/api-testing/vfncvt_rod.c deleted file mode 100644 index 5d5e20492..000000000 --- a/auto-generated/zvfhmin/api-testing/vfncvt_rod.c +++ /dev/null @@ -1,47 +0,0 @@ -#include -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4(vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2(vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1(vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2(vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4(vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_m(vm, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_m(vm, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_m(vm, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_m(vm, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_m(vm, vs2, vl); -} diff --git a/auto-generated/zvfhmin/llvm-api-tests/vfncvt_rod.c b/auto-generated/zvfhmin/llvm-api-tests/vfncvt_rod.c deleted file mode 100644 index 4dd50c7e6..000000000 --- a/auto-generated/zvfhmin/llvm-api-tests/vfncvt_rod.c +++ /dev/null @@ -1,52 +0,0 @@ -// REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \ -// RUN: -target-feature +zvfhmin -disable-O0-optnone \ -// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ -// RUN: FileCheck --check-prefix=CHECK-RV64 %s - -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4(vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2(vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1(vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2(vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4(vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_m(vm, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_m(vm, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_m(vm, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_m(vm, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_m(vm, vs2, vl); -} diff --git a/auto-generated/zvfhmin/llvm-overloaded-tests/vfncvt_rod.c b/auto-generated/zvfhmin/llvm-overloaded-tests/vfncvt_rod.c deleted file mode 100644 index d722dbcc8..000000000 --- a/auto-generated/zvfhmin/llvm-overloaded-tests/vfncvt_rod.c +++ /dev/null @@ -1,52 +0,0 @@ -// REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \ -// RUN: -target-feature +zvfhmin -disable-O0-optnone \ -// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ -// RUN: FileCheck --check-prefix=CHECK-RV64 %s - -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} diff --git a/auto-generated/zvfhmin/overloaded-api-testing/vfncvt_rod.c b/auto-generated/zvfhmin/overloaded-api-testing/vfncvt_rod.c deleted file mode 100644 index 7896e5599..000000000 --- a/auto-generated/zvfhmin/overloaded-api-testing/vfncvt_rod.c +++ /dev/null @@ -1,47 +0,0 @@ -#include -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f(vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t vm, vfloat32mf2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t vm, vfloat32m1_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t vm, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t vm, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t vm, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f(vm, vs2, vl); -} diff --git a/auto-generated/zvfhmin/policy_funcs/api-testing/vfncvt_rod.c b/auto-generated/zvfhmin/policy_funcs/api-testing/vfncvt_rod.c deleted file mode 100644 index 1601afbfc..000000000 --- a/auto-generated/zvfhmin/policy_funcs/api-testing/vfncvt_rod.c +++ /dev/null @@ -1,102 +0,0 @@ -#include -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tu(vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tu(vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tu(vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tu(vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tu(vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tum(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tum(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tum(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tum(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tum(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tumu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tumu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tumu(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_mu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_mu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_mu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_mu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_mu(vm, vd, vs2, vl); -} diff --git a/auto-generated/zvfhmin/policy_funcs/llvm-api-tests/vfncvt_rod.c b/auto-generated/zvfhmin/policy_funcs/llvm-api-tests/vfncvt_rod.c deleted file mode 100644 index f25922c92..000000000 --- a/auto-generated/zvfhmin/policy_funcs/llvm-api-tests/vfncvt_rod.c +++ /dev/null @@ -1,107 +0,0 @@ -// REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \ -// RUN: -target-feature +zvfhmin -disable-O0-optnone \ -// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ -// RUN: FileCheck --check-prefix=CHECK-RV64 %s - -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tu(vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tu(vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tu(vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tu(vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tu(vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tum(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tum(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tum(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tum(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tum(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_tumu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_tumu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_tumu(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf4_mu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16mf2_mu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m1_mu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m2_mu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_f_w_f16m4_mu(vm, vd, vs2, vl); -} diff --git a/auto-generated/zvfhmin/policy_funcs/llvm-overloaded-tests/vfncvt_rod.c b/auto-generated/zvfhmin/policy_funcs/llvm-overloaded-tests/vfncvt_rod.c deleted file mode 100644 index 8febba6d6..000000000 --- a/auto-generated/zvfhmin/policy_funcs/llvm-overloaded-tests/vfncvt_rod.c +++ /dev/null @@ -1,107 +0,0 @@ -// REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \ -// RUN: -target-feature +zvfhmin -disable-O0-optnone \ -// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ -// RUN: FileCheck --check-prefix=CHECK-RV64 %s - -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} diff --git a/auto-generated/zvfhmin/policy_funcs/overloaded-api-testing/vfncvt_rod.c b/auto-generated/zvfhmin/policy_funcs/overloaded-api-testing/vfncvt_rod.c deleted file mode 100644 index ecf252286..000000000 --- a/auto-generated/zvfhmin/policy_funcs/overloaded-api-testing/vfncvt_rod.c +++ /dev/null @@ -1,102 +0,0 @@ -#include -#include - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t vd, vfloat32m2_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t vd, vfloat32m4_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t vd, vfloat32m8_t vs2, - size_t vl) { - return __riscv_vfncvt_rod_f_tu(vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tum(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_tumu(vm, vd, vs2, vl); -} - -vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t vm, vfloat16mf4_t vd, - vfloat32mf2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t vm, vfloat16mf2_t vd, - vfloat32m1_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t vm, vfloat16m1_t vd, - vfloat32m2_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t vm, vfloat16m2_t vd, - vfloat32m4_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -} - -vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t vm, vfloat16m4_t vd, - vfloat32m8_t vs2, size_t vl) { - return __riscv_vfncvt_rod_f_mu(vm, vd, vs2, vl); -}