diff --git a/Cargo.toml b/Cargo.toml index 158fc8f..88b7415 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -10,14 +10,17 @@ license = "ISC" edition = "2018" [dependencies] -gd32vf103-pac = "0.4.0" -riscv = "0.6.0" +riscv = "0.10.1" nb = "0.1.2" void = { version = "1.0.2", default-features = false } cast = { version = "0.2.3", default-features = false } vcell = "0.1.2" embedded-dma = "0.1.2" +[dependencies.gd32vf103-pac] +version = "0.5.0" +features = ["critical-section"] + [dependencies.embedded-hal] version = "0.2.3" features = ["unproven"] diff --git a/bin/gd32vf103xx-hal.a b/bin/gd32vf103xx-hal.a index 092b6bf..77d3c32 100644 Binary files a/bin/gd32vf103xx-hal.a and b/bin/gd32vf103xx-hal.a differ diff --git a/eclic-mode-hack.S b/eclic-mode-hack.S index 3ab85d4..73efeb8 100644 --- a/eclic-mode-hack.S +++ b/eclic-mode-hack.S @@ -22,6 +22,8 @@ #define MSTATUS_MIE 0x00000008 +.option arch, +zicsr + .macro DISABLE_MIE csrc CSR_MSTATUS, MSTATUS_MIE .endm diff --git a/src/eclic.rs b/src/eclic.rs index 071892c..6f73c75 100644 --- a/src/eclic.rs +++ b/src/eclic.rs @@ -1,5 +1,4 @@ -use crate::pac::ECLIC; -use riscv::interrupt::Nr; +use crate::pac::{ECLIC, Interrupt}; const EFFECTIVE_LEVEL_PRIORITY_BITS: u8 = 4; @@ -84,43 +83,43 @@ pub trait EclicExt { fn get_priority_bits() -> u8; /// Setup `interrupt` - fn setup(interrupt: I, tt: TriggerType, level: Level, priority: Priority); + fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority); /// Enables `interrupt` - unsafe fn unmask(interrupt: I); + unsafe fn unmask(interrupt: Interrupt); /// Disables `interrupt` - fn mask(interrupt: I); + fn mask(interrupt: Interrupt); /// Checks if `interrupt` is enabled - fn is_enabled(interrupt: I) -> bool; + fn is_enabled(interrupt: Interrupt) -> bool; /// Forces `interrupt` into pending state - fn pend(interrupt: I); + fn pend(interrupt: Interrupt); /// Clears `interrupt`'s pending state - fn unpend(interrupt: I); + fn unpend(interrupt: Interrupt); /// Checks if `interrupt` is pending - fn is_pending(interrupt: I) -> bool; + fn is_pending(interrupt: Interrupt) -> bool; /// Set `interrupt` trigger type - fn set_trigger_type(interrupt: I, tt: TriggerType); + fn set_trigger_type(interrupt: Interrupt, tt: TriggerType); /// Get `interrupt` trigger type - fn get_trigger_type(interrupt: I) -> Option; + fn get_trigger_type(interrupt: Interrupt) -> Option; // Set `interrupt` level - fn set_level(interrupt: I, level: Level); + fn set_level(interrupt: Interrupt, level: Level); // Get `interrupt` level - fn get_level(interrupt: I) -> Level; + fn get_level(interrupt: Interrupt) -> Level; // Set `interrupt` priority - fn set_priority(interrupt: I, priority: Priority); + fn set_priority(interrupt: Interrupt, priority: Priority); // Get `interrupt` interrupt - fn get_priority(interrupt: I) -> Priority; + fn get_priority(interrupt: Interrupt) -> Priority; } impl EclicExt for ECLIC { @@ -181,7 +180,7 @@ impl EclicExt for ECLIC { EFFECTIVE_LEVEL_PRIORITY_BITS - Self::get_level_bits() } - fn setup(interrupt: I, tt: TriggerType, level: Level, priority: Priority) { + fn setup(interrupt: Interrupt, tt: TriggerType, level: Level, priority: Priority) { Self::mask(interrupt); Self::set_trigger_type(interrupt, tt); Self::set_level(interrupt, level); @@ -190,8 +189,8 @@ impl EclicExt for ECLIC { } #[inline] - unsafe fn unmask(interrupt: I) { - let nr = usize::from(interrupt.nr()); + unsafe fn unmask(interrupt: Interrupt) { + let nr = interrupt as usize; (*Self::ptr()).clicints[nr] .clicintie @@ -199,8 +198,8 @@ impl EclicExt for ECLIC { } #[inline] - fn mask(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn mask(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -210,8 +209,8 @@ impl EclicExt for ECLIC { } #[inline] - fn is_enabled(interrupt: I) -> bool { - let nr = usize::from(interrupt.nr()); + fn is_enabled(interrupt: Interrupt) -> bool { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -223,8 +222,8 @@ impl EclicExt for ECLIC { } #[inline] - fn pend(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn pend(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -234,8 +233,8 @@ impl EclicExt for ECLIC { } #[inline] - fn unpend(interrupt: I) { - let nr = usize::from(interrupt.nr()); + fn unpend(interrupt: Interrupt) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -245,8 +244,8 @@ impl EclicExt for ECLIC { } #[inline] - fn is_pending(interrupt: I) -> bool { - let nr = usize::from(interrupt.nr()); + fn is_pending(interrupt: Interrupt) -> bool { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -258,8 +257,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_trigger_type(interrupt: I, tt: TriggerType) { - let nr = usize::from(interrupt.nr()); + fn set_trigger_type(interrupt: Interrupt, tt: TriggerType) { + let nr = interrupt as usize; unsafe { (*Self::ptr()).clicints[nr] @@ -269,8 +268,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_trigger_type(interrupt: I) -> Option { - let nr = usize::from(interrupt.nr()); + fn get_trigger_type(interrupt: Interrupt) -> Option { + let nr = interrupt as usize; match unsafe { (*Self::ptr()).clicints[nr].clicintattr.read().trig().bits() } { 0 => Some(TriggerType::Level), @@ -281,8 +280,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_level(interrupt: I, level: Level) { - let nr = usize::from(interrupt.nr()); + fn set_level(interrupt: Interrupt, level: Level) { + let nr = interrupt as usize; let mut intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -307,8 +306,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_level(interrupt: I) -> Level { - let nr = usize::from(interrupt.nr()); + fn get_level(interrupt: Interrupt) -> Level { + let nr = interrupt as usize; let intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -325,8 +324,8 @@ impl EclicExt for ECLIC { } #[inline] - fn set_priority(interrupt: I, priority: Priority) { - let nr = usize::from(interrupt.nr()); + fn set_priority(interrupt: Interrupt, priority: Priority) { + let nr = interrupt as usize; let mut intctl = unsafe { (*Self::ptr()).clicints[nr] @@ -354,8 +353,8 @@ impl EclicExt for ECLIC { } #[inline] - fn get_priority(interrupt: I) -> Priority { - let nr = usize::from(interrupt.nr()); + fn get_priority(interrupt: Interrupt) -> Priority { + let nr = interrupt as usize; let intctl = unsafe { (*Self::ptr()).clicints[nr] diff --git a/src/gpio.rs b/src/gpio.rs index 8cced3c..7984d72 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -117,7 +117,7 @@ trait PeripheralAccess { let value = (bits as u32) << offset; let regs = Self::peripheral(); - interrupt::free(|_| { + interrupt::free(|| { if index < 8 { regs.ctl0.modify(|r, w| unsafe { w.bits((r.bits() & mask) | value) diff --git a/src/rcu.rs b/src/rcu.rs index 5aa694e..2203285 100644 --- a/src/rcu.rs +++ b/src/rcu.rs @@ -327,14 +327,14 @@ macro_rules! bus_enable { impl Enable for crate::pac::$PER { #[inline(always)] fn enable(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apben.modify(|_, w| w.$peren().set_bit()); }); } #[inline(always)] fn disable(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apben.modify(|_, w| w.$peren().clear_bit()); }); } @@ -350,7 +350,7 @@ macro_rules! bus { impl Reset for crate::pac::$PER { #[inline(always)] fn reset(rcu: &mut Rcu) { - interrupt::free(|_| { + interrupt::free(|| { rcu.regs.$apbrst.modify(|_, w| w.$perrst().set_bit()); rcu.regs.$apbrst.modify(|_, w| w.$perrst().clear_bit()); });