Fixed example to work with new PLIC structure and linker changes.

Author: steewbsd

.cargo/config

@@ -1,5 +1,5 @@
 [target.riscv32imac-unknown-none-elf]
-runner = "../../Toolchains/sifive/bin/riscv64-unknown-elf-gdb -q -x gdb_init"
+runner = "/home/steew/things/dev/bin/riscv-sifive/bin/riscv64-unknown-elf-gdb -q -x gdb_init"
 rustflags = [
   "-C", "link-arg=-Thifive1-link.x",
 ]

Cargo.toml

@@ -11,9 +11,10 @@ edition = "2018"
 
 [dependencies]
 e310x-hal = {git = "https://github.com/greenlsi/e310x-hal"}
+e310x = {git = "https://github.com/greenlsi/e310x", features = ["v-extern"]}
 embedded-hal = "0.2.5"
 riscv = "0.6.0"
-riscv-rt = "0.10.0"
+riscv-rt = "0.11.0"
 nb = "1.0.0"
 panic-halt = "0.2.0"
 
@@ -23,11 +24,11 @@ board-hifive1-revb = ["e310x-hal/g002"]
 board-redv = ["e310x-hal/g002"]
 board-lofive = []
 board-lofive-r1 = ["e310x-hal/g002"]
-virq = ["e310x-hal/virq"]
+v-extern = ["e310x/v-extern"]
 
 [[example]]
 name = "virq"
-required-features = ["virq"]
+required-features = ["v-extern"]
 
 [package.metadata.docs.rs]
 features = ['board-hifive1-revb']

examples/virq.rs

@@ -14,7 +14,7 @@ This can be applied for all the 52 interrupts declared in e310x/interrupts.rs.
 
 extern crate panic_halt;
 
-use hifive1::{hal::core::plic::Priority, hal::prelude::*, hal::DeviceResources, pin, sprintln};
+use hifive1::{ hal::prelude::*, hal::DeviceResources, pin, sprintln};
 
 use riscv::register::mstatus;
 use riscv_rt::entry;
@@ -65,18 +65,11 @@ fn main() -> ! {
     /* Unsafe block */
     unsafe {
         /* Get raw PLIC pointer */
-        let rplic = &*hifive1::hal::e310x::PLIC::ptr();
-        /* Index 7 is the GPIO0 interrupt source start */
-        let gpio0_block_start = 7;
-        for (i, p) in rplic.priority.iter().enumerate() {
-            /* set priority of our interrupt */
-            if i == gpio0_block_start + (GPIO_N + 1) {
-                p.write(|w| w.bits(0xffffffff));
-            } else {
-                /* Clear all other priorities */
-                p.write(|w| w.bits(0));
-            }
-        }
+        //let rplic = &*hifive1::hal::e310x::PLIC::ptr();
+        hifive1::hal::e310x::PLIC::set_priority(
+            &mut plic,
+            hifive1::hal::e310x::Interrupt::GPIO4,
+            e310x_hal::e310x::Priority::P7);
         let gpio_block = &*hifive1::hal::e310x::GPIO0::ptr();
         /* Enable GPIO fall interrupts */
         gpio_block.fall_ie.write(|w| w.bits(1 << GPIO_N));
@@ -87,8 +80,8 @@ fn main() -> ! {
 
         /* Activate global interrupts (mie bit) */
         mstatus::set_mie();
-        plic.threshold.set(Priority::P1);
-        plic.mext.enable();
+        plic.set_threshold(e310x_hal::e310x::Priority::P1);
+        plic.enable_interrupt(hifive1::hal::e310x::Interrupt::GPIO4);
     }
     loop {}
 }

hifive1-link.x

@@ -1,3 +1,2 @@
 INCLUDE hifive1-memory.x
 INCLUDE link.x
-INCLUDE fe310x-interrupt.x

memory-hifive1-revb.x

@@ -1,4 +1,4 @@
-INCLUDE memory-fe310.x
+INCLUDE device.x
 MEMORY
 {
     FLASH : ORIGIN = 0x20000000, LENGTH = 4M

memory-hifive1.x

@@ -1,4 +1,4 @@
-INCLUDE memory-fe310.x
+INCLUDE device.x
 MEMORY
 {
     FLASH : ORIGIN = 0x20000000, LENGTH = 16M

memory-lofive-r1.x

@@ -1,4 +1,4 @@
-INCLUDE memory-fe310.x
+INCLUDE device.x
 MEMORY
 {
     FLASH : ORIGIN = 0x20000000, LENGTH = 16M