diff --git a/.cargo/config b/.cargo/config index 6fdc233..18d056a 100644 --- a/.cargo/config +++ b/.cargo/config @@ -4,7 +4,7 @@ [target.riscv64gc-unknown-none-elf] #runner = "riscv64-unknown-elf-gdb -x gdb_init" -runner = "../k210-run --flash" +runner = "bash ../k210-run.sh --flash" rustflags = [ "-C", "link-arg=-Tmemory.x", "-C", "link-arg=-Tlink.x", diff --git a/Cargo.toml b/Cargo.toml index 7cfd4b9..9e3efd6 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,11 +1,20 @@ [package] name = "k210-example" -version = "0.1.1" +version = "0.3.0" authors = ["The RISC-V Team "] edition = "2018" [dependencies] panic-halt = "0.2.0" -riscv = "0.6.0" -riscv-rt = "0.8.0" -k210-hal = "0.2.0" +riscv = "0.10" +riscv-rt = "0.11" +k210-pac = {git = "https://github.com/alexistm/k210-pac", branch = "feature/svd_0_28_0", features = ["critical"]} +k210-hal = {path = "../k210-hal"} +# k210-hal = {git = "https://github.com/alexistm/k210-hal", branch = "feature/svd_0_28_0"} +embedded-hal = "0.2" + +[profile.dev] +panic = "abort" + +[profile.release] +panic = "abort" diff --git a/README.md b/README.md index 957509a..5c335e0 100644 --- a/README.md +++ b/README.md @@ -4,6 +4,16 @@ This project is developed and maintained by the [RISC-V team][team]. +## Building + +``` +rustup target add riscv64gc-unknown-none-elf +rustup +nightly target add riscv64gc-unknown-none-elf + +cargo build --examples +cargo +nightly build --examples # for examples with interrupts +``` + ## Getting started Start openocd: diff --git a/build.rs b/build.rs index df72dc4..878bff0 100644 --- a/build.rs +++ b/build.rs @@ -1,13 +1,15 @@ -use std::{env, fs}; -use std::path::PathBuf; use std::io::Write; +use std::path::PathBuf; +use std::{env, fs}; fn main() { // Put the linker script somewhere the linker can find it let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap()); println!("cargo:rustc-link-search={}", out_dir.display()); - fs::File::create(out_dir.join("memory.x")).unwrap() - .write_all(include_bytes!("memory.x")).unwrap(); + fs::File::create(out_dir.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); println!("cargo:rerun-if-changed=memory.x"); } diff --git a/examples/blinky.rs b/examples/blinky.rs index 67b8eb8..4763a5b 100644 --- a/examples/blinky.rs +++ b/examples/blinky.rs @@ -1,28 +1,46 @@ #![no_std] #![no_main] +use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::v2::ToggleableOutputPin; +use k210_hal::{fpioa, gpio::Gpio, pac, prelude::*}; use panic_halt as _; -use k210_hal::{prelude::*, fpioa, pac, gpio::Gpio}; #[riscv_rt::entry] fn main() -> ! { - let p = pac::Peripherals::take().unwrap(); - + let p = unsafe { pac::Peripherals::steal() }; + let mut sysctl = p.SYSCTL.constrain(); let fpioa = p.FPIOA.split(&mut sysctl.apb0); let gpio = p.GPIO.split(&mut sysctl.apb0); + + let io12 = fpioa.io12.into_function(fpioa::GPIO7); + let io13 = fpioa.io13.into_function(fpioa::GPIO5); let io14 = fpioa.io14.into_function(fpioa::GPIO6); + let mut green = Gpio::new(gpio.gpio7, io12).into_push_pull_output(); + let mut red = Gpio::new(gpio.gpio5, io13).into_push_pull_output(); let mut blue = Gpio::new(gpio.gpio6, io14).into_push_pull_output(); - blue.try_set_low().ok(); + red.set_high().unwrap(); + green.set_high().unwrap(); + blue.set_high().unwrap(); let mut last_update = riscv::register::mcycle::read(); + let mut i = 0; loop { let cur = riscv::register::mcycle::read(); if cur - last_update >= 100_000_000 { last_update = cur; - blue.try_toggle().ok(); + red.toggle().unwrap(); + if i % 2 == 0 { + green.toggle().unwrap(); + } + if i % 3 == 0 { + blue.toggle().unwrap(); + } + + i += 1; } } } diff --git a/examples/gpio-console.rs b/examples/gpio-console.rs index f6254e0..57a3532 100644 --- a/examples/gpio-console.rs +++ b/examples/gpio-console.rs @@ -1,17 +1,17 @@ #![no_std] #![no_main] +use k210_hal::{fpioa, gpio::Gpio, pac, prelude::*, stdout::Stdout}; use panic_halt as _; -use k210_hal::{prelude::*, fpioa, pac, gpio::Gpio, stdout::Stdout}; #[riscv_rt::entry] fn main() -> ! { - let p = pac::Peripherals::take().unwrap(); + let p = unsafe { pac::Peripherals::steal() }; let mut sysctl = p.SYSCTL.constrain(); let fpioa = p.FPIOA.split(&mut sysctl.apb0); let gpio = p.GPIO.split(&mut sysctl.apb0); - let gpiohs = p.GPIOHS.split(); + let _gpiohs = p.GPIOHS.split(); // Configure clocks (TODO) let clocks = k210_hal::clock::Clocks::new(); @@ -20,31 +20,30 @@ fn main() -> ! { let _uarths_tx = fpioa.io5.into_function(fpioa::UARTHS_TX); // let boot_button = Gpio::new( - // gpio.gpio2, + // gpio.gpio2, // fpioa.io16.into_function(fpioa::GPIO2) // ).into_pull_up_input(); let io14 = fpioa.io14.into_function(fpioa::GPIO6); - let mut blue = Gpio::new(gpio.gpio6, io14).into_push_pull_output(); + let mut _blue = Gpio::new(gpio.gpio6, io14).into_push_pull_output(); // Configure UART - let serial = p.UARTHS.configure( - 115_200.bps(), - &clocks - ); + let serial = p.UARTHS.configure(115_200.bps(), &clocks); let (mut tx, _rx) = serial.split(); let mut stdout = Stdout(&mut tx); writeln!(stdout, "Hello, Rust!").ok(); - unsafe { &*pac::GPIO::ptr() }.source.write(|w| unsafe { w.bits(0xaa) }); + unsafe { &*pac::GPIO::ptr() } + .source + .write(|w| unsafe { w.bits(0xaa) }); loop { for i in 8..16 { let io = unsafe { &*pac::FPIOA::ptr() }.io[i].read(); - writeln!(stdout, + writeln!(stdout, "[{}] CH {}, DS {:02X}, OE {}, OEI {}, DO {}, DOI {}, PU {}, PD {}, SL {}, IE {}, IEI {}, DII {}, ST {}, PA {}", i, io.ch_sel().bits(), io.ds().bits(), io.oe_en().bit(), io.oe_inv().bit(), - io.do_sel().bit(), io.do_inv().bit(), io.pu().bit(), io.pd().bit(), + io.do_sel().bit(), io.do_inv().bit(), io.pu().bit(), io.pd().bit(), io.sl().bit(), io.ie_en().bit(), io.ie_inv().bit(), io.di_inv().bit(), io.st().bit(), io.pad_di().bit() ).ok(); } @@ -54,9 +53,11 @@ fn main() -> ! { let data_input = unsafe { &*pac::GPIO::ptr() }.data_input.read().bits(); let sync_level = unsafe { &*pac::GPIO::ptr() }.sync_level.read().bits(); let id_code = unsafe { &*pac::GPIO::ptr() }.id_code.read().bits(); - writeln!(stdout, + writeln!( + stdout, "O {:08b}, D {:08b}, S {:08b}, I {:08b}, SY {:08b}, ID 0x{:08X}", data_output, direction, source, data_input, sync_level, id_code - ).ok(); + ) + .ok(); } } diff --git a/examples/gpiohs-interrupt.rs b/examples/gpiohs-interrupt.rs index 4a59a19..338dfe0 100644 --- a/examples/gpiohs-interrupt.rs +++ b/examples/gpiohs-interrupt.rs @@ -1,10 +1,17 @@ #![no_std] #![no_main] -use k210_hal::{prelude::*, pac::{self, Interrupt}, plic::*, fpioa, gpiohs::Edge, stdout::Stdout}; -use panic_halt as _; -use riscv::register::{mie,mstatus,mhartid,mcause}; use core::sync::atomic::{AtomicBool, Ordering}; +use k210_hal::{ + fpioa, + gpiohs::Edge, + pac::{self, Interrupt}, + plic::*, + prelude::*, + stdout::Stdout, +}; +use panic_halt as _; +use riscv::register::{mcause, mhartid, mie, mstatus}; static INTR: AtomicBool = AtomicBool::new(false); @@ -23,7 +30,7 @@ fn my_trap_handler() { let irq = pac::PLIC::claim(hart_id).unwrap(); let prio = pac::PLIC::get_priority(irq); - unsafe { + unsafe { pac::PLIC::set_threshold(hart_id, prio); mie::clear_msoft(); mie::clear_mtimer(); @@ -35,19 +42,25 @@ fn my_trap_handler() { let cause = mcause::read().bits(); - writeln!(stdout, - "[Interrupt] Hart #{}, Cause: {:016X}, Edges: {:?}", - hart_id, cause, gpiohs0.check_edges() - ).ok(); + writeln!( + stdout, + "[Interrupt] Hart #{}, Cause: {:016X}, Edges: {:?}", + hart_id, + cause, + gpiohs0.check_edges() + ) + .ok(); - unsafe { INTR_INFO = Some(IntrInfo { hart_id, cause }); } + unsafe { + INTR_INFO = Some(IntrInfo { hart_id, cause }); + } INTR.store(true, Ordering::SeqCst); gpiohs0.clear_interrupt_pending_bits(); // actual handle process ends - unsafe { + unsafe { mie::set_msoft(); mie::set_mtimer(); pac::PLIC::set_threshold(hart_id, threshold); @@ -56,15 +69,15 @@ fn my_trap_handler() { } static mut SHARED_STDOUT: core::mem::MaybeUninit< - k210_hal::stdout::Stdout> + k210_hal::stdout::Stdout>, > = core::mem::MaybeUninit::uninit(); static mut GPIOHS0: core::mem::MaybeUninit< - k210_hal::gpiohs::Gpiohs0> + k210_hal::gpiohs::Gpiohs0>, > = core::mem::MaybeUninit::uninit(); #[riscv_rt::entry] fn main() -> ! { - let p = pac::Peripherals::take().unwrap(); + let p = unsafe { pac::Peripherals::steal() }; let mut sysctl = p.SYSCTL.constrain(); let fpioa = p.FPIOA.split(&mut sysctl.apb0); @@ -93,11 +106,11 @@ fn main() -> ! { // Set the Machine-External bit in MIE mie::set_mext(); } - + writeln!(stdout, "Enabling interrupt trigger for GPIOHS0").ok(); boot.trigger_on_edge(Edge::RISING | Edge::FALLING); - // enable IRQ for gpiohs0 interrupt + // enable IRQ for gpiohs0 interrupt writeln!(stdout, "Enabling IRQ for GPIOHS0").ok(); unsafe { pac::PLIC::set_priority(Interrupt::GPIOHS0, Priority::P1); @@ -106,9 +119,11 @@ fn main() -> ! { writeln!(stdout, "Configuration finished!").ok(); - loop { + loop { writeln!(stdout, "Waiting for interrupt").ok(); - unsafe { riscv::asm::wfi(); } + unsafe { + riscv::asm::wfi(); + } while !INTR.load(Ordering::SeqCst) { use core::sync::atomic::{self, Ordering}; @@ -116,10 +131,12 @@ fn main() -> ! { } INTR.store(false, Ordering::SeqCst); - writeln!(stdout, - "Interrupt was triggered! hart_id: {}, cause: {:16X}", + writeln!( + stdout, + "Interrupt was triggered! hart_id: {}, cause: {:16X}", unsafe { INTR_INFO }.unwrap().hart_id, unsafe { INTR_INFO }.unwrap().cause, - ).ok(); + ) + .ok(); } } diff --git a/examples/i2s_reading.rs b/examples/i2s_reading.rs new file mode 100644 index 0000000..db0ff71 --- /dev/null +++ b/examples/i2s_reading.rs @@ -0,0 +1,93 @@ +#![no_std] +#![no_main] + +use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::v2::ToggleableOutputPin; +use k210_hal::sysctl; +use k210_hal::time::Hertz; +use k210_hal::{fpioa, gpio::Gpio, i2s, pac, prelude::*}; +use pac::SYSCTL; +use panic_halt as _; + +#[riscv_rt::entry] +fn main() -> ! { + let p = unsafe { pac::Peripherals::steal() }; + + let mut sysctl = p.SYSCTL.constrain(); + let fpioa = p.FPIOA.split(&mut sysctl.apb0); + let gpio = p.GPIO.split(&mut sysctl.apb0); + let io12 = fpioa.io12.into_function(fpioa::GPIO7); + let io11 = fpioa.io11.into_function(fpioa::GPIO5); + let io10 = fpioa.io10.into_function(fpioa::GPIO6); + let mut green = Gpio::new(gpio.gpio7, io12).into_push_pull_output(); + let mut red = Gpio::new(gpio.gpio5, io11).into_push_pull_output(); + let mut blue = Gpio::new(gpio.gpio6, io10).into_push_pull_output(); + + // SW SPI? + let gpiohs27 = fpioa.io13.into_function(fpioa::GPIOHS27); + let gpiohs28 = fpioa.io14.into_function(fpioa::GPIOHS28); + + // IO for embedded mic + let io18 = fpioa.io18.into_function(fpioa::I2S0_SCLK); + let io19 = fpioa.io19.into_function(fpioa::I2S0_WS); + let io20 = fpioa.io20.into_function(fpioa::I2S0_IN_D3); + + // IO for mic array + // let io22 = fpioa.io22.into_function(fpioa::I2S0_SCLK); + // let io21 = fpioa.io21.into_function(fpioa::I2S0_WS); + // let io32 = fpioa.io32.into_function(fpioa::I2S0_IN_D0); + // let io15 = fpioa.io15.into_function(fpioa::I2S0_IN_D1); + // let io23 = fpioa.io23.into_function(fpioa::I2S0_IN_D2); + // let io24 = fpioa.io24.into_function(fpioa::I2S0_IN_D3); + + let i2s0 = i2s::I2s::new(p.I2S0, &mut sysctl.pll2); + i2s0.set_rx_word_length(i2s::WordLength::Resolution16Bit); + i2s0.set_sample_rate(Hertz(44_000)); + i2s0.configure_master( + i2s::WordSelectCycle::SclkCycles24, + i2s::GatingCycles::ClockCycles16, + i2s::AlignMode::StandardMode, + ); + /* + from Maix import MIC_ARRAY as mic + import lcd + + lcd.init() + mic.init() + # reconfigure pins after mic.init() to match your wiring + + while True: + imga = mic.get_map() + b = mic.get_dir(imga) + a = mic.set_led(b,(0,0,255)) + imgb = imga.resize(240,160) + imgc = imgb.to_rainbow(1) + a = lcd.display(imgc) + mic.deinit() + */ + + red.set_high().unwrap(); + green.set_high().unwrap(); + blue.set_high().unwrap(); + + //i2s_ + + let mut last_update = riscv::register::mcycle::read(); + let mut i = 0; + loop { + let cur = riscv::register::mcycle::read(); + if cur - last_update >= 100_000_000 { + last_update = cur; + + red.toggle().unwrap(); + if i % 2 == 0 { + green.toggle().unwrap(); + } + if i % 3 == 0 { + blue.toggle().unwrap(); + } + + i += 1; + } + } +} diff --git a/examples/interrupt.rs b/examples/interrupt.rs index c37d18b..57b3cbc 100644 --- a/examples/interrupt.rs +++ b/examples/interrupt.rs @@ -3,10 +3,10 @@ #![no_std] #![no_main] -use k210_hal::{prelude::*, pac, clint::msip, stdout::Stdout}; -use panic_halt as _; -use riscv::register::{mie,mstatus,mhartid,/*mvendorid,marchid,mimpid,*/mcause}; use core::sync::atomic::{AtomicBool, Ordering}; +use k210_hal::{clint::msip, pac, prelude::*, stdout::Stdout}; +use panic_halt as _; +use riscv::register::{/*mvendorid,marchid,mimpid,*/ mcause, mhartid, mie, mstatus}; // use core::ptr; // fn peek(addr: u64) -> T { @@ -28,7 +28,9 @@ fn my_trap_handler() { let hart_id = mhartid::read(); let cause = mcause::read().bits(); - unsafe { INTR_INFO = Some(IntrInfo { hart_id, cause }); } + unsafe { + INTR_INFO = Some(IntrInfo { hart_id, cause }); + } INTR.store(true, Ordering::SeqCst); @@ -39,12 +41,10 @@ fn my_trap_handler() { fn main() -> ! { let hart_id = mhartid::read(); - static mut SHARED_TX: Option> = None; + static mut SHARED_TX: Option> = None; if hart_id == 0 { - let p = pac::Peripherals::take().unwrap(); + let p = unsafe { pac::Peripherals::steal() }; //configure_fpioa(p.FPIOA); @@ -61,9 +61,7 @@ fn main() -> ! { } // Super-unsafe UART sharing! - let tx = unsafe { - SHARED_TX.as_mut().unwrap() - }; + let tx = unsafe { SHARED_TX.as_mut().unwrap() }; let mut stdout = Stdout(tx); if hart_id == 1 { @@ -94,15 +92,15 @@ fn main() -> ! { msip::set_ipi(hart_id); writeln!(stdout, "Waiting for interrupt").unwrap(); - while !INTR.load(Ordering::SeqCst) { - } + while !INTR.load(Ordering::SeqCst) {} INTR.store(false, Ordering::SeqCst); - writeln!(stdout, - "Interrupt was triggered! hart_id: {:16X}, cause: {:16X}", + writeln!( + stdout, + "Interrupt was triggered! hart_id: {:16X}, cause: {:16X}", unsafe { INTR_INFO }.unwrap().hart_id, unsafe { INTR_INFO }.unwrap().cause, - ).unwrap(); - + ) + .unwrap(); if hart_id == 0 { writeln!(stdout, "Waking other harts...").unwrap(); @@ -110,19 +108,22 @@ fn main() -> ! { msip::set_ipi(1); } - loop { unsafe { riscv::asm::wfi(); } } + loop { + unsafe { + riscv::asm::wfi(); + } + } } #[export_name = "_mp_hook"] -pub extern "Rust" fn user_mp_hook() -> bool { - use riscv::register::/*{mie, */mip/*}*/; +pub fn user_mp_hook() -> bool { use riscv::asm::wfi; + use riscv::register::mip; /*}*/ let hart_id = mhartid::read(); if hart_id == 0 { true } else { - unsafe { msip::set_ipi(hart_id); diff --git a/examples/multi-core.rs b/examples/multi-core.rs index e251dfe..3bafe85 100644 --- a/examples/multi-core.rs +++ b/examples/multi-core.rs @@ -3,17 +3,17 @@ extern crate panic_halt; -use riscv::register::mhartid; -use riscv_rt::entry; +use k210_hal::pac::{Peripherals, CLINT, UARTHS}; use k210_hal::prelude::*; -use k210_hal::pac::{Peripherals, UARTHS, CLINT}; -use k210_hal::stdout::Stdout; use k210_hal::serial::Tx; +use k210_hal::stdout::Stdout; +use riscv::register::mhartid; +use riscv_rt::entry; #[export_name = "_mp_hook"] -pub extern "Rust" fn user_mp_hook() -> bool { - use riscv::register::{mie, mip}; +pub fn user_mp_hook() -> bool { use riscv::asm::wfi; + use riscv::register::{mie, mip}; let hartid = mhartid::read(); if hartid == 0 { @@ -53,7 +53,6 @@ pub fn wake_hart(hartid: usize) { } } - #[entry] fn main() -> ! { let hartid = mhartid::read(); @@ -61,7 +60,7 @@ fn main() -> ! { static mut SHARED_TX: Option> = None; if hartid == 0 { - let p = Peripherals::take().unwrap(); + let p = unsafe { Peripherals::steal() }; //configure_fpioa(p.FPIOA); @@ -78,9 +77,7 @@ fn main() -> ! { } // Super-unsafe UART sharing! - let tx = unsafe { - SHARED_TX.as_mut().unwrap() - }; + let tx = unsafe { SHARED_TX.as_mut().unwrap() }; let mut stdout = Stdout(tx); if hartid == 1 { @@ -96,5 +93,5 @@ fn main() -> ! { wake_hart(1); } - loop { } + loop {} } diff --git a/examples/sdcard.rs b/examples/sdcard.rs index d63fc46..553772e 100644 --- a/examples/sdcard.rs +++ b/examples/sdcard.rs @@ -1,21 +1,23 @@ #![no_std] #![no_main] +use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::v2::ToggleableOutputPin; +use k210_hal::{fpioa, gpio::Gpio, pac, prelude::*}; use panic_halt as _; -use k210_hal::{prelude::*, fpioa, pac, gpio::Gpio}; #[riscv_rt::entry] fn main() -> ! { // todo - let p = pac::Peripherals::take().unwrap(); - + let p = unsafe { pac::Peripherals::steal() }; + let mut sysctl = p.SYSCTL.constrain(); let fpioa = p.FPIOA.split(&mut sysctl.apb0); let gpio = p.GPIO.split(&mut sysctl.apb0); let io14 = fpioa.io14.into_function(fpioa::GPIO6); let mut blue = Gpio::new(gpio.gpio6, io14).into_push_pull_output(); - blue.try_set_low().ok(); + blue.set_low().unwrap(); let mut last_update = riscv::register::mcycle::read(); loop { @@ -23,7 +25,7 @@ fn main() -> ! { if cur - last_update >= 100_000_000 { last_update = cur; - blue.try_toggle().ok(); + blue.toggle().unwrap(); } } } diff --git a/examples/serial-console.rs b/examples/serial-console.rs index 22e9a5c..dbaea76 100644 --- a/examples/serial-console.rs +++ b/examples/serial-console.rs @@ -1,16 +1,17 @@ #![no_std] #![no_main] +use embedded_hal::digital::v2::InputPin; +use k210_hal::{fpioa, pac, prelude::*, stdout::Stdout}; use panic_halt as _; -use k210_hal::{prelude::*, fpioa, pac, stdout::Stdout}; #[riscv_rt::entry] fn main() -> ! { - let p = pac::Peripherals::take().unwrap(); + let p = unsafe { pac::Peripherals::steal() }; let mut sysctl = p.SYSCTL.constrain(); let fpioa = p.FPIOA.split(&mut sysctl.apb0); - let gpio = p.GPIO.split(&mut sysctl.apb0); + let _gpio = p.GPIO.split(&mut sysctl.apb0); let gpiohs = p.GPIOHS.split(); // Configure clocks (TODO) @@ -20,12 +21,9 @@ fn main() -> ! { let _uarths_tx = fpioa.io5.into_function(fpioa::UARTHS_TX); fpioa.io16.into_function(fpioa::GPIOHS0); let boot_button = gpiohs.gpiohs0.into_pull_up_input(); - + // Configure UART - let serial = p.UARTHS.configure( - 115_200.bps(), - &clocks - ); + let serial = p.UARTHS.configure(115_200.bps(), &clocks); let (mut tx, _) = serial.split(); // todo: new stdout design (simple Write impl?) @@ -34,8 +32,13 @@ fn main() -> ! { writeln!(stdout, "Hello, Rust!").ok(); loop { - let input_state = boot_button.try_is_high().unwrap(); + let input_state = boot_button.is_high().unwrap(); let dir = unsafe { &*pac::GPIO::ptr() }.direction.read().bits(); - writeln!(stdout, "Io16 input: {}; direction value: 0x{:08X}", input_state, dir); + writeln!( + stdout, + "Io16 input: {}; direction value: 0x{:08X}", + input_state, dir + ) + .ok(); } } diff --git a/src/main.rs b/src/main.rs index e4d0650..d6a4407 100644 --- a/src/main.rs +++ b/src/main.rs @@ -2,15 +2,16 @@ #![no_std] #![no_main] -use panic_halt as _; -use k210_hal::prelude::*; use k210_hal::fpioa; -use k210_hal::pac as pac; +use k210_hal::pac; +use k210_hal::prelude::*; use k210_hal::stdout::Stdout; +use panic_halt as _; +use riscv_rt; #[riscv_rt::entry] fn main() -> ! { - let p = pac::Peripherals::take().unwrap(); + let p = unsafe { pac::Peripherals::steal() }; let mut sysctl = p.SYSCTL.constrain(); // Prepare pins for UARTHS let fpioa = p.FPIOA.split(&mut sysctl.apb0); @@ -20,10 +21,7 @@ fn main() -> ! { let clocks = k210_hal::clock::Clocks::new(); // Configure UART - let serial = p.UARTHS.configure( - 115_200.bps(), - &clocks - ); + let serial = p.UARTHS.configure(115_200.bps(), &clocks); let (mut tx, _) = serial.split(); // todo: new stdout design (simple Write impl?)