From 3095079e3e07e5274ecd86e705399ed80b13f182 Mon Sep 17 00:00:00 2001 From: A-Marcelli Date: Sat, 17 Feb 2024 00:18:21 +0100 Subject: [PATCH 01/31] Add fp8 Functions --- softfloat_8/f8_1_2_recip7_rsqrte7.c | 287 +++++++++++++++++++++++++++ softfloat_8/f8_1_add.c | 35 ++++ softfloat_8/f8_1_classify.c | 37 ++++ softfloat_8/f8_1_div.c | 157 +++++++++++++++ softfloat_8/f8_1_eq.c | 31 +++ softfloat_8/f8_1_le.c | 31 +++ softfloat_8/f8_1_lt.c | 31 +++ softfloat_8/f8_1_lt_quiet.c | 37 ++++ softfloat_8/f8_1_max_min.c | 37 ++++ softfloat_8/f8_1_mul.c | 104 ++++++++++ softfloat_8/f8_1_mulAdd.c | 25 +++ softfloat_8/f8_1_sqrt.c | 105 ++++++++++ softfloat_8/f8_1_sub.c | 35 ++++ softfloat_8/f8_1_to_bf16.c | 56 ++++++ softfloat_8/f8_1_to_f8_2.c | 61 ++++++ softfloat_8/f8_1_to_i16.c | 22 ++ softfloat_8/f8_1_to_i32.c | 52 +++++ softfloat_8/f8_1_to_i8.c | 22 ++ softfloat_8/f8_1_to_ui16.c | 19 ++ softfloat_8/f8_1_to_ui32.c | 49 +++++ softfloat_8/f8_1_to_ui8.c | 19 ++ softfloat_8/f8_2_add.c | 35 ++++ softfloat_8/f8_2_classify.c | 37 ++++ softfloat_8/f8_2_div.c | 132 ++++++++++++ softfloat_8/f8_2_eq.c | 30 +++ softfloat_8/f8_2_le.c | 31 +++ softfloat_8/f8_2_lt.c | 31 +++ softfloat_8/f8_2_lt_quiet.c | 37 ++++ softfloat_8/f8_2_max_min.c | 37 ++++ softfloat_8/f8_2_mul.c | 104 ++++++++++ softfloat_8/f8_2_mulAdd.c | 25 +++ softfloat_8/f8_2_sqrt.c | 89 +++++++++ softfloat_8/f8_2_sub.c | 35 ++++ softfloat_8/f8_2_to_bf16.c | 56 ++++++ softfloat_8/f8_2_to_f8_1.c | 52 +++++ softfloat_8/f8_2_to_i16.c | 22 ++ softfloat_8/f8_2_to_i32.c | 52 +++++ softfloat_8/f8_2_to_i8.c | 22 ++ softfloat_8/f8_2_to_ui16.c | 19 ++ softfloat_8/f8_2_to_ui32.c | 49 +++++ softfloat_8/f8_2_to_ui8.c | 19 ++ softfloat_8/i16_to_f8_1.c | 35 ++++ softfloat_8/i16_to_f8_2.c | 35 ++++ softfloat_8/i32_to_f8_1.c | 34 ++++ softfloat_8/i32_to_f8_2.c | 35 ++++ softfloat_8/internals.h | 113 +++++++++++ softfloat_8/primitives.h | 74 +++++++ softfloat_8/s_addMagsF8_1.c | 148 ++++++++++++++ softfloat_8/s_addMagsF8_2.c | 148 ++++++++++++++ softfloat_8/s_mulAddF8_1.c | 188 ++++++++++++++++++ softfloat_8/s_mulAddF8_2.c | 188 ++++++++++++++++++ softfloat_8/s_normRoundPackToF8_1.c | 21 ++ softfloat_8/s_normRoundPackToF8_2.c | 21 ++ softfloat_8/s_normSubnormalF8_1Sig.c | 16 ++ softfloat_8/s_normSubnormalF8_2Sig.c | 16 ++ softfloat_8/s_propagateNaNF8_1UI.c | 22 ++ softfloat_8/s_propagateNaNF8_2UI.c | 22 ++ softfloat_8/s_roundPackToF8_1.c | 79 ++++++++ softfloat_8/s_roundPackToF8_2.c | 79 ++++++++ softfloat_8/s_subMagsF8_1.c | 151 ++++++++++++++ softfloat_8/s_subMagsF8_2.c | 151 ++++++++++++++ softfloat_8/softfloat.h | 221 +++++++++++++++++++++ softfloat_8/softfloat_8.ac | 0 softfloat_8/softfloat_8.mk.in | 84 ++++++++ softfloat_8/softfloat_types.h | 54 +++++ softfloat_8/specialize.h | 117 +++++++++++ softfloat_8/ui16_to_f8_1.c | 30 +++ softfloat_8/ui16_to_f8_2.c | 29 +++ softfloat_8/ui32_to_f8_1.c | 30 +++ softfloat_8/ui32_to_f8_2.c | 30 +++ 70 files changed, 4337 insertions(+) create mode 100644 softfloat_8/f8_1_2_recip7_rsqrte7.c create mode 100644 softfloat_8/f8_1_add.c create mode 100644 softfloat_8/f8_1_classify.c create mode 100644 softfloat_8/f8_1_div.c create mode 100644 softfloat_8/f8_1_eq.c create mode 100644 softfloat_8/f8_1_le.c create mode 100644 softfloat_8/f8_1_lt.c create mode 100644 softfloat_8/f8_1_lt_quiet.c create mode 100644 softfloat_8/f8_1_max_min.c create mode 100644 softfloat_8/f8_1_mul.c create mode 100644 softfloat_8/f8_1_mulAdd.c create mode 100644 softfloat_8/f8_1_sqrt.c create mode 100644 softfloat_8/f8_1_sub.c create mode 100644 softfloat_8/f8_1_to_bf16.c create mode 100644 softfloat_8/f8_1_to_f8_2.c create mode 100644 softfloat_8/f8_1_to_i16.c create mode 100644 softfloat_8/f8_1_to_i32.c create mode 100644 softfloat_8/f8_1_to_i8.c create mode 100644 softfloat_8/f8_1_to_ui16.c create mode 100644 softfloat_8/f8_1_to_ui32.c create mode 100644 softfloat_8/f8_1_to_ui8.c create mode 100644 softfloat_8/f8_2_add.c create mode 100644 softfloat_8/f8_2_classify.c create mode 100644 softfloat_8/f8_2_div.c create mode 100644 softfloat_8/f8_2_eq.c create mode 100644 softfloat_8/f8_2_le.c create mode 100644 softfloat_8/f8_2_lt.c create mode 100644 softfloat_8/f8_2_lt_quiet.c create mode 100644 softfloat_8/f8_2_max_min.c create mode 100644 softfloat_8/f8_2_mul.c create mode 100644 softfloat_8/f8_2_mulAdd.c create mode 100644 softfloat_8/f8_2_sqrt.c create mode 100644 softfloat_8/f8_2_sub.c create mode 100644 softfloat_8/f8_2_to_bf16.c create mode 100644 softfloat_8/f8_2_to_f8_1.c create mode 100644 softfloat_8/f8_2_to_i16.c create mode 100644 softfloat_8/f8_2_to_i32.c create mode 100644 softfloat_8/f8_2_to_i8.c create mode 100644 softfloat_8/f8_2_to_ui16.c create mode 100644 softfloat_8/f8_2_to_ui32.c create mode 100644 softfloat_8/f8_2_to_ui8.c create mode 100644 softfloat_8/i16_to_f8_1.c create mode 100644 softfloat_8/i16_to_f8_2.c create mode 100644 softfloat_8/i32_to_f8_1.c create mode 100644 softfloat_8/i32_to_f8_2.c create mode 100644 softfloat_8/internals.h create mode 100644 softfloat_8/primitives.h create mode 100644 softfloat_8/s_addMagsF8_1.c create mode 100644 softfloat_8/s_addMagsF8_2.c create mode 100644 softfloat_8/s_mulAddF8_1.c create mode 100644 softfloat_8/s_mulAddF8_2.c create mode 100644 softfloat_8/s_normRoundPackToF8_1.c create mode 100644 softfloat_8/s_normRoundPackToF8_2.c create mode 100644 softfloat_8/s_normSubnormalF8_1Sig.c create mode 100644 softfloat_8/s_normSubnormalF8_2Sig.c create mode 100644 softfloat_8/s_propagateNaNF8_1UI.c create mode 100644 softfloat_8/s_propagateNaNF8_2UI.c create mode 100644 softfloat_8/s_roundPackToF8_1.c create mode 100644 softfloat_8/s_roundPackToF8_2.c create mode 100644 softfloat_8/s_subMagsF8_1.c create mode 100644 softfloat_8/s_subMagsF8_2.c create mode 100644 softfloat_8/softfloat.h create mode 100644 softfloat_8/softfloat_8.ac create mode 100644 softfloat_8/softfloat_8.mk.in create mode 100644 softfloat_8/softfloat_types.h create mode 100644 softfloat_8/specialize.h create mode 100644 softfloat_8/ui16_to_f8_1.c create mode 100644 softfloat_8/ui16_to_f8_2.c create mode 100644 softfloat_8/ui32_to_f8_1.c create mode 100644 softfloat_8/ui32_to_f8_2.c diff --git a/softfloat_8/f8_1_2_recip7_rsqrte7.c b/softfloat_8/f8_1_2_recip7_rsqrte7.c new file mode 100644 index 0000000000..4749554395 --- /dev/null +++ b/softfloat_8/f8_1_2_recip7_rsqrte7.c @@ -0,0 +1,287 @@ + +#include +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" +/*********************************************************************************/ +/********************************support functions********************************/ +/*********************************************************************************/ +static inline uint64_t extract64(uint64_t val, int pos, int len) +{ + assert(pos >= 0 && len > 0 && len <= 64 - pos); + return (val >> pos) & (~UINT64_C(0) >> (64 - len)); +} + +static inline uint64_t make_mask64(int pos, int len) +{ + assert(pos >= 0 && len > 0 && pos < 64 && len <= 64); + return (UINT64_MAX >> (64 - len)) << pos; +} + +/*********************************************************************************/ + +static inline uint64_t rsqrte7(uint64_t val, int e, int s, bool sub) { + uint64_t exp = extract64(val, s, e); + uint64_t sig = extract64(val, 0, s); + uint64_t sign = extract64(val, s + e, 1); + const int p = 7; + + static const uint8_t table[] = { + 52, 51, 50, 48, 47, 46, 44, 43, + 42, 41, 40, 39, 38, 36, 35, 34, + 33, 32, 31, 30, 30, 29, 28, 27, + 26, 25, 24, 23, 23, 22, 21, 20, + 19, 19, 18, 17, 16, 16, 15, 14, + 14, 13, 12, 12, 11, 10, 10, 9, + 9, 8, 7, 7, 6, 6, 5, 4, + 4, 3, 3, 2, 2, 1, 1, 0, + 127, 125, 123, 121, 119, 118, 116, 114, + 113, 111, 109, 108, 106, 105, 103, 102, + 100, 99, 97, 96, 95, 93, 92, 91, + 90, 88, 87, 86, 85, 84, 83, 82, + 80, 79, 78, 77, 76, 75, 74, 73, + 72, 71, 70, 70, 69, 68, 67, 66, + 65, 64, 63, 63, 62, 61, 60, 59, + 59, 58, 57, 56, 56, 55, 54, 53}; + + if (sub) { + while (extract64(sig, s - 1, 1) == 0) + exp--, sig <<= 1; + + sig = (sig << 1) & make_mask64(0 ,s); + } + + int idx = ((exp & 1) << (p-1)) | (sig >> (s-p+1)); + uint64_t out_sig = (uint64_t)(table[idx]) << (s-p); + uint64_t out_exp = (3 * make_mask64(0, e - 1) + ~exp) / 2; + + return (sign << (s+e)) | (out_exp << s) | out_sig; +} + +/*********************************************************************************/ +float8_1_t f8_1_rsqrte7( float8_1_t in) +{ + union ui8_f8_1 uA; + + uA.f = in; + unsigned int ret = f8_1_classify(in); + bool sub = false; + switch(ret) { + case 0x001: // -inf + case 0x002: // -normal + case 0x004: // -subnormal + case 0x100: // sNaN + softfloat_exceptionFlags |= softfloat_flag_invalid; + case 0x200: //qNaN + uA.ui = defaultNaNF8_1UI; + break; + case 0x008: // -0 + uA.ui = 0xf8; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x010: // +0 + uA.ui = 0x78; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x080: //+inf + uA.ui = 0x0; + break; + case 0x020: //+ sub + sub = true; + default: // +num + uA.ui = rsqrte7(uA.ui, 4, 3, sub); + break; + } + + return uA.f; +} + +/*********************************************************************************/ +float8_2_t f8_2_rsqrte7( float8_2_t in) +{ + union ui8_f8_2 uA; + + uA.f = in; + unsigned int ret = f8_2_classify(in); + bool sub = false; + switch(ret) { + case 0x001: // -inf + case 0x002: // -normal + case 0x004: // -subnormal + case 0x100: // sNaN + softfloat_exceptionFlags |= softfloat_flag_invalid; + case 0x200: //qNaN + uA.ui = defaultNaNF8_2UI; + break; + case 0x008: // -0 + uA.ui = 0xfc; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x010: // +0 + uA.ui = 0x7c; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x080: //+inf + uA.ui = 0x0; + break; + case 0x020: //+ sub + sub = true; + default: // +num + uA.ui = rsqrte7(uA.ui, 5, 2, sub); + break; + } + + return uA.f; +} + +/*********************************************************************************/ +static inline uint64_t recip7(uint64_t val, int e, int s, int rm, bool sub, + bool *round_abnormal) +{ + uint64_t exp = extract64(val, s, e); + uint64_t sig = extract64(val, 0, s); + uint64_t sign = extract64(val, s + e, 1); + const int p = 7; + + static const uint8_t table[] = { + 127, 125, 123, 121, 119, 117, 116, 114, + 112, 110, 109, 107, 105, 104, 102, 100, + 99, 97, 96, 94, 93, 91, 90, 88, + 87, 85, 84, 83, 81, 80, 79, 77, + 76, 75, 74, 72, 71, 70, 69, 68, + 66, 65, 64, 63, 62, 61, 60, 59, + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, 46, 45, 44, 43, + 42, 41, 40, 40, 39, 38, 37, 36, + 35, 35, 34, 33, 32, 31, 31, 30, + 29, 28, 28, 27, 26, 25, 25, 24, + 23, 23, 22, 21, 21, 20, 19, 19, + 18, 17, 17, 16, 15, 15, 14, 14, + 13, 12, 12, 11, 11, 10, 9, 9, + 8, 8, 7, 7, 6, 5, 5, 4, + 4, 3, 3, 2, 2, 1, 1, 0}; + + if (sub) { + while (extract64(sig, s - 1, 1) == 0) + exp--, sig <<= 1; + + sig = (sig << 1) & make_mask64(0 ,s); + + if (exp != 0 && exp != UINT64_MAX) { + *round_abnormal = true; + if (rm == 1 || + (rm == 2 && !sign) || + (rm == 3 && sign)) + return ((sign << (s+e)) | make_mask64(s, e)) - 1; + else + return (sign << (s+e)) | make_mask64(s, e); + } + } + + int idx = sig >> (s-p); + uint64_t out_sig = (uint64_t)(table[idx]) << (s-p); + uint64_t out_exp = 2 * make_mask64(0, e - 1) + ~exp; + if (out_exp == 0 || out_exp == UINT64_MAX) { + out_sig = (out_sig >> 1) | make_mask64(s - 1, 1); + if (out_exp == UINT64_MAX) { + out_sig >>= 1; + out_exp = 0; + } + } + + return (sign << (s+e)) | (out_exp << s) | out_sig; +} + +/*********************************************************************************/ + + +float8_1_t f8_1_recip7( float8_1_t in) +{ + union ui8_f8_1 uA; + + uA.f = in; + unsigned int ret = f8_1_classify(in); + bool sub = false; + bool round_abnormal = false; + switch(ret) { + case 0x001: // -inf + uA.ui = 0x80; + break; + case 0x080: //+inf + uA.ui = 0x0; + break; + case 0x008: // -0 + uA.ui = 0xf8; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x010: // +0 + uA.ui = 0x78; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x100: // sNaN + softfloat_exceptionFlags |= softfloat_flag_invalid; + case 0x200: //qNaN + uA.ui = defaultNaNF8_1UI; + break; + case 0x004: // -subnormal + case 0x020: //+ sub + sub = true; + default: // +- normal + uA.ui = recip7(uA.ui, 4, 3, + softfloat_roundingMode, sub, &round_abnormal); + if (round_abnormal) + softfloat_exceptionFlags |= softfloat_flag_inexact | + softfloat_flag_overflow; + break; + } + + return uA.f; +} + +/*********************************************************************************/ + +float8_2_t f8_2_recip7( float8_2_t in) +{ + union ui8_f8_2 uA; + + uA.f = in; + unsigned int ret = f8_2_classify(in); + bool sub = false; + bool round_abnormal = false; + switch(ret) { + case 0x001: // -inf + uA.ui = 0x80; + break; + case 0x080: //+inf + uA.ui = 0x0; + break; + case 0x008: // -0 + uA.ui = 0xfc; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x010: // +0 + uA.ui = 0x7c; + softfloat_exceptionFlags |= softfloat_flag_infinite; + break; + case 0x100: // sNaN + softfloat_exceptionFlags |= softfloat_flag_invalid; + case 0x200: //qNaN + uA.ui = defaultNaNF8_2UI; + break; + case 0x004: // -subnormal + case 0x020: //+ sub + sub = true; + default: // +- normal + uA.ui = recip7(uA.ui, 5, 2, + softfloat_roundingMode, sub, &round_abnormal); + if (round_abnormal) + softfloat_exceptionFlags |= softfloat_flag_inexact | + softfloat_flag_overflow; + break; + } + + return uA.f; +} diff --git a/softfloat_8/f8_1_add.c b/softfloat_8/f8_1_add.c new file mode 100644 index 0000000000..d36850820e --- /dev/null +++ b/softfloat_8/f8_1_add.c @@ -0,0 +1,35 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t f8_1_add( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float8_1_t (*magsFuncPtr)( uint_fast8_t, uint_fast8_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF8_1UI( uiA ^ uiB ) ) { + return softfloat_subMagsF8_1( uiA, uiB ); + } else { + return softfloat_addMagsF8_1( uiA, uiB ); + } +#else + magsFuncPtr = + signF8_1UI( uiA ^ uiB ) ? softfloat_subMagsF8_1 : softfloat_addMagsF8_1; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/softfloat_8/f8_1_classify.c b/softfloat_8/f8_1_classify.c new file mode 100644 index 0000000000..7581e47fbc --- /dev/null +++ b/softfloat_8/f8_1_classify.c @@ -0,0 +1,37 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + + +uint_fast16_t f8_1_classify( float8_1_t a ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + + uA.f = a; + uiA = uA.ui; + + uint_fast16_t infOrNaN = expF8_1UI( uiA ) == 0x0F; + uint_fast16_t subnormalOrZero = expF8_1UI( uiA ) == 0; + bool sign = signF8_1UI( uiA ); + bool fracZero = fracF8_1UI( uiA ) == 0; + bool isNaN = isNaNF8_1UI( uiA ); + bool isSNaN = softfloat_isSigNaNF8_1UI( uiA ); + + return + ( sign && infOrNaN && fracZero ) << 0 | + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | + ( sign && subnormalOrZero && !fracZero ) << 2 | + ( sign && subnormalOrZero && fracZero ) << 3 | + ( !sign && infOrNaN && fracZero ) << 7 | + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | + ( !sign && subnormalOrZero && !fracZero ) << 5 | + ( !sign && subnormalOrZero && fracZero ) << 4 | + ( isNaN && isSNaN ) << 8 | + ( isNaN && !isSNaN ) << 9; +} + diff --git a/softfloat_8/f8_1_div.c b/softfloat_8/f8_1_div.c new file mode 100644 index 0000000000..fb67aa5254 --- /dev/null +++ b/softfloat_8/f8_1_div.c @@ -0,0 +1,157 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extern const uint16_t softfloat_approxRecip_1k0s[]; +extern const uint16_t softfloat_approxRecip_1k1s[]; + +#ifndef SOFTFLOAT_FAST_DIV16TO8 +#define SOFTFLOAT_FAST_DIV16TO8 1 +#endif + +float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signZ; + struct exp8_sig8_1 normExpSig; + int_fast8_t expZ; +#ifdef SOFTFLOAT_FAST_DIV16TO8 //?????? dove è definito? serve? + uint_fast16_t sig16A; + uint_fast8_t sigZ; +#else + int index; + uint8_t r0; //??? + uint_fast8_t sigZ, rem; +#endif + uint_fast8_t uiZ; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_1UI( uiA ); + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); //sig con frac è solo 3 bit max + uB.f = b; + uiB = uB.ui; + signB = signF8_1UI( uiB ); + expB = expF8_1UI( uiB ); + sigB = fracF8_1UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x0F ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF8_1Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0x6; //uno meno dell'eccesso + sigA |= 0x08; // un uno sul bit meno significativo dell'esponente + sigB |= 0x08; +#ifdef SOFTFLOAT_FAST_DIV16TO8 + if ( sigA < sigB ) { + --expZ; + sig16A = (uint_fast16_t) sigA<<7; + } else { + sig16A = (uint_fast16_t) sigA<<6; + } + sigZ = sig16A / sigB; + if ( ! (sigZ & 3) ) sigZ |= ((uint_fast16_t) sigB * sigZ != sig16A); // 3 = 'due' bit a 1, 'due' = numero bit esponente meno due +#else + if ( sigA < sigB ) { + --expZ; + sigA <<= 4; //quanto i bit dell'esponente + } else { + sigA <<= 3; //uno meno dei bit dell'esponente + } + index = sigB<<1 & 0xF; //allora, la sigB prima di questa riga ha 4 bit, 3 propri e uno aggiunto riga 90. devo portarlo a 5 bit per metterlo dentro softfloat_approxRecip_1k0s, sempre se va bene + r0 = softfloat_approxRecip_1k0s[index] //r0 esce a 16 bit + - (((uint_fast32_t) softfloat_approxRecip_1k1s[index] + * (sigB & 0x3F)) + >>17); //perchè da un massimo di 21 bit che vengono dalla moltiplicazione devo tornare a 4 (3 mantissa più l'1 implicito davanti) + sigZ = ((uint_fast16_t) sigA * r0)>>8; + rem = (sigA<<17) - sigZ * sigB; //l'ho messa come sopra ma boh, sarà bit mantissa??? + sigZ += (rem * (uint_fast16_t) r0)>>26; //questo numero dipende da quello riga sopra + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + ++sigZ; //??????? ancora da fare + if ( ! (sigZ & 3) ) { + sigZ &= ~1; + rem = (sigA<<17) - sigZ * sigB; //come riga 113 + if ( rem & 0x80 ) { + sigZ -= 2; + } else { + if ( rem ) sigZ |= 1; + } + } +#endif + return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_1UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF8_1UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/f8_1_eq.c b/softfloat_8/f8_1_eq.c new file mode 100644 index 0000000000..92e0df3ad0 --- /dev/null +++ b/softfloat_8/f8_1_eq.c @@ -0,0 +1,31 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f8_1_eq( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_1UI( uiA ) || isNaNF8_1UI( uiB ) ) { + if ( + softfloat_isSigNaNF8_1UI( uiA ) || softfloat_isSigNaNF8_1UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return (uiA == uiB) || ! (uint8_t) ((uiA | uiB)<<1); + +} + diff --git a/softfloat_8/f8_1_le.c b/softfloat_8/f8_1_le.c new file mode 100644 index 0000000000..2886a8d530 --- /dev/null +++ b/softfloat_8/f8_1_le.c @@ -0,0 +1,31 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f8_1_le( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_1UI( uiA ) || isNaNF8_1UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF8_1UI( uiA ); + signB = signF8_1UI( uiB ); + return + (signA != signB) ? signA || ! (uint8_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/softfloat_8/f8_1_lt.c b/softfloat_8/f8_1_lt.c new file mode 100644 index 0000000000..84f9c5f0fd --- /dev/null +++ b/softfloat_8/f8_1_lt.c @@ -0,0 +1,31 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f8_1_lt( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_1UI( uiA ) || isNaNF8_1UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF8_1UI( uiA ); + signB = signF8_1UI( uiB ); + return + (signA != signB) ? signA && ((uint8_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/softfloat_8/f8_1_lt_quiet.c b/softfloat_8/f8_1_lt_quiet.c new file mode 100644 index 0000000000..201ab5cd62 --- /dev/null +++ b/softfloat_8/f8_1_lt_quiet.c @@ -0,0 +1,37 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f8_1_lt_quiet( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_1UI( uiA ) || isNaNF8_1UI( uiB ) ) { + if ( + softfloat_isSigNaNF8_1UI( uiA ) || softfloat_isSigNaNF8_1UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF8_1UI( uiA ); + signB = signF8_1UI( uiB ); + return + (signA != signB) ? signA && ((uint8_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + + diff --git a/softfloat_8/f8_1_max_min.c b/softfloat_8/f8_1_max_min.c new file mode 100644 index 0000000000..af0d1ec297 --- /dev/null +++ b/softfloat_8/f8_1_max_min.c @@ -0,0 +1,37 @@ + +#include +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t f8_1_max( float8_1_t a, float8_1_t b ) +{ + bool greater = f8_1_lt_quiet(b, a) || + (f8_1_eq(b, a) && signF8_1UI(b.v)); + + if (isNaNF8_1UI(a.v) && isNaNF8_1UI(b.v)) { + union ui8_f8_1 ui; + ui.ui = defaultNaNF8_1UI; + return ui.f; + } else { + return greater || isNaNF8_1UI((b).v) ? a : b; + } +} + + +float8_1_t f8_1_min( float8_1_t a, float8_1_t b ) +{ + bool less = f8_1_lt_quiet(a, b) || + (f8_1_eq(a, b) && signF8_1UI(a.v)); + + if (isNaNF8_1UI(a.v) && isNaNF8_1UI(b.v)) { + union ui8_f8_1 ui; + ui.ui = defaultNaNF8_1UI; + return ui.f; + } else { + return less || isNaNF8_1UI((b).v) ? a : b; + } +} diff --git a/softfloat_8/f8_1_mul.c b/softfloat_8/f8_1_mul.c new file mode 100644 index 0000000000..73bc8e04bf --- /dev/null +++ b/softfloat_8/f8_1_mul.c @@ -0,0 +1,104 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t f8_1_mul( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signZ; + uint_fast8_t magBits; + struct exp8_sig8_1 normExpSig; + int_fast8_t expZ; + uint_fast16_t sig16Z; + uint_fast8_t sigZ, uiZ; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_1UI( uiA ); + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF8_1UI( uiB ); + expB = expF8_1UI( uiB ); + sigB = fracF8_1UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x0F ) { + if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF8_1Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0x7; + sigA = (sigA | 0x08)<<3; + sigB = (sigB | 0x08)<<4; + sig16Z = (uint_fast16_t) sigA * sigB; + sigZ = sig16Z>>8; + if ( sig16Z & 0xFF ) sigZ |= 1; + if ( sigZ < 0x40 ) { + --expZ; + sigZ <<= 1; + } + return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_1UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + } else { + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF8_1UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/f8_1_mulAdd.c b/softfloat_8/f8_1_mulAdd.c new file mode 100644 index 0000000000..a73b6e6563 --- /dev/null +++ b/softfloat_8/f8_1_mulAdd.c @@ -0,0 +1,25 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t f8_1_mulAdd( float8_1_t a, float8_1_t b, float8_1_t c ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; + union ui8_f8_1 uC; + uint_fast8_t uiC; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + uC.f = c; + uiC = uC.ui; + return softfloat_mulAddF8_1( uiA, uiB, uiC, 0 ); + +} + diff --git a/softfloat_8/f8_1_sqrt.c b/softfloat_8/f8_1_sqrt.c new file mode 100644 index 0000000000..ffaad3841d --- /dev/null +++ b/softfloat_8/f8_1_sqrt.c @@ -0,0 +1,105 @@ + +#include +#include +#include "platform.h" +#include "primitives.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + + +const uint8_t softfloat_f8_1_sqrt_even[8] = { + 0x40, 0x43, 0x47, 0x4b, 0x4E, 0x51, 0x55, 0x57 +}; +const uint8_t softfloat_f8_1_sqrt_odd[8] = { + 0x5A, 0x60, 0x65, 0x6A, 0x6E, 0x73, 0x77, 0x7B +}; + +float8_1_t f8_1_sqrt( float8_1_t a) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA, expZ; + uint_fast8_t sigA, uiZ; + uint_fast8_t sigZ; + union ui8_f8_1 uZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_1UI( uiA ); + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x0F ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF8_1UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) return a; + switch(sigA){ + case 0x1: { + return softfloat_roundPackToF8_1( 0, 1, 0x5A ); + break; + } + case 0x2: { + return softfloat_roundPackToF8_1( 0, 2, 0x40 ); + break; + } + case 0x3: { + return softfloat_roundPackToF8_1( 0, 2, 0x4E ); + break; + } + case 0x4: { + return softfloat_roundPackToF8_1( 0, 2, 0x5A ); + break; + } + case 0x5: { + return softfloat_roundPackToF8_1( 0, 2, 0x65 ); + break; + } + case 0x6: { + return softfloat_roundPackToF8_1( 0, 2, 0x6E ); + break; + } + case 0x7: { + return softfloat_roundPackToF8_1( 0, 2, 0x77 ); + break; + } + + }; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = ((expA - 7) >>1 ) + 6; + expA &= 1; + if(expA == 1) { + sigZ = softfloat_f8_1_sqrt_even[sigA]; + } else { + sigZ = softfloat_f8_1_sqrt_odd[sigA]; + } + + return softfloat_roundPackToF8_1( 0, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; +} \ No newline at end of file diff --git a/softfloat_8/f8_1_sub.c b/softfloat_8/f8_1_sub.c new file mode 100644 index 0000000000..e34501760e --- /dev/null +++ b/softfloat_8/f8_1_sub.c @@ -0,0 +1,35 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t f8_1_sub( float8_1_t a, float8_1_t b ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + union ui8_f8_1 uB; + uint_fast8_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float8_1_t (*magsFuncPtr)( uint_fast8_t, uint_fast8_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF8_1UI( uiA ^ uiB ) ) { + return softfloat_addMagsF8_1( uiA, uiB ); + } else { + return softfloat_subMagsF8_1( uiA, uiB ); + } +#else + magsFuncPtr = + signF8_1UI( uiA ^ uiB ) ? softfloat_addMagsF8_1 : softfloat_subMagsF8_1; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/softfloat_8/f8_1_to_bf16.c b/softfloat_8/f8_1_to_bf16.c new file mode 100644 index 0000000000..93a2575f0c --- /dev/null +++ b/softfloat_8/f8_1_to_bf16.c @@ -0,0 +1,56 @@ +#include +#include +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f8_1_to_bf16( float8_1_t a ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ; + struct exp8_sig8_1 normExpSig; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_1UI( uiA ); + exp = expF8_1UI( uiA ); + frac = fracF8_1UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xF ) { + if ( frac ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToBF16UI( &commonNaN ); + } else { + uiZ = packToBF16UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToBF16UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF8_1Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToBF16UI( sign, exp + 0x78, (uint_fast32_t) frac<<4 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/f8_1_to_f8_2.c b/softfloat_8/f8_1_to_f8_2.c new file mode 100644 index 0000000000..e3730521bb --- /dev/null +++ b/softfloat_8/f8_1_to_f8_2.c @@ -0,0 +1,61 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t f8_1_to_f8_2( float8_1_t a ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac, frac8; + struct commonNaN commonNaN; + uint_fast8_t uiZ; + struct exp8_sig8_1 normExpSig; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_1UI( uiA ); + exp = expF8_1UI( uiA ); + frac = fracF8_1UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x0F ) { + if ( frac ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); + } else { + uiZ = packToF8_2UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToF8_2UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF8_1Sig( frac ); + exp = normExpSig.exp; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac8 = frac << 3; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF8_2( sign, exp + 0x07, frac8 | 0x40 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/f8_1_to_i16.c b/softfloat_8/f8_1_to_i16.c new file mode 100644 index 0000000000..93974809dd --- /dev/null +++ b/softfloat_8/f8_1_to_i16.c @@ -0,0 +1,22 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +int_fast16_t f8_1_to_i16( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + int_fast32_t sig32 = f8_1_to_i32(a, roundingMode, exact); + + if (sig32 > INT16_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i16_fromPosOverflow; + } else if (sig32 < INT16_MIN) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i16_fromNegOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_1_to_i32.c b/softfloat_8/f8_1_to_i32.c new file mode 100644 index 0000000000..74a71772e2 --- /dev/null +++ b/softfloat_8/f8_1_to_i32.c @@ -0,0 +1,52 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f8_1_to_i32( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + int_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_1UI( uiA ); + exp = expF8_1UI( uiA ); + frac = fracF8_1UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x0F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x08; + shiftDist = exp - 0x0A; + if ( 0 <= shiftDist ) { + sig32 <<= shiftDist; + return sign ? -sig32 : sig32; + } + shiftDist = exp + 0x02; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } + return + softfloat_roundToI32( + sign, (uint_fast32_t) sig32, roundingMode, exact ); + +} + diff --git a/softfloat_8/f8_1_to_i8.c b/softfloat_8/f8_1_to_i8.c new file mode 100644 index 0000000000..bc0c0deffc --- /dev/null +++ b/softfloat_8/f8_1_to_i8.c @@ -0,0 +1,22 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +int_fast8_t f8_1_to_i8( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + int_fast32_t sig32 = f8_1_to_i32(a, roundingMode, exact); + + if (sig32 > INT8_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i8_fromPosOverflow; + } else if (sig32 < INT8_MIN) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i8_fromNegOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_1_to_ui16.c b/softfloat_8/f8_1_to_ui16.c new file mode 100644 index 0000000000..4cd048107a --- /dev/null +++ b/softfloat_8/f8_1_to_ui16.c @@ -0,0 +1,19 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +uint_fast16_t f8_1_to_ui16( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + uint_fast32_t sig32 = f8_1_to_ui32(a, roundingMode, exact); + + if (sig32 > UINT16_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return ui16_fromPosOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_1_to_ui32.c b/softfloat_8/f8_1_to_ui32.c new file mode 100644 index 0000000000..a4dc0de98d --- /dev/null +++ b/softfloat_8/f8_1_to_ui32.c @@ -0,0 +1,49 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f8_1_to_ui32( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui8_f8_1 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + uint_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_1UI( uiA ); + exp = expF8_1UI( uiA ); + frac = fracF8_1UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x0F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x08; + shiftDist = exp - 0x0A; + if ( (0 <= shiftDist) && ! sign ) { + return sig32< +#include "specialize.h" +#include "softfloat.h" + +uint_fast8_t f8_1_to_ui8( float8_1_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + uint_fast32_t sig32 = f8_1_to_ui32(a, roundingMode, exact); + + if (sig32 > UINT8_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return ui8_fromPosOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_2_add.c b/softfloat_8/f8_2_add.c new file mode 100644 index 0000000000..dc036e53aa --- /dev/null +++ b/softfloat_8/f8_2_add.c @@ -0,0 +1,35 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t f8_2_add( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float8_2_t (*magsFuncPtr)( uint_fast8_t, uint_fast8_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF8_2UI( uiA ^ uiB ) ) { + return softfloat_subMagsF8_2( uiA, uiB ); + } else { + return softfloat_addMagsF8_2( uiA, uiB ); + } +#else + magsFuncPtr = + signF8_2UI( uiA ^ uiB ) ? softfloat_subMagsF8_2 : softfloat_addMagsF8_2; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/softfloat_8/f8_2_classify.c b/softfloat_8/f8_2_classify.c new file mode 100644 index 0000000000..b09465eea2 --- /dev/null +++ b/softfloat_8/f8_2_classify.c @@ -0,0 +1,37 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + + +uint_fast16_t f8_2_classify( float8_2_t a ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + + uA.f = a; + uiA = uA.ui; + + uint_fast16_t infOrNaN = expF8_2UI( uiA ) == 0x1F; + uint_fast16_t subnormalOrZero = expF8_2UI( uiA ) == 0; + bool sign = signF8_2UI( uiA ); + bool fracZero = fracF8_2UI( uiA ) == 0; + bool isNaN = isNaNF8_2UI( uiA ); + bool isSNaN = softfloat_isSigNaNF8_2UI( uiA ); + + return + ( sign && infOrNaN && fracZero ) << 0 | + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | + ( sign && subnormalOrZero && !fracZero ) << 2 | + ( sign && subnormalOrZero && fracZero ) << 3 | + ( !sign && infOrNaN && fracZero ) << 7 | + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | + ( !sign && subnormalOrZero && !fracZero ) << 5 | + ( !sign && subnormalOrZero && fracZero ) << 4 | + ( isNaN && isSNaN ) << 8 | + ( isNaN && !isSNaN ) << 9; +} + diff --git a/softfloat_8/f8_2_div.c b/softfloat_8/f8_2_div.c new file mode 100644 index 0000000000..011154d244 --- /dev/null +++ b/softfloat_8/f8_2_div.c @@ -0,0 +1,132 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +extern const uint16_t softfloat_approxRecip_1k0s[]; +extern const uint16_t softfloat_approxRecip_1k1s[]; + +#ifndef SOFTFLOAT_FAST_DIV16TO8 +#define SOFTFLOAT_FAST_DIV16TO8 1 +#endif + +float8_2_t f8_2_div( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signZ; + struct exp8_sig8_2 normExpSig; + int_fast8_t expZ; +#ifdef SOFTFLOAT_FAST_DIV16TO8 + uint_fast16_t sig16A; + uint_fast8_t sigZ; +#else + int index; + uint8_t r0; //??? + uint_fast8_t sigZ, rem; +#endif + uint_fast8_t uiZ; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_2UI( uiA ); + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF8_2UI( uiB ); + expB = expF8_2UI( uiB ); + sigB = fracF8_2UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + goto zero; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; + } + normExpSig = softfloat_normSubnormalF8_2Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF8_2Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA - expB + 0xE; + sigA |= 0x04; + sigB |= 0x04; +#ifdef SOFTFLOAT_FAST_DIV16TO8 + if ( sigA < sigB ) { + --expZ; + sig16A = (uint_fast16_t) sigA<<7; + } else { + sig16A = (uint_fast16_t) sigA<<6; + } + sigZ = sig16A / sigB; + if ( ! (sigZ & 7) ) sigZ |= ((uint_fast16_t) sigB * sigZ != sig16A); +#else + //algorithm +#endif + return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_2UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_2UI; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infinity: + uiZ = packToF8_2UI( signZ, 0x1F, 0 ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF8_2UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/f8_2_eq.c b/softfloat_8/f8_2_eq.c new file mode 100644 index 0000000000..6f2f382179 --- /dev/null +++ b/softfloat_8/f8_2_eq.c @@ -0,0 +1,30 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f8_2_eq( float8_2_t a, float8_2_t b ) // checks if a and b are the same +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_2UI( uiA ) || isNaNF8_2UI( uiB ) ) { + if ( + softfloat_isSigNaNF8_2UI( uiA ) || softfloat_isSigNaNF8_2UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + return (uiA == uiB) || ! (uint8_t) ((uiA | uiB)<<1); + +} diff --git a/softfloat_8/f8_2_le.c b/softfloat_8/f8_2_le.c new file mode 100644 index 0000000000..a0a6cad5ad --- /dev/null +++ b/softfloat_8/f8_2_le.c @@ -0,0 +1,31 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f8_2_le( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_2UI( uiA ) || isNaNF8_2UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF8_2UI( uiA ); + signB = signF8_2UI( uiB ); + return + (signA != signB) ? signA || ! (uint8_t) ((uiA | uiB)<<1) + : (uiA == uiB) || (signA ^ (uiA < uiB)); + +} + diff --git a/softfloat_8/f8_2_lt.c b/softfloat_8/f8_2_lt.c new file mode 100644 index 0000000000..7bdecaa990 --- /dev/null +++ b/softfloat_8/f8_2_lt.c @@ -0,0 +1,31 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +bool f8_2_lt( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_2UI( uiA ) || isNaNF8_2UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return false; + } + signA = signF8_2UI( uiA ); + signB = signF8_2UI( uiB ); + return + (signA != signB) ? signA && ((uint8_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + diff --git a/softfloat_8/f8_2_lt_quiet.c b/softfloat_8/f8_2_lt_quiet.c new file mode 100644 index 0000000000..d168a2fd75 --- /dev/null +++ b/softfloat_8/f8_2_lt_quiet.c @@ -0,0 +1,37 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +bool f8_2_lt_quiet( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + bool signA, signB; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + if ( isNaNF8_2UI( uiA ) || isNaNF8_2UI( uiB ) ) { + if ( + softfloat_isSigNaNF8_2UI( uiA ) || softfloat_isSigNaNF8_2UI( uiB ) + ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return false; + } + signA = signF8_2UI( uiA ); + signB = signF8_2UI( uiB ); + return + (signA != signB) ? signA && ((uint8_t) ((uiA | uiB)<<1) != 0) + : (uiA != uiB) && (signA ^ (uiA < uiB)); + +} + + diff --git a/softfloat_8/f8_2_max_min.c b/softfloat_8/f8_2_max_min.c new file mode 100644 index 0000000000..07268a6baa --- /dev/null +++ b/softfloat_8/f8_2_max_min.c @@ -0,0 +1,37 @@ + +#include +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t f8_2_max( float8_2_t a, float8_2_t b ) +{ + bool greater = f8_2_lt_quiet(b, a) || + (f8_2_eq(b, a) && signF8_2UI(b.v)); + + if (isNaNF8_2UI(a.v) && isNaNF8_2UI(b.v)) { + union ui8_f8_2 ui; + ui.ui = defaultNaNF8_2UI; + return ui.f; + } else { + return greater || isNaNF8_2UI((b).v) ? a : b; + } +} + + +float8_2_t f8_2_min( float8_2_t a, float8_2_t b ) +{ + bool less = f8_2_lt_quiet(a, b) || + (f8_2_eq(a, b) && signF8_2UI(a.v)); + + if (isNaNF8_2UI(a.v) && isNaNF8_2UI(b.v)) { + union ui8_f8_2 ui; + ui.ui = defaultNaNF8_2UI; + return ui.f; + } else { + return less || isNaNF8_2UI((b).v) ? a : b; + } +} diff --git a/softfloat_8/f8_2_mul.c b/softfloat_8/f8_2_mul.c new file mode 100644 index 0000000000..30dd962572 --- /dev/null +++ b/softfloat_8/f8_2_mul.c @@ -0,0 +1,104 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t f8_2_mul( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signZ; + uint_fast8_t magBits; + struct exp8_sig8_2 normExpSig; + int_fast8_t expZ; + uint_fast16_t sig16Z; + uint_fast8_t sigZ, uiZ; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_2UI( uiA ); + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + uB.f = b; + uiB = uB.ui; + signB = signF8_2UI( uiB ); + expB = expF8_2UI( uiB ); + sigB = fracF8_2UI( uiB ); + signZ = signA ^ signB; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zero; + normExpSig = softfloat_normSubnormalF8_2Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zero; + normExpSig = softfloat_normSubnormalF8_2Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = expA + expB - 0xF; + sigA = (sigA | 0x04)<<4; + sigB = (sigB | 0x04)<<5; + sig16Z = (uint_fast16_t) sigA * sigB; + sigZ = sig16Z>>8; + if ( sig16Z & 0xFF ) sigZ |= 1; + if ( sigZ < 0x40 ) { + --expZ; + sigZ <<= 1; + } + return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_2UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_2UI; + } else { + uiZ = packToF8_2UI( signZ, 0x1F, 0 ); + } + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + zero: + uiZ = packToF8_2UI( signZ, 0, 0 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/f8_2_mulAdd.c b/softfloat_8/f8_2_mulAdd.c new file mode 100644 index 0000000000..e94983c97e --- /dev/null +++ b/softfloat_8/f8_2_mulAdd.c @@ -0,0 +1,25 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t f8_2_mulAdd( float8_2_t a, float8_2_t b, float8_2_t c ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; + union ui8_f8_2 uC; + uint_fast8_t uiC; + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; + uC.f = c; + uiC = uC.ui; + return softfloat_mulAddF8_2( uiA, uiB, uiC, 0 ); + +} + diff --git a/softfloat_8/f8_2_sqrt.c b/softfloat_8/f8_2_sqrt.c new file mode 100644 index 0000000000..e143cdfc93 --- /dev/null +++ b/softfloat_8/f8_2_sqrt.c @@ -0,0 +1,89 @@ +//solo per prova +#include +#include +#include "platform.h" +#include "primitives.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + + + +const uint8_t softfloat_f8_2_sqrt_even[4] = { + 0x40, 0x47, 0x4E, 0x55 +}; +const uint8_t softfloat_f8_2_sqrt_odd[4] = { + 0x5A, 0x65, 0x6E, 0x77 +}; + +float8_2_t f8_2_sqrt( float8_2_t a) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool signA; + int_fast8_t expA, expZ; + uint_fast8_t sigA, uiZ; + uint_fast8_t sigZ; + union ui8_f8_2 uZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + signA = signF8_2UI( uiA ); + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF8_2UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( signA ) { + if ( ! (expA | sigA) ) return a; + goto invalid; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) return a; + switch(sigA){ + case 0x1: { + return softfloat_roundPackToF8_2( 0, 6, 0x40 ); + break; + } + case 0x2: { + return softfloat_roundPackToF8_2( 0, 6, 0x5A ); + break; + } + case 0x3: { + return softfloat_roundPackToF8_2( 0, 6, 0x6E ); + break; + } + }; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expZ = ((expA - 15) >>1 ) + 14; + expA &= 1; + if(expA == 1) { + sigZ = softfloat_f8_2_sqrt_even[sigA]; + } else { + sigZ = softfloat_f8_2_sqrt_odd[sigA]; + } + + return softfloat_roundPackToF8_2( 0, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + invalid: + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_2UI; + uiZ: + uZ.ui = uiZ; + return uZ.f; +} \ No newline at end of file diff --git a/softfloat_8/f8_2_sub.c b/softfloat_8/f8_2_sub.c new file mode 100644 index 0000000000..86786a003f --- /dev/null +++ b/softfloat_8/f8_2_sub.c @@ -0,0 +1,35 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t f8_2_sub( float8_2_t a, float8_2_t b ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + union ui8_f8_2 uB; + uint_fast8_t uiB; +#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1) + float8_2_t (*magsFuncPtr)( uint_fast8_t, uint_fast8_t ); +#endif + + uA.f = a; + uiA = uA.ui; + uB.f = b; + uiB = uB.ui; +#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) + if ( signF8_2UI( uiA ^ uiB ) ) { + return softfloat_addMagsF8_2( uiA, uiB ); + } else { + return softfloat_subMagsF8_2( uiA, uiB ); + } +#else + magsFuncPtr = + signF8_2UI( uiA ^ uiB ) ? softfloat_addMagsF8_2 : softfloat_subMagsF8_2; + return (*magsFuncPtr)( uiA, uiB ); +#endif + +} + diff --git a/softfloat_8/f8_2_to_bf16.c b/softfloat_8/f8_2_to_bf16.c new file mode 100644 index 0000000000..4f726047f7 --- /dev/null +++ b/softfloat_8/f8_2_to_bf16.c @@ -0,0 +1,56 @@ +#include +#include +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float16_t f8_2_to_bf16( float8_2_t a ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast16_t uiZ; + struct exp8_sig8_2 normExpSig; + union ui16_f16 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_2UI( uiA ); + exp = expF8_2UI( uiA ); + frac = fracF8_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToBF16UI( &commonNaN ); + } else { + uiZ = packToBF16UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! exp ) { + if ( ! frac ) { + uiZ = packToBF16UI( sign, 0, 0 ); + goto uiZ; + } + normExpSig = softfloat_normSubnormalF8_2Sig( frac ); + exp = normExpSig.exp - 1; + frac = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uiZ = packToBF16UI( sign, exp + 0x70, (uint_fast32_t) frac<<5 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/f8_2_to_f8_1.c b/softfloat_8/f8_2_to_f8_1.c new file mode 100644 index 0000000000..eb3f6fb2b6 --- /dev/null +++ b/softfloat_8/f8_2_to_f8_1.c @@ -0,0 +1,52 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t f8_2_to_f8_1( float8_2_t a ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast8_t uiZ, frac8; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_2UI( uiA ); + exp = expF8_2UI( uiA ); + frac = fracF8_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + if ( frac ) { + softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + } else { + uiZ = packToF8_1UI( sign, 0x0F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac8 = frac<<4; + if ( ! (exp | frac8) ) { + uiZ = packToF8_1UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF8_1( sign, exp - 0x09, frac8 | 0x40 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/f8_2_to_i16.c b/softfloat_8/f8_2_to_i16.c new file mode 100644 index 0000000000..c6c84b458e --- /dev/null +++ b/softfloat_8/f8_2_to_i16.c @@ -0,0 +1,22 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +int_fast16_t f8_2_to_i16( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + int_fast32_t sig32 = f8_2_to_i32(a, roundingMode, exact); + + if (sig32 > INT16_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i16_fromPosOverflow; + } else if (sig32 < INT16_MIN) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i16_fromNegOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_2_to_i32.c b/softfloat_8/f8_2_to_i32.c new file mode 100644 index 0000000000..086c9c3c4c --- /dev/null +++ b/softfloat_8/f8_2_to_i32.c @@ -0,0 +1,52 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int_fast32_t f8_2_to_i32( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + int_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_2UI( uiA ); + exp = expF8_2UI( uiA ); + frac = fracF8_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x04; + shiftDist = exp - 0x11; + if ( 0 <= shiftDist ) { + sig32 <<= shiftDist; + return sign ? -sig32 : sig32; + } + shiftDist = exp - 0x05; + if ( 0 < shiftDist ) sig32 <<= shiftDist; + } + return + softfloat_roundToI32( + sign, (uint_fast32_t) sig32, roundingMode, exact ); + +} + diff --git a/softfloat_8/f8_2_to_i8.c b/softfloat_8/f8_2_to_i8.c new file mode 100644 index 0000000000..1767b0d216 --- /dev/null +++ b/softfloat_8/f8_2_to_i8.c @@ -0,0 +1,22 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +int_fast8_t f8_2_to_i8( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + int_fast32_t sig32 = f8_2_to_i32(a, roundingMode, exact); + + if (sig32 > INT8_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i8_fromPosOverflow; + } else if (sig32 < INT8_MIN) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return i8_fromNegOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_2_to_ui16.c b/softfloat_8/f8_2_to_ui16.c new file mode 100644 index 0000000000..e63a58bdd7 --- /dev/null +++ b/softfloat_8/f8_2_to_ui16.c @@ -0,0 +1,19 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +uint_fast16_t f8_2_to_ui16( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + uint_fast32_t sig32 = f8_2_to_ui32(a, roundingMode, exact); + + if (sig32 > UINT16_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return ui16_fromPosOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/f8_2_to_ui32.c b/softfloat_8/f8_2_to_ui32.c new file mode 100644 index 0000000000..bdc970cec0 --- /dev/null +++ b/softfloat_8/f8_2_to_ui32.c @@ -0,0 +1,49 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast32_t f8_2_to_ui32( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + union ui8_f8_2 uA; + uint_fast8_t uiA; + bool sign; + int_fast8_t exp; + uint_fast8_t frac; + uint_fast32_t sig32; + int_fast8_t shiftDist; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signF8_2UI( uiA ); + exp = expF8_2UI( uiA ); + frac = fracF8_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0x1F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? ui32_fromNaN + : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + sig32 = frac; + if ( exp ) { + sig32 |= 0x04; + shiftDist = exp - 0x11; + if ( (0 <= shiftDist) && ! sign ) { + return sig32< +#include "specialize.h" +#include "softfloat.h" + +uint_fast8_t f8_2_to_ui8( float8_2_t a, uint_fast8_t roundingMode, bool exact ) +{ + uint_fast8_t old_flags = softfloat_exceptionFlags; + + uint_fast32_t sig32 = f8_2_to_ui32(a, roundingMode, exact); + + if (sig32 > UINT8_MAX) { + softfloat_exceptionFlags = old_flags | softfloat_flag_invalid; + return ui8_fromPosOverflow; + } else { + return sig32; + } +} + diff --git a/softfloat_8/i16_to_f8_1.c b/softfloat_8/i16_to_f8_1.c new file mode 100644 index 0000000000..85ed47860e --- /dev/null +++ b/softfloat_8/i16_to_f8_1.c @@ -0,0 +1,35 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t i16_to_f8_1( int16_t a ) +{ + bool sign; + uint_fast16_t absA; + int_fast8_t shiftDist; + union ui8_f8_1 u; + uint_fast8_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast16_t) a : (uint_fast16_t) a; + shiftDist = softfloat_countLeadingZeros16( absA ) - 12; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_1UI( + sign, 0x09 - shiftDist, (uint_fast8_t) absA<>(-shiftDist) + | ((uint32_t) (absA<<(shiftDist & 15)) != 0) + : (uint_fast8_t) absA< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t i16_to_f8_2( int16_t a ) +{ + bool sign; + uint_fast16_t absA; + int_fast8_t shiftDist; + union ui8_f8_2 u; + uint_fast8_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast16_t) a : (uint_fast16_t) a; + shiftDist = softfloat_countLeadingZeros16( absA ) - 13; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_2UI( + sign, 0x10 - shiftDist, (uint_fast8_t) absA<>(-shiftDist) + | ((uint32_t) (absA<<(shiftDist & 15)) != 0) + : (uint_fast8_t) absA< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t i32_to_f8_1( int32_t a ) +{ + bool sign; + uint_fast32_t absA; + int_fast8_t shiftDist; + union ui8_f8_1 u; + uint_fast8_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) - 28; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_1UI( + sign, 0x09 - shiftDist, (uint_fast8_t) absA<>(-shiftDist) + | ((uint32_t) (absA<<(shiftDist & 31)) != 0) + : (uint_fast8_t) absA< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t i32_to_f8_2( int32_t a ) +{ + bool sign; + uint_fast32_t absA; + int_fast8_t shiftDist; + union ui8_f8_2 u; + uint_fast8_t sig; + + sign = (a < 0); + absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a; + shiftDist = softfloat_countLeadingZeros32( absA ) - 29; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_2UI( + sign, 0x10 - shiftDist, (uint_fast8_t) absA<>(-shiftDist) + | ((uint32_t) (absA<<(shiftDist & 31)) != 0) + : (uint_fast8_t) absA< +#include +#include "softfloat/internals.h" +#include "primitives.h" +#include "softfloat_types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +union ui8_f8_1 { uint8_t ui; float8_1_t f; }; // 1-4-3 +union ui8_f8_2 { uint8_t ui; float8_2_t f; }; // 1-5-2 + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ + +#define signF8_1UI( a ) ((bool) ((uint8_t) (a)>>7)) +#define expF8_1UI( a ) ((int_fast8_t) ((a)>>3) & 0x0F) +#define fracF8_1UI( a ) ((a) & 0x07) +#define packToF8_1UI( sign, exp, sig ) (((uint8_t) (sign)<<7) + ((uint8_t) (exp)<<3) + (sig)) + +#define isNaNF8_1UI( a ) (((~(a) & 0x78) == 0) && ((a) & 0x07)) + +struct exp8_sig8_1 { int_fast8_t exp; uint_fast8_t sig; }; +struct exp8_sig8_1 softfloat_normSubnormalF8_1Sig( uint_fast8_t ); + +float8_1_t softfloat_roundPackToF8_1( bool, int_fast8_t, uint_fast8_t ); +float8_1_t softfloat_normRoundPackToF8_1( bool, int_fast8_t, uint_fast8_t ); + +float8_1_t softfloat_addMagsF8_1( uint_fast8_t, uint_fast8_t ); +float8_1_t softfloat_subMagsF8_1( uint_fast8_t, uint_fast8_t ); +float8_1_t + softfloat_mulAddF8_1( + uint_fast8_t, uint_fast8_t, uint_fast8_t, uint_fast8_t ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signF8_2UI( a ) ((bool) ((uint8_t) (a)>>7)) +#define expF8_2UI( a ) ((int_fast8_t) ((a)>>2) & 0x1F) +#define fracF8_2UI( a ) ((a) & 0x03) +#define packToF8_2UI( sign, exp, sig ) (((uint8_t) (sign)<<7) + ((uint8_t) (exp)<<2) + (sig)) + +#define isNaNF8_2UI( a ) (((~(a) & 0x7C) == 0) && ((a) & 0x03)) + +struct exp8_sig8_2 { int_fast8_t exp; uint_fast8_t sig; }; +struct exp8_sig8_2 softfloat_normSubnormalF8_2Sig( uint_fast8_t ); + +float8_2_t softfloat_roundPackToF8_2( bool, int_fast8_t, uint_fast8_t ); +float8_2_t softfloat_normRoundPackToF8_2( bool, int_fast8_t, uint_fast8_t ); + +float8_2_t softfloat_addMagsF8_2( uint_fast8_t, uint_fast8_t ); +float8_2_t softfloat_subMagsF8_2( uint_fast8_t, uint_fast8_t ); +float8_2_t + softfloat_mulAddF8_2( + uint_fast8_t, uint_fast8_t, uint_fast8_t, uint_fast8_t ); + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------- +*----------------------------------------------------------------------------*/ +#define signBF16_2UI( a ) ((bool) ((uint16_t) (a)>>15)) +#define expBF16_2UI( a ) ((int_fast8_t) ((a)>>7) & 0xFF) +#define fracBF16_2UI( a ) ((a) & 0x7F) +#define packToBF16UI( sign, exp, sig ) (((uint16_t) (sign)<<15) + ((uint16_t) (exp)<<7) + (sig)) + + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/softfloat_8/primitives.h b/softfloat_8/primitives.h new file mode 100644 index 0000000000..d17b1fa3e1 --- /dev/null +++ b/softfloat_8/primitives.h @@ -0,0 +1,74 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef primitives_8_h +#define primitives_8_h 1 + +#include +#include +#include "softfloat/primitives.h" +#include "primitiveTypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef softfloat_shiftRightJam16 +/*---------------------------------------------------------------------------- +| Shifts 'a' right by the number of bits given in 'dist', which must not +| be zero. If any nonzero bits are shifted off, they are "jammed" into the +| least-significant bit of the shifted value by setting the least-significant +| bit to 1. This shifted-and-jammed value is returned. +| The value of 'dist' can be arbitrarily large. In particular, if 'dist' is +| greater than 16, the result will be either 0 or 1, depending on whether 'a' +| is zero or nonzero. +*----------------------------------------------------------------------------*/ +#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) +INLINE uint16_t softfloat_shiftRightJam16( uint16_t a, uint_fast8_t dist ) +{ + return + (dist < 15) ? a>>dist | ((uint16_t) (a<<(-dist & 15)) != 0) : (a != 0); +} +#else +uint16_t softfloat_shiftRightJam16( uint16_t a, uint_fast8_t dist ); +#endif +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/softfloat_8/s_addMagsF8_1.c b/softfloat_8/s_addMagsF8_1.c new file mode 100644 index 0000000000..0b86d2f787 --- /dev/null +++ b/softfloat_8/s_addMagsF8_1.c @@ -0,0 +1,148 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) +{ + int_fast8_t expA; + uint_fast8_t sigA; + int_fast8_t expB; + uint_fast8_t sigB; + int_fast8_t expDiff; + uint_fast8_t uiZ; + bool signZ; + int_fast8_t expZ; + uint_fast8_t sigZ; + uint_fast8_t sigX, sigY; + int_fast8_t shiftDist; + uint_fast16_t sig16Z; + int_fast8_t roundingMode; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); + expB = expF8_1UI( uiB ); + sigB = fracF8_1UI( uiB ); + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! expA ) { + uiZ = uiA + sigB; + goto uiZ; + } + if ( expA == 0x0F ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + signZ = signF8_1UI( uiA ); + expZ = expA; + sigZ = 0x10 + sigA + sigB; + if ( ! (sigZ & 1) && (expZ < 0x0E) ) { + sigZ >>= 1; + goto pack; + } + sigZ <<= 2; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF8_1UI( uiA ); + if ( expDiff < 0 ) { /*exp B > exp A*/ + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + goto uiZ; + } + if ( expDiff <= -5 ) { + uiZ = packToF8_1UI( signZ, expB, sigB ); + if ( expA | sigA ) goto addEpsilon; + goto uiZ; + } + expZ = expB; + sigX = sigB | 0x08; + sigY = sigA + (expA ? 0x08 : sigA); + shiftDist = 10 + expDiff; + } else { /*exp B < exp A*/ + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + uiZ = uiA; + if ( expA == 0x0F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + if ( 5 <= expDiff ) { + if ( expB | sigB ) goto addEpsilon; + goto uiZ; + } + expZ = expA; + sigX = sigA | 0x08; + sigY = sigB + (expB ? 0x08 : sigB); + shiftDist = 10 - expDiff; + } + sig16Z = + ((uint_fast16_t) sigX<<10) + ((uint_fast16_t) sigY<>8; + if ( sig16Z & 0xFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0x7) && (expZ < 0x0E) ) { + sigZ >>= 3; + goto pack; + } + } + } + return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_1UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + addEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + roundingMode + == (signF8_1UI( uiZ ) ? softfloat_round_min + : softfloat_round_max) + ) { + ++uiZ; + if ( (uint8_t) (uiZ<<1) == 0xF0 ) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + } + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ |= 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF8_1UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/s_addMagsF8_2.c b/softfloat_8/s_addMagsF8_2.c new file mode 100644 index 0000000000..8c1a6036b0 --- /dev/null +++ b/softfloat_8/s_addMagsF8_2.c @@ -0,0 +1,148 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t softfloat_addMagsF8_2( uint_fast8_t uiA, uint_fast8_t uiB) +{ + int_fast8_t expA; + uint_fast8_t sigA; + int_fast8_t expB; + uint_fast8_t sigB; + int_fast8_t expDiff; + uint_fast8_t uiZ; + bool signZ; + int_fast8_t expZ; + uint_fast8_t sigZ; + uint_fast8_t sigX, sigY; + int_fast8_t shiftDist; + uint_fast16_t sig16Z; + int_fast8_t roundingMode; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + expB = expF8_2UI( uiB ); + sigB = fracF8_2UI( uiB ); + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( ! expA ) { + uiZ = uiA + sigB; + goto uiZ; + } + if ( expA == 0x1F ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + signZ = signF8_2UI( uiA ); + expZ = expA; + sigZ = 0x08 + sigA + sigB; + if ( ! (sigZ & 1) && (expZ < 0x1E) ) { + sigZ >>= 1; + goto pack; + } + sigZ <<= 3; + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + signZ = signF8_2UI( uiA ); + if ( expDiff < 0 ) { /*exp B > exp A*/ + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF8_2UI( signZ, 0x1F, 0 ); + goto uiZ; + } + if ( expDiff <= -10 ) { + uiZ = packToF8_2UI( signZ, expB, sigB ); + if ( expA | sigA ) goto addEpsilon; + goto uiZ; + } + expZ = expB; + sigX = sigB | 0x04; + sigY = sigA + (expA ? 0x04 : sigA); + shiftDist = 11 + expDiff; + } else { /*exp B < exp A*/ + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + uiZ = uiA; + if ( expA == 0x1F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + if ( 10 <= expDiff ) { + if ( expB | sigB ) goto addEpsilon; + goto uiZ; + } + expZ = expA; + sigX = sigA | 0x04; + sigY = sigB + (expB ? 0x04 : sigB); + shiftDist = 11 - expDiff; + } + sig16Z = + ((uint_fast16_t) sigX<<11) + ((uint_fast16_t) sigY<>8; + if ( sig16Z & 0xFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0xF) && (expZ < 0x1E) ) { + sigZ >>= 4; + goto pack; + } + } + } + return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_2UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + addEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + roundingMode + == (signF8_2UI( uiZ ) ? softfloat_round_min + : softfloat_round_max) + ) { + ++uiZ; + if ( (uint8_t) (uiZ<<1) == 0xF8 ) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + } + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ |= 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF8_2UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/s_mulAddF8_1.c b/softfloat_8/s_mulAddF8_1.c new file mode 100644 index 0000000000..b8d3f80916 --- /dev/null +++ b/softfloat_8/s_mulAddF8_1.c @@ -0,0 +1,188 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t softfloat_mulAddF8_1( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_t uiC, uint_fast8_t op) +{ + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signC; + int_fast8_t expC; + uint_fast8_t sigC; + bool signProd; + uint_fast8_t magBits, uiZ; + struct exp8_sig8_1 normExpSig; + int_fast8_t expProd; + uint_fast16_t sigProd; + bool signZ; + int_fast8_t expZ; + uint_fast8_t sigZ; + int_fast8_t expDiff; + uint_fast16_t sig16Z, sig16C; + int_fast8_t shiftDist; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF8_1UI( uiA ); + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); + signB = signF8_1UI( uiB ); + expB = expF8_1UI( uiB ); + sigB = fracF8_1UI( uiB ); + signC = signF8_1UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF8_1UI( uiC ); + sigC = fracF8_1UI( uiC ); + signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x0F ) { //controlla se è un NaN o inf + if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x0F ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF8_1Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expProd = expA + expB - 0x6; + sigA = (sigA | 0x08)<<3; + sigB = (sigB | 0x08)<<3; + sigProd = (uint_fast16_t) sigA * sigB; + if ( sigProd < 0x2000 ) { + --expProd; + sigProd <<= 1; + } + signZ = signProd; + if ( ! expC ) { + if ( ! sigC ) { + expZ = expProd - 1; + sigZ = sigProd>>7 | ((sigProd & 0x7F) != 0); + goto roundPack; + } + normExpSig = softfloat_normSubnormalF8_1Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | 0x08)<<2; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expProd - expC; + if ( signProd == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + expZ = expC; + sigZ = sigC + softfloat_shiftRightJam16( sigProd, 8 - expDiff ); + } else { + expZ = expProd; + sig16Z = + sigProd + + softfloat_shiftRightJam16( + (uint_fast16_t) sigC<<8, expDiff ); + sigZ = sig16Z>>8 | ((sig16Z & 0xFF) != 0 ); + } + if ( sigZ < 0x40 ) { + --expZ; + sigZ <<= 1; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig16C = (uint_fast16_t) sigC<<8; + if ( expDiff < 0 ) { + signZ = signC; + expZ = expC; + sig16Z = sig16C - softfloat_shiftRightJam16( sigProd, -expDiff ); + } else if ( ! expDiff ) { + expZ = expProd; + sig16Z = sigProd - sig16C; + if ( ! sig16Z ) goto completeCancellation; + if ( sig16Z & 0x8000 ) { + signZ = ! signZ; + sig16Z = -sig16Z; + } + } else { + expZ = expProd; + sig16Z = sigProd - softfloat_shiftRightJam16( sig16C, expDiff ); + } + shiftDist = softfloat_countLeadingZeros16( sig16Z ) - 1; + expZ -= shiftDist; + shiftDist -= 8; + if ( shiftDist < 0 ) { + sigZ = + sig16Z>>(-shiftDist) + | ((uint16_t) (sig16Z<<(shiftDist & 15)) != 0); + } else { + sigZ = (uint_fast8_t) sig16Z< +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t softfloat_mulAddF8_2( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_t uiC, uint_fast8_t op) +{ + bool signA; + int_fast8_t expA; + uint_fast8_t sigA; + bool signB; + int_fast8_t expB; + uint_fast8_t sigB; + bool signC; + int_fast8_t expC; + uint_fast8_t sigC; + bool signProd; + uint_fast8_t magBits, uiZ; + struct exp8_sig8_2 normExpSig; + int_fast8_t expProd; + uint_fast16_t sigProd; + bool signZ; + int_fast8_t expZ; + uint_fast8_t sigZ; + int_fast8_t expDiff; + uint_fast16_t sig16Z, sig16C; + int_fast8_t shiftDist; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + signA = signF8_2UI( uiA ); + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + signB = signF8_2UI( uiB ); + expB = expF8_2UI( uiB ); + sigB = fracF8_2UI( uiB ); + signC = signF8_2UI( uiC ) ^ (op == softfloat_mulAdd_subC); + expC = expF8_2UI( uiC ); + sigC = fracF8_2UI( uiC ); + signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( expA == 0x1F ) { //controlla se è un NaN o inf + if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x1F ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x1F ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( ! expA ) { + if ( ! sigA ) goto zeroProd; + normExpSig = softfloat_normSubnormalF8_2Sig( sigA ); + expA = normExpSig.exp; + sigA = normExpSig.sig; + } + if ( ! expB ) { + if ( ! sigB ) goto zeroProd; + normExpSig = softfloat_normSubnormalF8_2Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expProd = expA + expB - 0xE; + sigA = (sigA | 0x04)<<4; + sigB = (sigB | 0x04)<<4; + sigProd = (uint_fast16_t) sigA * sigB; + if ( sigProd < 0x2000 ) { + --expProd; + sigProd <<= 1; + } + signZ = signProd; + if ( ! expC ) { + if ( ! sigC ) { + expZ = expProd - 1; + sigZ = sigProd>>7 | ((sigProd & 0x7F) != 0); + goto roundPack; + } + normExpSig = softfloat_normSubnormalF8_2Sig( sigC ); + expC = normExpSig.exp; + sigC = normExpSig.sig; + } + sigC = (sigC | 0x04)<<3; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expProd - expC; //???? + if ( signProd == signC ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expDiff <= 0 ) { + expZ = expC; + sigZ = sigC + softfloat_shiftRightJam16( sigProd, 8 - expDiff ); + } else { + expZ = expProd; + sig16Z = + sigProd + + softfloat_shiftRightJam16( + (uint_fast16_t) sigC<<8, expDiff ); + sigZ = sig16Z>>8 | ((sig16Z & 0xFF) != 0 ); + } + if ( sigZ < 0x40 ) { + --expZ; + sigZ <<= 1; + } + } else { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + sig16C = (uint_fast16_t) sigC<<8; + if ( expDiff < 0 ) { + signZ = signC; + expZ = expC; + sig16Z = sig16C - softfloat_shiftRightJam16( sigProd, -expDiff ); + } else if ( ! expDiff ) { + expZ = expProd; + sig16Z = sigProd - sig16C; + if ( ! sig16Z ) goto completeCancellation; + if ( sig16Z & 0x8000 ) { + signZ = ! signZ; + sig16Z = -sig16Z; + } + } else { + expZ = expProd; + sig16Z = sigProd - softfloat_shiftRightJam16( sig16C, expDiff ); + } + shiftDist = softfloat_countLeadingZeros16( sig16Z ) - 1; + expZ -= shiftDist; + shiftDist -= 8; + if ( shiftDist < 0 ) { + sigZ = + sig16Z>>(-shiftDist) + | ((uint16_t) (sig16Z<<(shiftDist & 15)) != 0); + } else { + sigZ = (uint_fast8_t) sig16Z< +#include +#include "platform.h" +#include "internals.h" + +float8_1_t softfloat_normRoundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig ) +{ + int_fast8_t shiftDist; + union ui8_f8_1 uZ; + + shiftDist = softfloat_countLeadingZeros8[sig] - 1; + exp -= shiftDist; + if ( (3 <= shiftDist) && ((unsigned int) exp < 0x0D) ) { + uZ.ui = packToF8_1UI( sign, sig ? exp : 0, sig<<(shiftDist - 3) ); + return uZ.f; + } else { + return softfloat_roundPackToF8_1( sign, exp, sig< +#include +#include "platform.h" +#include "internals.h" + +float8_2_t softfloat_normRoundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig ) +{ + int_fast8_t shiftDist; + union ui8_f8_2 uZ; + + shiftDist = softfloat_countLeadingZeros8[sig] - 1; + exp -= shiftDist; + if ( (4 <= shiftDist) && ((unsigned int) exp < 0x1D) ) { + uZ.ui = packToF8_2UI( sign, sig ? exp : 0, sig<<(shiftDist - 4) ); + return uZ.f; + } else { + return softfloat_roundPackToF8_2( sign, exp, sig< +#include "platform.h" +#include "internals.h" + +struct exp8_sig8_1 softfloat_normSubnormalF8_1Sig( uint_fast8_t sig ) //normalizza la mantissa di un numero denormalizzato? +{ + int_fast8_t shiftDist; + struct exp8_sig8_1 z; + + shiftDist = softfloat_countLeadingZeros8[sig] - 4; /* sottraggo il numero di bit dell'esponente*/ + z.exp = 1 - shiftDist; + z.sig = sig< +#include "platform.h" +#include "internals.h" + +struct exp8_sig8_2 softfloat_normSubnormalF8_2Sig( uint_fast8_t sig ) //normalizza la mantissa di un numero denormalizzato? +{ + int_fast8_t shiftDist; + struct exp8_sig8_2 z; + + shiftDist = softfloat_countLeadingZeros8[sig] - 5; /* sottraggo il numero di bit dell'esponente*/ + z.exp = 1 - shiftDist; + z.sig = sig< +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 8-bit type_1 floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast8_t + softfloat_propagateNaNF8_1UI( uint_fast8_t uiA, uint_fast8_t uiB ) +{ + + if ( softfloat_isSigNaNF8_1UI( uiA ) || softfloat_isSigNaNF8_1UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF8_1UI; + +} diff --git a/softfloat_8/s_propagateNaNF8_2UI.c b/softfloat_8/s_propagateNaNF8_2UI.c new file mode 100644 index 0000000000..7b0a1ec3d6 --- /dev/null +++ b/softfloat_8/s_propagateNaNF8_2UI.c @@ -0,0 +1,22 @@ + +#include +#include "platform.h" +#include "specialize.h" +#include "softfloat.h" + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 8-bit type_2 floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast8_t + softfloat_propagateNaNF8_2UI( uint_fast8_t uiA, uint_fast8_t uiB ) +{ + + if ( softfloat_isSigNaNF8_2UI( uiA ) || softfloat_isSigNaNF8_2UI( uiB ) ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + } + return defaultNaNF8_2UI; + +} diff --git a/softfloat_8/s_roundPackToF8_1.c b/softfloat_8/s_roundPackToF8_1.c new file mode 100644 index 0000000000..4c3ebf188c --- /dev/null +++ b/softfloat_8/s_roundPackToF8_1.c @@ -0,0 +1,79 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t softfloat_roundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast8_t roundIncrement, roundBits; + bool isTiny; + uint_fast8_t uiZ; + union ui8_f8_1 uZ; + + + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + roundIncrement = 0x4; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? 0x7 + : 0; + } + roundBits = sig & 0x7; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x0D <= (unsigned int) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x80); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0x7; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( (0x0D < exp) || (0x80 <= sig + roundIncrement) ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0 ) - ! roundIncrement; + goto uiZ; + } + } + +/*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + + sig = (sig + roundIncrement)>>3; + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + sig &= ~(uint_fast8_t) (! (roundBits ^ 0x4) & roundNearEven); + if ( ! sig ) exp = 0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ = packToF8_1UI( sign, exp, sig ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + + + +} \ No newline at end of file diff --git a/softfloat_8/s_roundPackToF8_2.c b/softfloat_8/s_roundPackToF8_2.c new file mode 100644 index 0000000000..0b2955f96b --- /dev/null +++ b/softfloat_8/s_roundPackToF8_2.c @@ -0,0 +1,79 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t softfloat_roundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig ) +{ + uint_fast8_t roundingMode; + bool roundNearEven; + uint_fast8_t roundIncrement, roundBits; + bool isTiny; + uint_fast8_t uiZ; + union ui8_f8_2 uZ; + + + roundingMode = softfloat_roundingMode; + roundNearEven = (roundingMode == softfloat_round_near_even); + roundIncrement = 0x8; + if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) { + roundIncrement = + (roundingMode + == (sign ? softfloat_round_min : softfloat_round_max)) + ? 0xF + : 0; + } + roundBits = sig & 0xF; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( 0x1D <= (unsigned int) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x80); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0xF; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( (0x1D < exp) || (0x80 <= sig + roundIncrement) ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1F, 0 ) - ! roundIncrement; + goto uiZ; + } + } + +/*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + + sig = (sig + roundIncrement)>>4; + if ( roundBits ) { + softfloat_exceptionFlags |= softfloat_flag_inexact; +#ifdef SOFTFLOAT_ROUND_ODD + if ( roundingMode == softfloat_round_odd ) { + sig |= 1; + goto packReturn; + } +#endif + } + sig &= ~(uint_fast8_t) (! (roundBits ^ 0x8) & roundNearEven); + if ( ! sig ) exp = 0; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + packReturn: + uiZ = packToF8_2UI( sign, exp, sig ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + + + +} \ No newline at end of file diff --git a/softfloat_8/s_subMagsF8_1.c b/softfloat_8/s_subMagsF8_1.c new file mode 100644 index 0000000000..7062d07db6 --- /dev/null +++ b/softfloat_8/s_subMagsF8_1.c @@ -0,0 +1,151 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t softfloat_subMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB ) +{ + int_fast8_t expA; + uint_fast8_t sigA; + int_fast8_t expB; + uint_fast8_t sigB; + int_fast8_t expDiff; + uint_fast8_t uiZ; + int_fast8_t sigDiff; + bool signZ; + int_fast8_t shiftDist, expZ; + uint_fast8_t sigZ, sigX, sigY; + uint_fast16_t sig16Z; + int_fast8_t roundingMode; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF8_1UI( uiA ); + sigA = fracF8_1UI( uiA ); + expB = expF8_1UI( uiB ); + sigB = fracF8_1UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expA == 0x0F ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + goto uiZ; + } + sigDiff = sigA - sigB; + if ( ! sigDiff ) { + uiZ = + packToF8_1UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + goto uiZ; + } + if ( expA ) --expA; + signZ = signF8_1UI( uiA ); + if ( sigDiff < 0 ) { + signZ = ! signZ; + sigDiff = -sigDiff; + } + shiftDist = softfloat_countLeadingZeros8[sigDiff] - 4; + expZ = expA - shiftDist; + if ( expZ < 0 ) { + shiftDist = expA; + expZ = 0; + } + sigZ = sigDiff<>8; + if ( sig16Z & 0xFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0x7) && ((unsigned int) expZ < 0x0E) ) { + sigZ >>= 3; + goto pack; + } + } + return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_1UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + subEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + (roundingMode == softfloat_round_minMag) + || (roundingMode + == (signF8_1UI( uiZ ) ? softfloat_round_max + : softfloat_round_min)) + ) { + --uiZ; + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ = (uiZ - 1) | 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF8_1UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/s_subMagsF8_2.c b/softfloat_8/s_subMagsF8_2.c new file mode 100644 index 0000000000..67c56d6974 --- /dev/null +++ b/softfloat_8/s_subMagsF8_2.c @@ -0,0 +1,151 @@ + +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t softfloat_subMagsF8_2( uint_fast8_t uiA, uint_fast8_t uiB ) +{ + int_fast8_t expA; + uint_fast8_t sigA; + int_fast8_t expB; + uint_fast8_t sigB; + int_fast8_t expDiff; + uint_fast8_t uiZ; + int_fast8_t sigDiff; + bool signZ; + int_fast8_t shiftDist, expZ; + uint_fast8_t sigZ, sigX, sigY; + uint_fast16_t sig16Z; + int_fast8_t roundingMode; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expA = expF8_2UI( uiA ); + sigA = fracF8_2UI( uiA ); + expB = expF8_2UI( uiB ); + sigB = fracF8_2UI( uiB ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + expDiff = expA - expB; + if ( ! expDiff ) { + /*-------------------------------------------------------------------- + *--------------------------------------------------------------------*/ + if ( expA == 0x1F ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_2UI; + goto uiZ; + } + sigDiff = sigA - sigB; + if ( ! sigDiff ) { + uiZ = + packToF8_2UI( + (softfloat_roundingMode == softfloat_round_min), 0, 0 ); + goto uiZ; + } + if ( expA ) --expA; + signZ = signF8_2UI( uiA ); + if ( sigDiff < 0 ) { + signZ = ! signZ; + sigDiff = -sigDiff; + } + shiftDist = softfloat_countLeadingZeros8[sigDiff] - 5; + expZ = expA - shiftDist; + if ( expZ < 0 ) { + shiftDist = expA; + expZ = 0; + } + sigZ = sigDiff<>8; + if ( sig16Z & 0xFF ) { + sigZ |= 1; + } else { + if ( ! (sigZ & 0xF) && ((unsigned int) expZ < 0x1E) ) { + sigZ >>= 4; + goto pack; + } + } + return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + propagateNaN: + uiZ = softfloat_propagateNaNF8_2UI( uiA, uiB ); + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + subEpsilon: + roundingMode = softfloat_roundingMode; + if ( roundingMode != softfloat_round_near_even ) { + if ( + (roundingMode == softfloat_round_minMag) + || (roundingMode + == (signF8_2UI( uiZ ) ? softfloat_round_max + : softfloat_round_min)) + ) { + --uiZ; + } +#ifdef SOFTFLOAT_ROUND_ODD + else if ( roundingMode == softfloat_round_odd ) { + uiZ = (uiZ - 1) | 1; + } +#endif + } + softfloat_exceptionFlags |= softfloat_flag_inexact; + goto uiZ; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + pack: + uiZ = packToF8_2UI( signZ, expZ, sigZ ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} diff --git a/softfloat_8/softfloat.h b/softfloat_8/softfloat.h new file mode 100644 index 0000000000..7ad84697e7 --- /dev/null +++ b/softfloat_8/softfloat.h @@ -0,0 +1,221 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the +University of California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + + +/*============================================================================ +| Note: If SoftFloat is made available as a general library for programs to +| use, it is strongly recommended that a platform-specific version of this +| header, "softfloat.h", be created that folds in "softfloat_types.h" and that +| eliminates all dependencies on compile-time macros. +*============================================================================*/ + + +#ifndef softfloat_8_h +#define softfloat_8_h 1 + +#include +#include +#include "softfloat/softfloat.h" +#include "softfloat_types.h" + +#ifndef THREAD_LOCAL +#define THREAD_LOCAL +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/*---------------------------------------------------------------------------- +| Integer-to-floating-point conversion routines. +*----------------------------------------------------------------------------*/ +float8_1_t ui16_to_f8_1( uint16_t ); +float8_2_t ui16_to_f8_2( uint16_t ); +float8_1_t ui32_to_f8_1( uint32_t ); +float8_2_t ui32_to_f8_2( uint32_t ); +float8_1_t ui64_to_f8_1( uint64_t ); +float8_2_t ui64_to_f8_2( uint64_t ); + +float8_1_t i16_to_f8_1( int16_t ); +float8_2_t i16_to_f8_2( int16_t ); +float8_1_t i32_to_f8_1( int32_t ); +float8_2_t i32_to_f8_2( int32_t ); +float8_1_t i64_to_f8_1( int64_t ); +float8_2_t i64_to_f8_2( int64_t ); + +/*---------------------------------------------------------------------------- +| 8-bit type_1 floating-point operations. +*----------------------------------------------------------------------------*/ +uint_fast8_t f8_1_to_ui8( float8_1_t, uint_fast8_t, bool ); +uint_fast16_t f8_1_to_ui16( float8_1_t, uint_fast8_t, bool ); +uint_fast32_t f8_1_to_ui32( float8_1_t, uint_fast8_t, bool ); +uint_fast64_t f8_1_to_ui64( float8_1_t, uint_fast8_t, bool ); +int_fast8_t f8_1_to_i8( float8_1_t, uint_fast8_t, bool ); +int_fast16_t f8_1_to_i16( float8_1_t, uint_fast8_t, bool ); +int_fast32_t f8_1_to_i32( float8_1_t, uint_fast8_t, bool ); +int_fast64_t f8_1_to_i64( float8_1_t, uint_fast8_t, bool ); +uint_fast32_t f8_1_to_ui32_r_minMag( float8_1_t, bool ); +uint_fast64_t f8_1_to_ui64_r_minMag( float8_1_t, bool ); +int_fast32_t f8_1_to_i32_r_minMag( float8_1_t, bool ); +int_fast64_t f8_1_to_i64_r_minMag( float8_1_t, bool ); + + +float16_t f8_1_to_f16( float8_1_t ); +float32_t f8_1_to_f32( float8_1_t ); +float64_t f8_1_to_f64( float8_1_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t f8_1_to_extF80( float8_1_t ); +float128_t f8_1_to_f128( float8_1_t ); +#endif +void f8_1_to_extF80M( float8_1_t, extFloat80_t * ); +void f8_1_to_f128M( float8_1_t, float128_t * ); + + +float8_1_t f8_1_roundToInt( float8_1_t, uint_fast8_t, bool ); +float8_1_t f8_1_add( float8_1_t, float8_1_t ); +float8_1_t f8_1_sub( float8_1_t, float8_1_t ); +float8_1_t f8_1_max( float8_1_t, float8_1_t ); +float8_1_t f8_1_min( float8_1_t, float8_1_t ); +float8_1_t f8_1_mul( float8_1_t, float8_1_t ); +float8_1_t f8_1_mulAdd( float8_1_t, float8_1_t, float8_1_t ); +float8_1_t f8_1_div( float8_1_t, float8_1_t ); +float8_1_t f8_1_rem( float8_1_t, float8_1_t ); +float8_1_t f8_1_sqrt( float8_1_t ); +bool f8_1_eq( float8_1_t, float8_1_t ); +bool f8_1_le( float8_1_t, float8_1_t ); +bool f8_1_lt( float8_1_t, float8_1_t ); +bool f8_1_eq_signaling( float8_1_t, float8_1_t ); +bool f8_1_le_quiet( float8_1_t, float8_1_t ); +bool f8_1_lt_quiet( float8_1_t, float8_1_t ); +bool f8_1_isSignalingNaN( float8_1_t ); +uint_fast16_t f8_1_classify( float8_1_t ); +float8_1_t f8_1_rsqrte7( float8_1_t ); +float8_1_t f8_1_recip7( float8_1_t ); + + +float8_1_t f16_to_f8_1( float16_t ); +float8_1_t f32_to_f8_1( float32_t ); +float8_1_t f64_to_f8_1( float64_t ); +float8_1_t extF80_to_f8_1( extFloat80_t ); +float8_1_t extF80M_to_f8_1( const extFloat80_t * ); +float8_1_t f128_to_f8_1( float128_t ); +float8_1_t f128M_to_f8_1( const float128_t * ); + +/*---------------------------------------------------------------------------- +| 8-bit type_2 floating-point operations. +*----------------------------------------------------------------------------*/ +uint_fast8_t f8_2_to_ui8( float8_2_t, uint_fast8_t, bool ); +uint_fast16_t f8_2_to_ui16( float8_2_t, uint_fast8_t, bool ); +uint_fast32_t f8_2_to_ui32( float8_2_t, uint_fast8_t, bool ); +uint_fast64_t f8_2_to_ui64( float8_2_t, uint_fast8_t, bool ); +int_fast8_t f8_2_to_i8( float8_2_t, uint_fast8_t, bool ); +int_fast16_t f8_2_to_i16( float8_2_t, uint_fast8_t, bool ); +int_fast32_t f8_2_to_i32( float8_2_t, uint_fast8_t, bool ); +int_fast64_t f8_2_to_i64( float8_2_t, uint_fast8_t, bool ); +uint_fast32_t f8_2_to_ui32_r_minMag( float8_2_t, bool ); +uint_fast64_t f8_2_to_ui64_r_minMag( float8_2_t, bool ); +int_fast32_t f8_2_to_i32_r_minMag( float8_2_t, bool ); +int_fast64_t f8_2_to_i64_r_minMag( float8_2_t, bool ); + + +float16_t f8_2_to_f16( float8_2_t ); +float32_t f8_2_to_f32( float8_2_t ); +float64_t f8_2_to_f64( float8_2_t ); +#ifdef SOFTFLOAT_FAST_INT64 +extFloat80_t f8_2_to_extF80( float8_2_t ); +float128_t f8_2_to_f128( float8_2_t ); +#endif +void f8_2_to_extF80M( float8_2_t, extFloat80_t * ); +void f8_2_to_f128M( float8_2_t, float128_t * ); + + +float8_2_t f8_2_roundToInt( float8_2_t, uint_fast8_t, bool ); +float8_2_t f8_2_add( float8_2_t, float8_2_t ); +float8_2_t f8_2_sub( float8_2_t, float8_2_t ); +float8_2_t f8_2_max( float8_2_t, float8_2_t ); +float8_2_t f8_2_min( float8_2_t, float8_2_t ); +float8_2_t f8_2_mul( float8_2_t, float8_2_t ); +float8_2_t f8_2_mulAdd( float8_2_t, float8_2_t, float8_2_t ); +float8_2_t f8_2_div( float8_2_t, float8_2_t ); +float8_2_t f8_2_rem( float8_2_t, float8_2_t ); +float8_2_t f8_2_sqrt( float8_2_t ); +bool f8_2_eq( float8_2_t, float8_2_t ); +bool f8_2_le( float8_2_t, float8_2_t ); +bool f8_2_lt( float8_2_t, float8_2_t ); +bool f8_2_eq_signaling( float8_2_t, float8_2_t ); +bool f8_2_le_quiet( float8_2_t, float8_2_t ); +bool f8_2_lt_quiet( float8_2_t, float8_2_t ); +bool f8_2_isSignalingNaN( float8_2_t ); +uint_fast16_t f8_2_classify( float8_2_t ); +float8_2_t f8_2_rsqrte7( float8_2_t ); +float8_2_t f8_2_recip7( float8_2_t ); + + +float8_2_t f16_to_f8_2( float16_t ); +float8_2_t f32_to_f8_2( float32_t ); +float8_2_t f64_to_f8_2( float64_t ); +float8_2_t extF80_to_f8_2( extFloat80_t ); +float8_2_t extF80M_to_f8_2( const extFloat80_t * ); +float8_2_t f128_to_f8_2( float128_t ); +float8_2_t f128M_to_f8_2( const float128_t * ); + +/*---------------------------------------------------------------------------- +| Conversions between 8-bit types +*----------------------------------------------------------------------------*/ +float8_2_t f8_1_to_f8_2( float8_1_t ); +float8_1_t f8_2_to_f8_1( float8_2_t ); + +float16_t f8_1_to_bf16( float8_1_t a ); +float16_t f8_2_to_bf16( float8_2_t a ); + +float8_1_t bf16_to_f8_1( float16_t a ); +float8_2_t bf16_to_f8_2( float16_t a ); + +float8_1_t ui16_to_f8_1( uint16_t a ); +float8_2_t ui16_to_f8_2( uint16_t a ); + +float16_t i8_to_bf16( int8_t a ); +float16_t ui8_to_bf16( uint8_t a ); + +int8_t bf16_to_i8(float16_t input, uint_fast8_t roundingMode); +int8_t bf16_to_ui8(float16_t input, uint_fast8_t roundingMode); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/softfloat_8/softfloat_8.ac b/softfloat_8/softfloat_8.ac new file mode 100644 index 0000000000..e69de29bb2 diff --git a/softfloat_8/softfloat_8.mk.in b/softfloat_8/softfloat_8.mk.in new file mode 100644 index 0000000000..6fcfa32ea7 --- /dev/null +++ b/softfloat_8/softfloat_8.mk.in @@ -0,0 +1,84 @@ +softfloat_8_subproject_deps = \ + softfloat + +softfloat_8_hdrs = \ + internals.h \ + primitives.h \ + softfloat.h \ + softfloat_types.h \ + specialize.h \ + +softfloat_8_c_srcs = \ + bf16_to_f8_1.c \ + bf16_to_f8_2.c \ + bf16_to_i8.c \ + bf16_to_ui8.c \ + f8_1_2_recip7_rsqrte7.c \ + f8_1_add.c \ + f8_1_div.c \ + f8_1_sqrt.c \ + f8_1_classify.c \ + f8_1_eq.c \ + f8_1_le.c \ + f8_1_lt.c \ + f8_1_lt_quiet.c \ + f8_1_max_min.c \ + f8_1_mul.c \ + f8_1_mulAdd.c \ + f8_1_sub.c \ + f8_1_to_bf16.c \ + f8_1_to_f8_2.c \ + f8_1_to_i8.c \ + f8_1_to_i16.c \ + f8_1_to_i32.c \ + f8_1_to_ui8.c \ + f8_1_to_ui16.c \ + f8_1_to_ui32.c \ + f8_2_add.c \ + f8_2_div.c \ + f8_2_sqrt.c \ + f8_2_classify.c \ + f8_2_eq.c \ + f8_2_le.c \ + f8_2_lt.c \ + f8_2_lt_quiet.c \ + f8_2_max_min.c \ + f8_2_mul.c \ + f8_2_mulAdd.c \ + f8_2_sub.c \ + f8_2_to_bf16.c \ + f8_2_to_f8_1.c \ + f8_2_to_i8.c \ + f8_2_to_i16.c \ + f8_2_to_i32.c \ + f8_2_to_ui8.c \ + f8_2_to_ui16.c \ + f8_2_to_ui32.c \ + i8_to_bf16.c \ + i32_to_f8_1.c \ + i32_to_f8_2.c \ + s_addMagsF8_1.c \ + s_addMagsF8_2.c \ + s_mulAddF8_1.c \ + s_mulAddF8_2.c \ + s_normSubnormalF8_1Sig.c \ + s_normSubnormalF8_2Sig.c \ + s_propagateNaNF8_1UI.c \ + s_propagateNaNF8_2UI.c \ + s_roundPackToF8_1.c \ + s_roundPackToF8_2.c \ + s_subMagsF8_1.c \ + s_subMagsF8_2.c \ + ui8_to_bf16.c \ + ui16_to_f8_1.c \ + ui16_to_f8_2.c \ + ui32_to_f8_1.c \ + ui32_to_f8_2.c \ + +softfloat_8_CFLAGS = -fPIC + +softfloat_8_install_shared_lib = yes + +softfloat_8_test_srcs = + +softfloat_8_install_prog_srcs = diff --git a/softfloat_8/softfloat_types.h b/softfloat_8/softfloat_types.h new file mode 100644 index 0000000000..a9fe19ea1b --- /dev/null +++ b/softfloat_8/softfloat_types.h @@ -0,0 +1,54 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef softfloat_8_types_h +#define softfloat_8_types_h 1 + +#include + +/*---------------------------------------------------------------------------- +| Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point +| arguments and results to/from functions. These types must be exactly +| 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively. Where a +| platform has "native" support for IEEE-Standard floating-point formats, +| the types below may, if desired, be defined as aliases for the native types +| (typically 'float' and 'double', and possibly 'long double'). +*----------------------------------------------------------------------------*/ +typedef struct { uint8_t v; } float8_1_t; // 1-4-3 +typedef struct { uint8_t v; } float8_2_t; // 1-5-2 + +#endif + diff --git a/softfloat_8/specialize.h b/softfloat_8/specialize.h new file mode 100644 index 0000000000..d083ccee2f --- /dev/null +++ b/softfloat_8/specialize.h @@ -0,0 +1,117 @@ + +/*============================================================================ + +This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic +Package, Release 3d, by John R. Hauser. + +Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of +California. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions, and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions, and the following disclaimer in the documentation + and/or other materials provided with the distribution. + + 3. Neither the name of the University nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE +DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY +DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +=============================================================================*/ + +#ifndef specialize_8_h +#define specialize_8_h 1 + +#include +#include +#include "softfloat/specialize.h" +#include "primitiveTypes.h" +#include "softfloat.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*---------------------------------------------------------------------------- +| Default value for `softfloat_detectTininess'. +*----------------------------------------------------------------------------*/ +#define init_detectTininess softfloat_tininess_afterRounding + +/*---------------------------------------------------------------------------- +| The values to return on conversions to 8-bit integer formats that raise an +| invalid exception. +*----------------------------------------------------------------------------*/ +#define ui8_fromPosOverflow 0xFF +#define ui8_fromNegOverflow 0 +#define ui8_fromNaN 0xFF +#define i8_fromPosOverflow 0x7F +#define i8_fromNegOverflow (-0x7F - 1) +#define i8_fromNaN 0x7F + +/*---------------------------------------------------------------------------- +| The bit pattern for a default generated 8-bit floating-point NaN. +*----------------------------------------------------------------------------*/ +#define defaultNaNF8_1UI 0x7C +#define defaultNaNF8_2UI 0x7E +#define defaultNaNBF16UI 0x7FC0 + +/*---------------------------------------------------------------------------- +| Returns true when 8-bit unsigned integer `uiA' has the bit pattern of a +| 8-bit floating-point signaling NaN. +| Note: This macro evaluates its argument more than once. +*----------------------------------------------------------------------------*/ +#define softfloat_isSigNaNF8_1UI( uiA ) ((((uiA) & 0x7C) == 0x78) && ((uiA) & 0x03)) +#define softfloat_isSigNaNF8_2UI( uiA ) ((((uiA) & 0x7E) == 0x7C) && ((uiA) & 0x01)) + +/*---------------------------------------------------------------------------- +| Assuming `uiA' has the bit pattern of a 8-bit floating-point NaN, converts +| this NaN to the common NaN form, and stores the resulting common NaN at the +| location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ +#define softfloat_f8_1UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x04) ) softfloat_raiseFlags( softfloat_flag_invalid ) +#define softfloat_f8_2UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x02) ) softfloat_raiseFlags( softfloat_flag_invalid ) +//#define softfloat_bf16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x40) ) softfloat_raiseFlags( softfloat_flag_invalid ) + +/*---------------------------------------------------------------------------- +| Converts the common NaN pointed to by `aPtr' into a 8-bit floating-point +| NaN, and returns the bit pattern of this value as an unsigned integer. +*----------------------------------------------------------------------------*/ +#define softfloat_commonNaNToF8_1UI( aPtr ) ((uint_fast8_t) defaultNaNF8_1UI) +#define softfloat_commonNaNToF8_2UI( aPtr ) ((uint_fast8_t) defaultNaNF8_2UI) +#define softfloat_commonNaNToBF16UI( aPtr ) ((uint_fast16_t) defaultNaNBF16UI) + +/*---------------------------------------------------------------------------- +| Interpreting `uiA' and `uiB' as the bit patterns of two 8-bit floating- +| point values, at least one of which is a NaN, returns the bit pattern of +| the combined NaN result. If either `uiA' or `uiB' has the pattern of a +| signaling NaN, the invalid exception is raised. +*----------------------------------------------------------------------------*/ +uint_fast8_t + softfloat_propagateNaNF8_1UI( uint_fast8_t uiA, uint_fast8_t uiB ); + +uint_fast8_t + softfloat_propagateNaNF8_2UI( uint_fast8_t uiA, uint_fast8_t uiB ); + + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/softfloat_8/ui16_to_f8_1.c b/softfloat_8/ui16_to_f8_1.c new file mode 100644 index 0000000000..83430171ce --- /dev/null +++ b/softfloat_8/ui16_to_f8_1.c @@ -0,0 +1,30 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t ui16_to_f8_1( uint16_t a ) +{ + int_fast8_t shiftDist; + union ui8_f8_1 u; + uint_fast8_t sig; + + shiftDist = softfloat_countLeadingZeros16( a ) - 12; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_1UI( + 0, 0x09 - shiftDist, (uint_fast8_t) a<>(-shiftDist) | ((uint16_t) (a<<(shiftDist & 15)) != 0) + : (uint_fast8_t) a< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t ui16_to_f8_2( uint16_t a ) +{ + int_fast8_t shiftDist; + union ui8_f8_2 u; + uint_fast8_t sig; + + shiftDist = softfloat_countLeadingZeros16( a ) - 13; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_2UI( + 0, 0x10 - shiftDist, (uint_fast8_t) a<>(-shiftDist) | ((uint16_t) (a<<(shiftDist & 15)) != 0) + : (uint_fast8_t) a< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_1_t ui32_to_f8_1( uint32_t a ) +{ + int_fast8_t shiftDist; + union ui8_f8_1 u; + uint_fast8_t sig; + + shiftDist = softfloat_countLeadingZeros32( a ) - 28; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_1UI( + 0, 0x09 - shiftDist, (uint_fast8_t) a<>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0) + : (uint_fast8_t) a< +#include "platform.h" +#include "internals.h" +#include "softfloat.h" + +float8_2_t ui32_to_f8_2( uint32_t a ) +{ + int_fast8_t shiftDist; + union ui8_f8_2 u; + uint_fast8_t sig; + + shiftDist = softfloat_countLeadingZeros32( a ) - 29; + if ( 0 <= shiftDist ) { + u.ui = + a ? packToF8_2UI( + 0, 0x10 - shiftDist, (uint_fast8_t) a<>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0) + : (uint_fast8_t) a< Date: Sat, 17 Feb 2024 09:46:18 +0100 Subject: [PATCH 02/31] added more f8/i8 bfloat16 conversion functions --- softfloat_8/bf16_to_f8_1.c | 269 +++++++++++++++++++++++++++++++++ softfloat_8/bf16_to_f8_1_old.c | 52 +++++++ softfloat_8/bf16_to_f8_2.c | 207 +++++++++++++++++++++++++ softfloat_8/bf16_to_f8_2_old.c | 52 +++++++ softfloat_8/bf16_to_i8.c | 116 ++++++++++++++ softfloat_8/bf16_to_ui8.c | 134 ++++++++++++++++ softfloat_8/i8_to_bf16.c | 59 ++++++++ softfloat_8/ui8_to_bf16.c | 43 ++++++ 8 files changed, 932 insertions(+) create mode 100644 softfloat_8/bf16_to_f8_1.c create mode 100644 softfloat_8/bf16_to_f8_1_old.c create mode 100644 softfloat_8/bf16_to_f8_2.c create mode 100644 softfloat_8/bf16_to_f8_2_old.c create mode 100644 softfloat_8/bf16_to_i8.c create mode 100644 softfloat_8/bf16_to_ui8.c create mode 100644 softfloat_8/i8_to_bf16.c create mode 100644 softfloat_8/ui8_to_bf16.c diff --git a/softfloat_8/bf16_to_f8_1.c b/softfloat_8/bf16_to_f8_1.c new file mode 100644 index 0000000000..049f71fdc7 --- /dev/null +++ b/softfloat_8/bf16_to_f8_1.c @@ -0,0 +1,269 @@ +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int round_f8_1(int sign, int frac, int precision, int inexact, int overflow); + +float8_1_t bf16_to_f8_1( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast16_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast8_t uiZ, frac8_1; + union ui8_f8_1 uZ; + bool zero; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signBF16_2UI( uiA ); + exp = expBF16_2UI( uiA ); + frac = fracBF16_2UI( uiA ); + zero = (exp == 0) && (frac == 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + int inexact = 0; + int precision = 0; + int overflow = 0; + if (exp <= 0x78) { // 0x78 is the largest exponent that converts to a denorm in f8_1 + if (exp == 0x00) { + if (frac != 0x00) { + inexact = 1; + } + exp = 0x0; + frac = 0x0; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if (exp <= 0x75) { + if (exp == 0x75) { + precision = 1; + if (frac != 0) { + inexact = 1; + } + } + else { + inexact = 1; + } + exp = 0x0; + frac = 0x0; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if (exp == 0x76) { + if (frac != 0x00) { + inexact = 1; + if (frac == 0x40) { + precision = 1; + inexact = 0; + } + else if (frac > 0x40) { + precision = 1; + } + } + exp = 0x0; + frac = 0x1; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if (exp == 0x77) { + if (frac < 0x40) { + if (frac != 0x00) { + inexact = 1; + if (frac == 0x20) { + precision = 1; + inexact = 0; + } + else if (frac > 0x20) { + precision = 1; + } + } + exp = 0x0; + frac = 0x2; + uiZ = packToF8_1UI( sign, exp, frac); + } + else { + if (frac != 0x40) { + inexact = 1; + if (frac == 0x60) { + precision = 1; + inexact = 0; + } + else if (frac > 0x60) { + precision = 1; + } + } + exp = 0x0; + frac = 0x3; + uiZ = packToF8_1UI( sign, exp, frac); + } + } + else if (exp == 0x78) { + if (frac < 0x20) { + if (frac != 0x00) { + inexact = 1; + if (frac == 0x10) { + precision = 1; + inexact = 0; + } + else if (frac > 0x10) { + precision = 1; + } + } + exp = 0x0; + frac = 0x4; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if (frac < 0x40) { + if (frac != 0x20) { + inexact = 1; + if (frac == 0x30) { + precision = 1; + inexact = 0; + } + else if (frac > 0x30) { + precision = 1; + } + } + exp = 0x0; + frac = 0x5; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if (frac < 0x60) { + if (frac != 0x40) { + inexact = 1; + if (frac == 0x50) { + precision = 1; + inexact = 0; + } + else if (frac > 0x50) { + precision = 1; + } + } + exp = 0x0; + frac = 0x6; + uiZ = packToF8_1UI( sign, exp, frac); + } + else { + if (frac != 0x60) { + inexact = 1; + if (frac == 0x70) { + precision = 1; + inexact = 0; + } + else if (frac > 0x70) { + precision = 1; + } + } + exp = 0x0; + frac = 0x7; + uiZ = packToF8_1UI( sign, exp, frac); + } + } + } + else if (exp <= 0x86) { // 0x86 is the biggest number in which mantissa is not overflowing + int mask_frac = 0x70; // creates a mask equal to 111_0000 which enables only the mantissa in the core + int mask_precision = 0x8; // creates a mask equal to 000_1000 which enables only the mantissa in the core + int mask_inexact = 0x07; // creates a mask equal to 000_0111 which enables only the mantissa in the core + precision = (frac & mask_precision) >> 3; + inexact = ((frac & mask_inexact) > 0); + exp = exp - 127 + 7; + frac = (frac & mask_frac) >> 4; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if ( exp < 0xFF ) { + exp = 0xE; + frac = 0x7; + uiZ = packToF8_1UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + } + else if (exp == 0xFF) { + if (frac) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + } else { + exp = 0xF; + frac = 0x0; + uiZ = packToF8_1UI( sign, exp, frac); + uZ.ui = uiZ; + return uZ.f; + } + goto uiZ; + } + if ((exp == 0xE && expF8_1UI(uiZ + round_f8_1(sign, frac, precision, inexact, overflow)) == 1) || overflow == 1) { + softfloat_raiseFlags(softfloat_flag_overflow | softfloat_flag_inexact); + } + else if (inexact == 1 || precision == 1) { + softfloat_raiseFlags(softfloat_flag_inexact); + if (exp == 0) { + softfloat_raiseFlags(softfloat_flag_underflow); + } + } + uiZ: + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + if (((uZ.ui >> 3) & 0xF) == 0xF) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + //printf("uiZ = 0x%x, sign = %d, exp = 0x%lx, frac = 0x%x\n", uiZ, sign, exp, frac); + return uZ.f; +} + +int round_f8_1(int sign, int frac, int precision, int inexact, int overflow) { + //printf("frac = 0x%x, precision = %d, inexact = %x\n", frac, precision, inexact); + int round = 0; // round down is the default unless we round up based on the following conditions + if (softfloat_roundingMode == 0) { + if (overflow) { + round = 1; + } + else { + int even_mask = 0x1; // used to mask the mantissa to see if the number is even (i.e. LSB = 0) + if (inexact == 0) { + if (precision == 1) { + if (frac & even_mask == 1) { + round = 1; + } + } + } + else { + if (precision == 1) { // round up + round = 1; + } + } + } + } + else if (softfloat_roundingMode == 1) { + round = 0; + } + else if (softfloat_roundingMode == 2) { + if (sign == 0) { + round = 0; + } + else { + round = precision | inexact; + } + } + else if (softfloat_roundingMode == 3) { + if (sign == 1) { + round = 0; + } + else { + round = precision | inexact; + } + } + else if (softfloat_roundingMode == 4) { + if (precision == 1) { + round = 1; + } + else { + round = 0; + } + } + return round; +} diff --git a/softfloat_8/bf16_to_f8_1_old.c b/softfloat_8/bf16_to_f8_1_old.c new file mode 100644 index 0000000000..9cb875daf8 --- /dev/null +++ b/softfloat_8/bf16_to_f8_1_old.c @@ -0,0 +1,52 @@ +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_1_t bf16_to_f8_1( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast16_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast8_t uiZ, frac8_1; + union ui8_f8_1 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signBF16_2UI( uiA ); + exp = expBF16_2UI( uiA ); + frac = fracBF16_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + } else { + uiZ = packToF8_1UI( sign, 0xF, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac8_1 = frac | ((frac & 0x00) != 0); + if ( ! (exp | frac8_1) ) { + uiZ = packToF8_1UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF8_1( sign, exp - 0x78, frac8_1 | 0x40 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/bf16_to_f8_2.c b/softfloat_8/bf16_to_f8_2.c new file mode 100644 index 0000000000..89f39b7c4b --- /dev/null +++ b/softfloat_8/bf16_to_f8_2.c @@ -0,0 +1,207 @@ +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +int round_f8_2(int sign, int frac, int precision, int inexact, int overflow); + +float8_2_t bf16_to_f8_2( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast16_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast8_t uiZ, frac8_2; + union ui8_f8_2 uZ; + bool zero; + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signBF16_2UI( uiA ); + exp = expBF16_2UI( uiA ); + frac = fracBF16_2UI( uiA ); + zero = (exp == 0) && (frac == 0); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + int inexact = 0; + int precision = 0; + int overflow = 0; + if (exp <= 0x70) { // 0x70 is the largest exponent that converts to a denorm in f8_2 + if (exp == 0x00) { + if (frac != 0x00) { + inexact = 1; + } + exp = 0x0; + frac = 0x0; + uiZ = packToF8_2UI( sign, exp, frac); + } + else if (exp <= 0x6E) { + if (exp == 0x6E) { + precision = 1; + if (frac != 0) { + inexact = 1; + } + } + else { + inexact = 1; + } + exp = 0x0; + frac = 0x0; + uiZ = packToF8_2UI( sign, exp, frac); + } + else if (exp == 0x6F) { + if (frac != 0x00) { + inexact = 1; + if (frac == 0x40) { + precision = 1; + inexact = 0; + } + else if (frac > 0x40) { + precision = 1; + } + } + exp = 0x0; + frac = 0x1; + uiZ = packToF8_2UI( sign, exp, frac); + } + else if (exp == 0x70) { + if (frac < 0x40) { + if (frac != 0x00) { + inexact = 1; + if (frac == 0x20) { + precision = 1; + inexact = 0; + } + else if (frac > 0x20) { + precision = 1; + } + } + exp = 0x0; + frac = 0x2; + uiZ = packToF8_2UI( sign, exp, frac); + } + else { + if (frac != 0x40) { + inexact = 1; + if (frac == 0x60) { + precision = 1; + inexact = 0; + } + else if (frac > 0x60) { + precision = 1; + } + } + exp = 0x0; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + } + } + } + else if (exp <= 0x8E) { // 0x8E is the biggest number in which mantissa is not overflowing + int mask_frac = 0x60; // creates a mask equal to 110_0000 which enables only the mantissa in the core + int mask_precision = 0x10; // creates a mask equal to 001_0000 which enables only the mantissa in the core + int mask_inexact = 0x0F; // creates a mask equal to 000_1111 which enables only the mantissa in the core + precision = (frac & mask_precision) >> 4; + inexact = ((frac & mask_inexact) > 0); + exp = exp - 127 + 15; + frac = (frac & mask_frac) >> 5; + uiZ = packToF8_2UI( sign, exp, frac); + } + else if ( exp < 0xFF ) { + exp = 0x1E; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + } + else if (exp == 0xFF) { + if (frac) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + } else { + exp = 0x1F; + frac = 0x0; + uiZ = packToF8_2UI( sign, exp, frac); + uZ.ui = uiZ; + return uZ.f; + } + goto uiZ; + } + if ((exp == 0x1E && expF8_2UI(uiZ + round_f8_2(sign, frac, precision, inexact, overflow)) == 1) || overflow == 1) { + softfloat_raiseFlags(softfloat_flag_overflow | softfloat_flag_inexact); + } + else if (inexact == 1 || precision == 1) { + softfloat_raiseFlags(softfloat_flag_inexact); + if (exp == 0) { + softfloat_raiseFlags(softfloat_flag_underflow); + } + } + uiZ: + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + if (((uZ.ui >> 2) & 0x1F) == 0x1F) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + //printf("uiZ = 0x%x, sign = %d, exp = 0x%lx, frac = 0x%x\n", uiZ, sign, exp, frac); + return uZ.f; +} + +int round_f8_2(int sign, int frac, int precision, int inexact, int overflow) { + //printf("frac = 0x%x, precision = %d, inexact = %x\n", frac, precision, inexact); + int round = 0; // round down is the default unless we round up based on the following conditions + if (softfloat_roundingMode == 0) { + if (overflow) { + round = 1; + } + else { + int even_mask = 0x1; // used to mask the mantissa to see if the number is even (i.e. LSB = 0) + if (inexact == 0) { + if (precision == 1) { + if (frac & even_mask == 1) { + round = 1; + } + } + } + else { + if (precision == 1) { // round up + round = 1; + } + } + } + } + else if (softfloat_roundingMode == 1) { + round = 0; + } + else if (softfloat_roundingMode == 2) { + if (sign == 0) { + round = 0; + } + else { + round = precision | inexact; + } + } + else if (softfloat_roundingMode == 3) { + if (sign == 1) { + round = 0; + } + else { + round = precision | inexact; + } + } + else if (softfloat_roundingMode == 4) { + if (precision == 1) { + round = 1; + } + else { + round = 0; + } + } + return round; +} diff --git a/softfloat_8/bf16_to_f8_2_old.c b/softfloat_8/bf16_to_f8_2_old.c new file mode 100644 index 0000000000..b7c8aa6955 --- /dev/null +++ b/softfloat_8/bf16_to_f8_2_old.c @@ -0,0 +1,52 @@ +#include +#include +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +float8_2_t bf16_to_f8_2( float16_t a ) +{ + union ui16_f16 uA; + uint_fast16_t uiA; + bool sign; + int_fast16_t exp; + uint_fast8_t frac; + struct commonNaN commonNaN; + uint_fast8_t uiZ, frac8_2; + union ui8_f8_2 uZ; + + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + uA.f = a; + uiA = uA.ui; + sign = signBF16_2UI( uiA ); + exp = expBF16_2UI( uiA ); + frac = fracBF16_2UI( uiA ); + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + if ( exp == 0xFF ) { + if ( frac ) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); + } else { + uiZ = packToF8_2UI( sign, 0x1F, 0 ); + } + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + frac8_2 = frac>>1 | ((frac & 0x01) != 0); + if ( ! (exp | frac8_2) ) { + uiZ = packToF8_2UI( sign, 0, 0 ); + goto uiZ; + } + /*------------------------------------------------------------------------ + *------------------------------------------------------------------------*/ + return softfloat_roundPackToF8_2( sign, exp - 0x71, frac8_2 | 0x40 ); + uiZ: + uZ.ui = uiZ; + return uZ.f; + +} + diff --git a/softfloat_8/bf16_to_i8.c b/softfloat_8/bf16_to_i8.c new file mode 100644 index 0000000000..cad0eb665b --- /dev/null +++ b/softfloat_8/bf16_to_i8.c @@ -0,0 +1,116 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +#include + +int round_i8(int sign, int result, int precision, int inexact); + +int8_t bf16_to_i8(bfloat16_t input, uint_fast8_t roundingMode) { + // Extract sign, exponent, and mantissa from the bfloat16 input + int16_t sign = (input.v & 0x8000) ? -1 : 1; + int16_t exponent = ((input.v >> 7) & 0xFF); // exponent + int16_t normalized = (exponent != 0); // Normalized Checking + exponent -= 127; // De-bias the exponent + int16_t implicit_bit = normalized << 7; + uint16_t mantissa_dec = (input.v & 0x7F) | implicit_bit; // Add the implicit leading bit + double mantissa = 0; + // mantissa extraction + for (int i=7;i>=0;i--) { // 8 iterations on 7 mantissa bits going from 7 down to 0 because we consider also the implicit bit + int16_t extract_bit = (mantissa_dec >> i) & 0x1; // extract the bit of the ith index + if (extract_bit) { // if the bit is '1' we accumulate to the mantissa + mantissa = mantissa + pow(2, i-7); // the value accumulated to the mantissa equals 2^(i-7) + } + } + // Calculate the floating-point result represented by the bfloat16 + // Since bfloat16 has limited precision, and we're converting to int8, simplifications are made + double result_abs = mantissa * pow(2, exponent); // absolute result + double result = sign * result_abs; + + // Raise the invalid flag to handle out of range + if (result > INT8_MAX) { + softfloat_raiseFlags(softfloat_flag_invalid); + return INT8_MAX; + } + else if (result < INT8_MIN) { + softfloat_raiseFlags(softfloat_flag_invalid); + if (input.v > 0xFF80) { // input is a -NaN, then we saturate to the largest positive number + return INT8_MAX; + } + else { + return INT8_MIN; + } + } + + int inexact = 0; + int precision = 0; + + if (result != floor(result)) { // if this statement is true, then the result is not a whole number and rounding is needed + softfloat_raiseFlags(softfloat_flag_inexact); // raise the inexact flag + if ((softfloat_exceptionFlags & 0x1) == 1) { + if (result == (floor(result) + ceil(result))/2) { // right in the middle + inexact = 0; + precision = 1; + } + else if (fabs(result) < fabs((floor(result) + ceil(result))/2)) { // below the middle + inexact = 1; + precision = 0; + } + else { // above the middle + inexact = 1; + precision = 1; + } + } + } + return (int8_t)result + round_i8(sign, result, precision, inexact); +} + + +int round_i8(int sign, int result, int precision, int inexact) { + //printf("precision = %d, inexact = %x\n", precision, inexact); + int round = 0; // default + if (softfloat_roundingMode == 0) { // RNE + int even_mask = 0x1; // used to mask the result to see if the number is even (i.e. LSB = 0) + if (inexact == 0) { + if (precision == 1) { // in the middle + if (result & even_mask == 1) { // if the even number is above the middle + round = sign * (precision | inexact); // round to the absolute highest + } + } + } + else { // above or below + if (precision == 1) { // if above + round = sign * (precision | inexact); // round to the absolute highest + } + } + } + else if (softfloat_roundingMode == 1) { // RTZ + round = 0; + } + else if (softfloat_roundingMode == 2) { // RDN + if (sign == 1) { + round = 0; + } + else { + round = sign * (precision | inexact); + } + } + else if (softfloat_roundingMode == 3) { // RUP + if (sign == -1) { + round = 0; + } + else { + round = sign * (precision | inexact); + } + } + else if (softfloat_roundingMode == 4) { // RMM + if (precision == 1) { + round = sign; + } + else { + round = 0; + } + } + return round; +} diff --git a/softfloat_8/bf16_to_ui8.c b/softfloat_8/bf16_to_ui8.c new file mode 100644 index 0000000000..532f2e8862 --- /dev/null +++ b/softfloat_8/bf16_to_ui8.c @@ -0,0 +1,134 @@ + +#include +#include "specialize.h" +#include "softfloat.h" + +#include + +int round_ui8(int sign, int result, int precision, int inexact); + +int8_t bf16_to_ui8(bfloat16_t input, uint_fast8_t roundingMode) { + // Extract sign, exponent, and mantissa from the bfloat16 input + int16_t sign = (input.v & 0x8000) ? -1 : 1; + int16_t exponent = ((input.v >> 7) & 0xFF); // exponent + int16_t normalized = (exponent != 0); // Normalized Checking + exponent -= 127; // De-bias the exponent + int16_t implicit_bit = normalized << 7; + uint16_t mantissa_dec = (input.v & 0x7F) | implicit_bit; // Add the implicit leading bit + double mantissa = 0; + // mantissa extraction + for (int i=7;i>=0;i--) { // 8 iterations on 7 mantissa bits going from 7 down to 0 because we consider also the implicit bit + int16_t extract_bit = (mantissa_dec >> i) & 0x1; // extract the bit of the ith index + if (extract_bit) { // if the bit is '1' we accumulate to the mantissa + mantissa = mantissa + pow(2, i-7); // the value accumulated to the mantissa equals 2^(i-7) + } + } + // Calculate the floating-point result represented by the bfloat16 + // Since bfloat16 has limited precision, and we're converting to int8, simplifications are made + double result_abs = mantissa * pow(2, exponent); // absolute result + double result = sign * result_abs; + + int neg_res = 0; + + // Raise the invalid flag to handle out of range + if (result > UINT8_MAX) { + softfloat_raiseFlags(softfloat_flag_invalid); + return UINT8_MAX; + } + else if (result < 0) { + if (input.v > 0xFF80) { // input is a -NaN, then we saturate to the largest positive number + softfloat_raiseFlags(softfloat_flag_invalid); + return UINT8_MAX; + } + else { + neg_res = 1; + } + } + + int inexact = 0; + int precision = 0; + + if (result != floor(result)) { // if this statement is true, then the result is not a whole number and rounding is needed + softfloat_raiseFlags(softfloat_flag_inexact); // raise the inexact flag + if ((softfloat_exceptionFlags & 0x1) == 1) { + if (result == (floor(result) + ceil(result))/2) { // right in the middle + inexact = 0; + precision = 1; + } + else if (fabs(result) < fabs((floor(result) + ceil(result))/2)) { // below the middle + inexact = 1; + precision = 0; + } + else { // above the middle + inexact = 1; + precision = 1; + } + } + } + + if ((neg_res && result < -1) || (sign == -1) && ((int8_t)result + round_ui8(sign, result, precision, inexact) < 0)) { + softfloat_exceptionFlags = 0; // reset the inexact flag raised, and set the invalid afterwards + softfloat_raiseFlags(softfloat_flag_invalid); // set the invalid + int8_t result_u = 0; + return result_u; + } + else if ((int8_t)result == 0 && ((int8_t)result + round_ui8(sign, result, precision, inexact)) == 0) { + if (inexact | precision) { + softfloat_raiseFlags(softfloat_flag_inexact); + } + int8_t result_u = 0; + return result_u; + } + else { + return (uint8_t)result + round_ui8(sign, result, precision, inexact); + } +} + + +int round_ui8(int sign, int result, int precision, int inexact) { + //printf("precision = %d, inexact = %x\n", precision, inexact); + int round = 0; // default + if (softfloat_roundingMode == 0) { // RNE + int even_mask = 0x1; // used to mask the result to see if the number is even (i.e. LSB = 0) + if (inexact == 0) { + if (precision == 1) { // in the middle + if (result & even_mask == 1) { // if the even number is above the middle + round = sign * (precision | inexact); // round to the absolute highest + } + } + } + else { // above or below + if (precision == 1) { // if above + round = sign * (precision | inexact); // round to the absolute highest + } + } + } + else if (softfloat_roundingMode == 1) { // RTZ + round = 0; + } + else if (softfloat_roundingMode == 2) { // RDN + if (sign == 1) { + round = 0; + } + else { + round = sign * (precision | inexact); + } + } + else if (softfloat_roundingMode == 3) { // RUP + if (sign == -1) { + round = 0; + } + else { + round = sign * (precision | inexact); + } + } + else if (softfloat_roundingMode == 4) { // RMM + if (precision == 1) { + round = sign; + } + else { + round = 0; + } + } + return round; +} diff --git a/softfloat_8/i8_to_bf16.c b/softfloat_8/i8_to_bf16.c new file mode 100644 index 0000000000..19e0bd011d --- /dev/null +++ b/softfloat_8/i8_to_bf16.c @@ -0,0 +1,59 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" +#include "math.h" + + +bfloat16_t i8_to_bf16(int8_t input) { + bfloat16_t result; + uint16_t sign = 0, exponent = 0, mantissa = 0; + + if (input == -128) { + // For -128, manually set to the equivalent positive value in bfloat + sign = 0x8000; // Set the sign bit if negative + exponent = 0x86 << 7; // Set the exponet + mantissa = 0; // Set the mantissa + goto END; + } else if (input < 0) { // Handle sign + sign = 0x8000; // Set the sign bit if negative + input = -input; // Work with positive value for simplicity + } + + if (input == 0) { + // If input is 0, the result is simply 0 + result.v = 0; + return result; + } else if (input == 1) { + // Special case for 1, to ensure it gets a distinct representation + exponent = (127 << 7); // Exponent for 1 in floating-point representation + mantissa = 0; // Mantissa is all zeros for 1 + } else { + // For input > 1, calculate exponent and mantissa + // This simplified approach increments the exponent based on the input value + // and sets the mantissa to a representation of the input + + // Find the most significant bit position of the input + int msbPos = 0; + for (int8_t temp = input; temp > 0; temp >>= 1) { + msbPos++; + } + + // Calculate exponent + // Bias of 127 plus position of MSB minus one for the implicit leading bit in floating-point representation + exponent = ((127 + msbPos - 1) << 7) & 0xFF80; + + // Calculate mantissa + // Shift input left to align MSB with the 8th position (7 bits for mantissa) + // Then take the upper 7 bits as the mantissa + int shiftLeft = 7 - (msbPos - 1); + mantissa = (input << shiftLeft) & 0x7F; // Mask to get the top 7 bits + } + + END: + // Combine sign, exponent, and mantissa + result.v = sign | exponent | mantissa; + + return result; +} diff --git a/softfloat_8/ui8_to_bf16.c b/softfloat_8/ui8_to_bf16.c new file mode 100644 index 0000000000..83cd760ceb --- /dev/null +++ b/softfloat_8/ui8_to_bf16.c @@ -0,0 +1,43 @@ + +#include +#include "platform.h" +#include "internals.h" +#include "softfloat.h" +#include "math.h" + +bfloat16_t ui8_to_bf16(uint8_t input) { + bfloat16_t result; + uint16_t exponent = 0, mantissa = 0; + + if (input == 0) { + // If input is 0, the result is simply 0 + result.v = 0; + return result; + } else if (input == 1) { + // Special case for 1, to ensure it gets a distinct representation + exponent = (127 << 7); // Exponent for 1 in floating-point representation + mantissa = 0; // Mantissa is all zeros for 1 + } else { + // For input > 1, calculate exponent and mantissa + // Find the most significant bit position of the input + int msbPos = 0; + for (uint8_t temp = input; temp > 0; temp >>= 1) { + msbPos++; + } + + // Calculate exponent + // Bias of 127 plus position of MSB minus one for the implicit leading bit in floating-point representation + exponent = ((127 + msbPos - 1) << 7) & 0xFF80; + + // Calculate mantissa + // Shift input left to align MSB with the 8th position (7 bits for mantissa) + // Then take the upper 7 bits as the mantissa + int shiftLeft = 7 - (msbPos - 1); + mantissa = (input << shiftLeft) & 0x7F; // Mask to get the top 7 bits + } + + // Combine exponent and mantissa (sign bit is always 0 for unsigned input) + result.v = exponent | mantissa; + + return result; +} From 978200107e60c3948f92457cff11f7c1221b3410 Mon Sep 17 00:00:00 2001 From: Abdallah Cheikh Date: Sat, 17 Feb 2024 10:08:24 +0100 Subject: [PATCH 03/31] added all the modifications necessary to integrate fp8 --- riscv/decode.h | 2 + riscv/decode_macros.h | 17 ++++ riscv/insn_template.h | 2 + riscv/insns/vfadd_vf.h | 6 ++ riscv/insns/vfadd_vv.h | 6 ++ riscv/insns/vfclass_v.h | 6 ++ riscv/insns/vfcvt_f_x_v.h | 2 + riscv/insns/vfcvt_f_xu_v.h | 2 + riscv/insns/vfcvt_rtz_x_f_v.h | 2 + riscv/insns/vfcvt_rtz_xu_f_v.h | 2 + riscv/insns/vfcvt_x_f_v.h | 2 + riscv/insns/vfcvt_xu_f_v.h | 2 + riscv/insns/vfdiv_vf.h | 6 ++ riscv/insns/vfdiv_vv.h | 6 ++ riscv/insns/vfmacc_vf.h | 6 ++ riscv/insns/vfmacc_vv.h | 6 ++ riscv/insns/vfmadd_vf.h | 6 ++ riscv/insns/vfmadd_vv.h | 6 ++ riscv/insns/vfmax_vf.h | 6 ++ riscv/insns/vfmax_vv.h | 6 ++ riscv/insns/vfmin_vf.h | 6 ++ riscv/insns/vfmin_vv.h | 6 ++ riscv/insns/vfmsac_vf.h | 6 ++ riscv/insns/vfmsac_vv.h | 6 ++ riscv/insns/vfmsub_vf.h | 6 ++ riscv/insns/vfmsub_vv.h | 6 ++ riscv/insns/vfmul_vf.h | 6 ++ riscv/insns/vfmul_vv.h | 6 ++ riscv/insns/vfnmacc_vf.h | 6 ++ riscv/insns/vfnmacc_vv.h | 6 ++ riscv/insns/vfnmadd_vf.h | 6 ++ riscv/insns/vfnmadd_vv.h | 6 ++ riscv/insns/vfnmsac_vf.h | 6 ++ riscv/insns/vfnmsac_vv.h | 6 ++ riscv/insns/vfnmsub_vf.h | 6 ++ riscv/insns/vfnmsub_vv.h | 6 ++ riscv/insns/vfrdiv_vf.h | 6 ++ riscv/insns/vfrec7_v.h | 6 ++ riscv/insns/vfredmax_vs.h | 6 ++ riscv/insns/vfredmin_vs.h | 6 ++ riscv/insns/vfredosum_vs.h | 6 ++ riscv/insns/vfredusum_vs.h | 6 ++ riscv/insns/vfrsqrt7_v.h | 6 ++ riscv/insns/vfrsub_vf.h | 6 ++ riscv/insns/vfsgnj_vf.h | 6 ++ riscv/insns/vfsgnj_vv.h | 6 ++ riscv/insns/vfsgnjn_vf.h | 6 ++ riscv/insns/vfsgnjn_vv.h | 6 ++ riscv/insns/vfsgnjx_vf.h | 6 ++ riscv/insns/vfsgnjx_vv.h | 6 ++ riscv/insns/vfsqrt_v.h | 6 ++ riscv/insns/vfsub_vf.h | 6 ++ riscv/insns/vfsub_vv.h | 6 ++ riscv/insns/vmfeq_vf.h | 6 ++ riscv/insns/vmfeq_vv.h | 6 ++ riscv/insns/vmfge_vf.h | 6 ++ riscv/insns/vmfgt_vf.h | 6 ++ riscv/insns/vmfle_vf.h | 6 ++ riscv/insns/vmfle_vv.h | 6 ++ riscv/insns/vmflt_vf.h | 6 ++ riscv/insns/vmflt_vv.h | 6 ++ riscv/insns/vmfne_vf.h | 6 ++ riscv/insns/vmfne_vv.h | 6 ++ riscv/riscv.mk.in | 1 + riscv/v_ext_macros.h | 161 +++++++++++++++++++++++++++++++-- riscv/vector_unit.cc | 2 + riscv/vector_unit.h | 1 + 67 files changed, 513 insertions(+), 9 deletions(-) diff --git a/riscv/decode.h b/riscv/decode.h index cd1c0a1222..281dd64517 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -8,6 +8,8 @@ #endif #include "../softfloat/softfloat_types.h" +#include "../softfloat_8/softfloat_types.h" +#include "../softfloat_8/specialize.h" #include #include #include diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h index e31da5c109..d2b63a2753 100644 --- a/riscv/decode_macros.h +++ b/riscv/decode_macros.h @@ -8,6 +8,8 @@ #include "encoding.h" #include "common.h" #include "softfloat_types.h" +#include "softfloat_8/softfloat_types.h" +#include "softfloat_8/specialize.h" #include "specialize.h" // helpful macros, etc @@ -223,6 +225,10 @@ class wait_for_interrupt_t {}; #define invalid_pc(pc) ((pc) & 1) /* Convenience wrappers to simplify softfloat code sequences */ +#define isBoxedF8_1(r) (isBoxedF16(r) && ((uint64_t)((r.v[0] >> 8) + 1) == ((uint64_t)1 << 56))) +#define unboxF8_1(r) (isBoxedF8_1(r) ? (uint8_t)r.v[0] : defaultNaNF8_1UI) +#define isBoxedF8_2(r) (isBoxedF16(r) && ((uint64_t)((r.v[0] >> 8) + 1) == ((uint64_t)1 << 56))) +#define unboxF8_2(r) (isBoxedF8_2(r) ? (uint8_t)r.v[0] : defaultNaNF8_2UI) #define isBoxedF16(r) (isBoxedF32(r) && ((uint64_t)((r.v[0] >> 16) + 1) == ((uint64_t)1 << 48))) #define unboxF16(r) (isBoxedF16(r) ? (uint16_t)r.v[0] : defaultNaNF16UI) #define isBoxedBF16(r) isBoxedF16(r) @@ -231,10 +237,14 @@ class wait_for_interrupt_t {}; #define unboxF32(r) (isBoxedF32(r) ? (uint32_t)r.v[0] : defaultNaNF32UI) #define isBoxedF64(r) ((r.v[1] + 1) == 0) #define unboxF64(r) (isBoxedF64(r) ? r.v[0] : defaultNaNF64UI) +inline float8_1_t f8_1(uint8_t v) { return { v }; } +inline float8_2_t f8_2(uint8_t v) { return { v }; } inline float16_t f16(uint16_t v) { return { v }; } inline bfloat16_t bf16(uint16_t v) { return { v }; } inline float32_t f32(uint32_t v) { return { v }; } inline float64_t f64(uint64_t v) { return { v }; } +inline float8_1_t f8_1(freg_t r) { return f8_1(unboxF8_1(r)); } +inline float8_2_t f8_2(freg_t r) { return f8_2(unboxF8_2(r)); } inline float16_t f16(freg_t r) { return f16(unboxF16(r)); } inline bfloat16_t bf16(freg_t r) { return bf16(unboxBF16(r)); } inline float32_t f32(freg_t r) { return f32(unboxF32(r)); } @@ -244,9 +254,14 @@ inline freg_t freg(float16_t f) { return { ((uint64_t)-1 << 16) | f.v, (uint64_t inline freg_t freg(float32_t f) { return { ((uint64_t)-1 << 32) | f.v, (uint64_t)-1 }; } inline freg_t freg(float64_t f) { return { f.v, (uint64_t)-1 }; } inline freg_t freg(float128_t f) { return f; } +#define F8_SIGN ((uint8_t)1 << 7) #define F16_SIGN ((uint16_t)1 << 15) #define F32_SIGN ((uint32_t)1 << 31) #define F64_SIGN ((uint64_t)1 << 63) +#define fsgnj8_1(a, b, n, x) \ + f8_1((f8_1(a).v & ~F8_SIGN) | ((((x) ? f8_1(a).v : (n) ? F8_SIGN : 0) ^ f8_1(b).v) & F8_SIGN)) +#define fsgnj8_2(a, b, n, x) \ + f8_2((f8_2(a).v & ~F8_SIGN) | ((((x) ? f8_2(a).v : (n) ? F8_SIGN : 0) ^ f8_2(b).v) & F8_SIGN)) #define fsgnj16(a, b, n, x) \ f16((f16(a).v & ~F16_SIGN) | ((((x) ? f16(a).v : (n) ? F16_SIGN : 0) ^ f16(b).v) & F16_SIGN)) #define fsgnj32(a, b, n, x) \ @@ -286,6 +301,8 @@ inline long double to_f(float128_t f) { long double r; memcpy(&r, &f, sizeof(r)) // Vector macros #define e8 8 // 8b elements +#define e8_1 0 // 1-4-3 subsets of e8 +#define e8_2 1 // 1-5-2 subsets of e8 #define e16 16 // 16b elements #define e32 32 // 32b elements #define e64 64 // 64b elements diff --git a/riscv/insn_template.h b/riscv/insn_template.h index cead6d7dc8..0c4845a647 100644 --- a/riscv/insn_template.h +++ b/riscv/insn_template.h @@ -4,6 +4,8 @@ #include "arith.h" #include "mmu.h" #include "softfloat.h" +#include "softfloat_8/softfloat_types.h" +#include "softfloat_8/specialize.h" #include "internals.h" #include "specialize.h" #include "tracer.h" diff --git a/riscv/insns/vfadd_vf.h b/riscv/insns/vfadd_vf.h index 2b808e0ccd..11a6259d5c 100644 --- a/riscv/insns/vfadd_vf.h +++ b/riscv/insns/vfadd_vf.h @@ -1,6 +1,12 @@ // vfadd.vf vd, vs2, rs1 VI_VFP_VF_LOOP ({ + vd = f8_1_add(rs1, vs2); +}, +{ + vd = f8_2_add(rs1, vs2); +}, +{ vd = f16_add(rs1, vs2); }, { diff --git a/riscv/insns/vfadd_vv.h b/riscv/insns/vfadd_vv.h index ce94921d56..2d612dc175 100644 --- a/riscv/insns/vfadd_vv.h +++ b/riscv/insns/vfadd_vv.h @@ -1,6 +1,12 @@ // vfadd.vv vd, vs2, vs1 VI_VFP_VV_LOOP ({ + vd = f8_1_add(vs1, vs2); +}, +{ + vd = f8_2_add(vs1, vs2); +}, +{ vd = f16_add(vs1, vs2); }, { diff --git a/riscv/insns/vfclass_v.h b/riscv/insns/vfclass_v.h index a307d2d1ed..065dd63f8f 100644 --- a/riscv/insns/vfclass_v.h +++ b/riscv/insns/vfclass_v.h @@ -1,6 +1,12 @@ // vfclass.v vd, vs2, vm VI_VFP_V_LOOP ({ + vd = f8_1(f8_1_classify(vs2)); +}, +{ + vd = f8_2(f8_2_classify(vs2)); +}, +{ vd = f16(f16_classify(vs2)); }, { diff --git a/riscv/insns/vfcvt_f_x_v.h b/riscv/insns/vfcvt_f_x_v.h index d094c14001..4e41f82db0 100644 --- a/riscv/insns/vfcvt_f_x_v.h +++ b/riscv/insns/vfcvt_f_x_v.h @@ -1,5 +1,7 @@ // vfcvt.f.x.v vd, vd2, vm VI_VFP_CVT_INT_TO_FP( + { vd = i32_to_f8_1(vs2); }, // BODY8_1 + { vd = i32_to_f8_2(vs2); }, // BODY8_2 { vd = i32_to_f16(vs2); }, // BODY16 { vd = i32_to_f32(vs2); }, // BODY32 { vd = i64_to_f64(vs2); }, // BODY64 diff --git a/riscv/insns/vfcvt_f_xu_v.h b/riscv/insns/vfcvt_f_xu_v.h index 64dbb1c119..db45df14c3 100644 --- a/riscv/insns/vfcvt_f_xu_v.h +++ b/riscv/insns/vfcvt_f_xu_v.h @@ -1,5 +1,7 @@ // vfcvt.f.xu.v vd, vd2, vm VI_VFP_CVT_INT_TO_FP( + { vd = ui32_to_f8_1(vs2); }, // BODY8_1 + { vd = ui32_to_f8_2(vs2); }, // BODY8_2 { vd = ui32_to_f16(vs2); }, // BODY16 { vd = ui32_to_f32(vs2); }, // BODY32 { vd = ui64_to_f64(vs2); }, // BODY64 diff --git a/riscv/insns/vfcvt_rtz_x_f_v.h b/riscv/insns/vfcvt_rtz_x_f_v.h index ecdfa22de9..ee42ccb851 100644 --- a/riscv/insns/vfcvt_rtz_x_f_v.h +++ b/riscv/insns/vfcvt_rtz_x_f_v.h @@ -1,5 +1,7 @@ // vfcvt.rtz.x.f.v vd, vd2, vm VI_VFP_CVT_FP_TO_INT( + { vd = f8_1_to_i8(vs2, softfloat_round_minMag, true); }, // BODY8_1 + { vd = f8_2_to_i8(vs2, softfloat_round_minMag, true); }, // BODY8_2 { vd = f16_to_i16(vs2, softfloat_round_minMag, true); }, // BODY16 { vd = f32_to_i32(vs2, softfloat_round_minMag, true); }, // BODY32 { vd = f64_to_i64(vs2, softfloat_round_minMag, true); }, // BODY64 diff --git a/riscv/insns/vfcvt_rtz_xu_f_v.h b/riscv/insns/vfcvt_rtz_xu_f_v.h index 87585d24ca..2a3e8ba313 100644 --- a/riscv/insns/vfcvt_rtz_xu_f_v.h +++ b/riscv/insns/vfcvt_rtz_xu_f_v.h @@ -1,5 +1,7 @@ // vfcvt.rtz.xu.f.v vd, vd2, vm VI_VFP_CVT_FP_TO_INT( + { vd = f8_1_to_ui8(vs2, softfloat_round_minMag, true); }, // BODY8_1 + { vd = f8_2_to_ui8(vs2, softfloat_round_minMag, true); }, // BODY8_2 { vd = f16_to_ui16(vs2, softfloat_round_minMag, true); }, // BODY16 { vd = f32_to_ui32(vs2, softfloat_round_minMag, true); }, // BODY32 { vd = f64_to_ui64(vs2, softfloat_round_minMag, true); }, // BODY64 diff --git a/riscv/insns/vfcvt_x_f_v.h b/riscv/insns/vfcvt_x_f_v.h index 4f21b52ff9..c519c7203b 100644 --- a/riscv/insns/vfcvt_x_f_v.h +++ b/riscv/insns/vfcvt_x_f_v.h @@ -1,5 +1,7 @@ // vfcvt.x.f.v vd, vd2, vm VI_VFP_CVT_FP_TO_INT( + { vd = f8_1_to_i8(vs2, softfloat_roundingMode, true); }, // BODY8_1 + { vd = f8_2_to_i8(vs2, softfloat_roundingMode, true); }, // BODY8_2 { vd = f16_to_i16(vs2, softfloat_roundingMode, true); }, // BODY16 { vd = f32_to_i32(vs2, softfloat_roundingMode, true); }, // BODY32 { vd = f64_to_i64(vs2, softfloat_roundingMode, true); }, // BODY64 diff --git a/riscv/insns/vfcvt_xu_f_v.h b/riscv/insns/vfcvt_xu_f_v.h index ba50fff6ac..3f6c2143ec 100644 --- a/riscv/insns/vfcvt_xu_f_v.h +++ b/riscv/insns/vfcvt_xu_f_v.h @@ -1,5 +1,7 @@ // vfcvt.xu.f.v vd, vd2, vm VI_VFP_CVT_FP_TO_INT( + { vd = f8_1_to_ui8(vs2, softfloat_roundingMode, true); }, // BODY8_1 + { vd = f8_2_to_ui8(vs2, softfloat_roundingMode, true); }, // BODY8_2 { vd = f16_to_ui16(vs2, softfloat_roundingMode, true); }, // BODY16 { vd = f32_to_ui32(vs2, softfloat_roundingMode, true); }, // BODY32 { vd = f64_to_ui64(vs2, softfloat_roundingMode, true); }, // BODY64 diff --git a/riscv/insns/vfdiv_vf.h b/riscv/insns/vfdiv_vf.h index a703ef02bf..f2a465c527 100644 --- a/riscv/insns/vfdiv_vf.h +++ b/riscv/insns/vfdiv_vf.h @@ -1,6 +1,12 @@ // vfdiv.vf vd, vs2, rs1 VI_VFP_VF_LOOP ({ + vd = f8_1_div(vs2, rs1); +}, +{ + vd = f8_2_div(vs2, rs1); +}, +{ vd = f16_div(vs2, rs1); }, { diff --git a/riscv/insns/vfdiv_vv.h b/riscv/insns/vfdiv_vv.h index c66d751659..f146b6d33c 100644 --- a/riscv/insns/vfdiv_vv.h +++ b/riscv/insns/vfdiv_vv.h @@ -1,6 +1,12 @@ // vfdiv.vv vd, vs2, vs1 VI_VFP_VV_LOOP ({ + vd = f8_1_div(vs2, vs1); +}, +{ + vd = f8_2_div(vs2, vs1); +}, +{ vd = f16_div(vs2, vs1); }, { diff --git a/riscv/insns/vfmacc_vf.h b/riscv/insns/vfmacc_vf.h index 61578d3318..681053ac27 100644 --- a/riscv/insns/vfmacc_vf.h +++ b/riscv/insns/vfmacc_vf.h @@ -1,6 +1,12 @@ // vfmacc.vf vd, rs1, vs2, vm # vd[i] = +(vs2[i] * x[rs1]) + vd[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(rs1, vs2, vd); +}, +{ + vd = f8_2_mulAdd(rs1, vs2, vd); +}, +{ vd = f16_mulAdd(rs1, vs2, vd); }, { diff --git a/riscv/insns/vfmacc_vv.h b/riscv/insns/vfmacc_vv.h index 499b1d4d22..903ee94b0e 100644 --- a/riscv/insns/vfmacc_vv.h +++ b/riscv/insns/vfmacc_vv.h @@ -1,6 +1,12 @@ // vfmacc.vv vd, rs1, vs2, vm # vd[i] = +(vs2[i] * vs1[i]) + vd[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(vs1, vs2, vd); +}, +{ + vd = f8_2_mulAdd(vs1, vs2, vd); +}, +{ vd = f16_mulAdd(vs1, vs2, vd); }, { diff --git a/riscv/insns/vfmadd_vf.h b/riscv/insns/vfmadd_vf.h index 2a01429506..1784e69198 100644 --- a/riscv/insns/vfmadd_vf.h +++ b/riscv/insns/vfmadd_vf.h @@ -1,6 +1,12 @@ // vfmadd: vd[i] = +(vd[i] * f[rs1]) + vs2[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(vd, rs1, vs2); +}, +{ + vd = f8_2_mulAdd(vd, rs1, vs2); +}, +{ vd = f16_mulAdd(vd, rs1, vs2); }, { diff --git a/riscv/insns/vfmadd_vv.h b/riscv/insns/vfmadd_vv.h index 7ef734f847..7acaf2b2f3 100644 --- a/riscv/insns/vfmadd_vv.h +++ b/riscv/insns/vfmadd_vv.h @@ -1,6 +1,12 @@ // vfmadd: vd[i] = +(vd[i] * vs1[i]) + vs2[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(vd, vs1, vs2); +}, +{ + vd = f8_2_mulAdd(vd, vs1, vs2); +}, +{ vd = f16_mulAdd(vd, vs1, vs2); }, { diff --git a/riscv/insns/vfmax_vf.h b/riscv/insns/vfmax_vf.h index c4b74cbd54..cc8a9951d4 100644 --- a/riscv/insns/vfmax_vf.h +++ b/riscv/insns/vfmax_vf.h @@ -1,6 +1,12 @@ // vfmax VI_VFP_VF_LOOP ({ + vd = f8_1_max(vs2, rs1); +}, +{ + vd = f8_2_max(vs2, rs1); +}, +{ vd = f16_max(vs2, rs1); }, { diff --git a/riscv/insns/vfmax_vv.h b/riscv/insns/vfmax_vv.h index 6439c8997f..1b39274437 100644 --- a/riscv/insns/vfmax_vv.h +++ b/riscv/insns/vfmax_vv.h @@ -1,6 +1,12 @@ // vfmax VI_VFP_VV_LOOP ({ + vd = f8_1_max(vs2, vs1); +}, +{ + vd = f8_2_max(vs2, vs1); +}, +{ vd = f16_max(vs2, vs1); }, { diff --git a/riscv/insns/vfmin_vf.h b/riscv/insns/vfmin_vf.h index 1560cdf7dc..5a26a3743d 100644 --- a/riscv/insns/vfmin_vf.h +++ b/riscv/insns/vfmin_vf.h @@ -1,6 +1,12 @@ // vfmin vd, vs2, rs1 VI_VFP_VF_LOOP ({ + vd = f8_1_min(vs2, rs1); +}, +{ + vd = f8_2_min(vs2, rs1); +}, +{ vd = f16_min(vs2, rs1); }, { diff --git a/riscv/insns/vfmin_vv.h b/riscv/insns/vfmin_vv.h index 882a774044..52d0035505 100644 --- a/riscv/insns/vfmin_vv.h +++ b/riscv/insns/vfmin_vv.h @@ -1,6 +1,12 @@ // vfmin vd, vs2, vs1 VI_VFP_VV_LOOP ({ + vd = f8_1_min(vs2, vs1); +}, +{ + vd = f8_2_min(vs2, vs1); +}, +{ vd = f16_min(vs2, vs1); }, { diff --git a/riscv/insns/vfmsac_vf.h b/riscv/insns/vfmsac_vf.h index 8af397b999..35c45feea2 100644 --- a/riscv/insns/vfmsac_vf.h +++ b/riscv/insns/vfmsac_vf.h @@ -1,6 +1,12 @@ // vfmsac: vd[i] = +(f[rs1] * vs2[i]) - vd[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(rs1, vs2, f8_1(vd.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(rs1, vs2, f8_2(vd.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(rs1, vs2, f16(vd.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfmsac_vv.h b/riscv/insns/vfmsac_vv.h index 3bb50e50a9..ee8f864783 100644 --- a/riscv/insns/vfmsac_vv.h +++ b/riscv/insns/vfmsac_vv.h @@ -1,6 +1,12 @@ // vfmsac: vd[i] = +(vs1[i] * vs2[i]) - vd[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(vs1, vs2, f8_1(vd.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(vs1, vs2, f8_2(vd.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(vs1, vs2, f16(vd.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfmsub_vf.h b/riscv/insns/vfmsub_vf.h index ab77b4c6e1..b6b653362d 100644 --- a/riscv/insns/vfmsub_vf.h +++ b/riscv/insns/vfmsub_vf.h @@ -1,6 +1,12 @@ // vfmsub: vd[i] = +(vd[i] * f[rs1]) - vs2[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(vd, rs1, f8_1(vs2.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(vd, rs1, f8_2(vs2.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(vd, rs1, f16(vs2.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfmsub_vv.h b/riscv/insns/vfmsub_vv.h index 3cac937fd1..6483297192 100644 --- a/riscv/insns/vfmsub_vv.h +++ b/riscv/insns/vfmsub_vv.h @@ -1,6 +1,12 @@ // vfmsub: vd[i] = +(vd[i] * vs1[i]) - vs2[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(vd, vs1, f8_1(vs2.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(vd, vs1, f8_2(vs2.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(vd, vs1, f16(vs2.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfmul_vf.h b/riscv/insns/vfmul_vf.h index f5f63e497a..5e9f874227 100644 --- a/riscv/insns/vfmul_vf.h +++ b/riscv/insns/vfmul_vf.h @@ -1,6 +1,12 @@ // vfmul.vf vd, vs2, rs1, vm VI_VFP_VF_LOOP ({ + vd = f8_1_mul(vs2, rs1); +}, +{ + vd = f8_2_mul(vs2, rs1); +}, +{ vd = f16_mul(vs2, rs1); }, { diff --git a/riscv/insns/vfmul_vv.h b/riscv/insns/vfmul_vv.h index 7930fd034e..d703257fae 100644 --- a/riscv/insns/vfmul_vv.h +++ b/riscv/insns/vfmul_vv.h @@ -1,6 +1,12 @@ // vfmul.vv vd, vs1, vs2, vm VI_VFP_VV_LOOP ({ + vd = f8_1_mul(vs1, vs2); +}, +{ + vd = f8_2_mul(vs1, vs2); +}, +{ vd = f16_mul(vs1, vs2); }, { diff --git a/riscv/insns/vfnmacc_vf.h b/riscv/insns/vfnmacc_vf.h index 1b99302c6c..c2bbef4779 100644 --- a/riscv/insns/vfnmacc_vf.h +++ b/riscv/insns/vfnmacc_vf.h @@ -1,6 +1,12 @@ // vfnmacc: vd[i] = -(f[rs1] * vs2[i]) - vd[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(rs1, f8_1(vs2.v ^ F8_SIGN), f8_1(vd.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(rs1, f8_2(vs2.v ^ F8_SIGN), f8_2(vd.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(rs1, f16(vs2.v ^ F16_SIGN), f16(vd.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfnmacc_vv.h b/riscv/insns/vfnmacc_vv.h index 7200e063ab..855b2d0698 100644 --- a/riscv/insns/vfnmacc_vv.h +++ b/riscv/insns/vfnmacc_vv.h @@ -1,6 +1,12 @@ // vfnmacc: vd[i] = -(vs1[i] * vs2[i]) - vd[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(f8_1(vs2.v ^ F8_SIGN), vs1, f8_1(vd.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(f8_2(vs2.v ^ F8_SIGN), vs1, f8_2(vd.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(f16(vs2.v ^ F16_SIGN), vs1, f16(vd.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfnmadd_vf.h b/riscv/insns/vfnmadd_vf.h index cb9c217ff2..4e43df7a9b 100644 --- a/riscv/insns/vfnmadd_vf.h +++ b/riscv/insns/vfnmadd_vf.h @@ -1,6 +1,12 @@ // vfnmadd: vd[i] = -(vd[i] * f[rs1]) - vs2[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(f8_1(vd.v ^ F8_SIGN), rs1, f8_1(vs2.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(f8_2(vd.v ^ F8_SIGN), rs1, f8_2(vs2.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(f16(vd.v ^ F16_SIGN), rs1, f16(vs2.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfnmadd_vv.h b/riscv/insns/vfnmadd_vv.h index 7160ed7d6f..db131c5e6d 100644 --- a/riscv/insns/vfnmadd_vv.h +++ b/riscv/insns/vfnmadd_vv.h @@ -1,6 +1,12 @@ // vfnmadd: vd[i] = -(vd[i] * vs1[i]) - vs2[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(f8_1(vd.v ^ F8_SIGN), vs1, f8_1(vs2.v ^ F8_SIGN)); +}, +{ + vd = f8_2_mulAdd(f8_2(vd.v ^ F8_SIGN), vs1, f8_2(vs2.v ^ F8_SIGN)); +}, +{ vd = f16_mulAdd(f16(vd.v ^ F16_SIGN), vs1, f16(vs2.v ^ F16_SIGN)); }, { diff --git a/riscv/insns/vfnmsac_vf.h b/riscv/insns/vfnmsac_vf.h index aa6baa30c6..afc1f215b1 100644 --- a/riscv/insns/vfnmsac_vf.h +++ b/riscv/insns/vfnmsac_vf.h @@ -1,6 +1,12 @@ // vfnmsac: vd[i] = -(f[rs1] * vs2[i]) + vd[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(rs1, f8_1(vs2.v ^ F8_SIGN), vd); +}, +{ + vd = f8_2_mulAdd(rs1, f8_2(vs2.v ^ F8_SIGN), vd); +}, +{ vd = f16_mulAdd(rs1, f16(vs2.v ^ F16_SIGN), vd); }, { diff --git a/riscv/insns/vfnmsac_vv.h b/riscv/insns/vfnmsac_vv.h index 47db61d2d0..23b0ba02f9 100644 --- a/riscv/insns/vfnmsac_vv.h +++ b/riscv/insns/vfnmsac_vv.h @@ -1,6 +1,12 @@ // vfnmsac.vv vd, vs1, vs2, vm # vd[i] = -(vs2[i] * vs1[i]) + vd[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(f8_1(vs1.v ^ F8_SIGN), vs2, vd); +}, +{ + vd = f8_2_mulAdd(f8_2(vs1.v ^ F8_SIGN), vs2, vd); +}, +{ vd = f16_mulAdd(f16(vs1.v ^ F16_SIGN), vs2, vd); }, { diff --git a/riscv/insns/vfnmsub_vf.h b/riscv/insns/vfnmsub_vf.h index 43aa9e2685..aa55901070 100644 --- a/riscv/insns/vfnmsub_vf.h +++ b/riscv/insns/vfnmsub_vf.h @@ -1,6 +1,12 @@ // vfnmsub: vd[i] = -(vd[i] * f[rs1]) + vs2[i] VI_VFP_VF_LOOP ({ + vd = f8_1_mulAdd(f8_1(vd.v ^ F8_SIGN), rs1, vs2); +}, +{ + vd = f8_2_mulAdd(f8_2(vd.v ^ F8_SIGN), rs1, vs2); +}, +{ vd = f16_mulAdd(f16(vd.v ^ F16_SIGN), rs1, vs2); }, { diff --git a/riscv/insns/vfnmsub_vv.h b/riscv/insns/vfnmsub_vv.h index 2a45c8fca0..60f1d93568 100644 --- a/riscv/insns/vfnmsub_vv.h +++ b/riscv/insns/vfnmsub_vv.h @@ -1,6 +1,12 @@ // vfnmsub: vd[i] = -(vd[i] * vs1[i]) + vs2[i] VI_VFP_VV_LOOP ({ + vd = f8_1_mulAdd(f8_1(vd.v ^ F8_SIGN), vs1, vs2); +}, +{ + vd = f8_2_mulAdd(f8_2(vd.v ^ F8_SIGN), vs1, vs2); +}, +{ vd = f16_mulAdd(f16(vd.v ^ F16_SIGN), vs1, vs2); }, { diff --git a/riscv/insns/vfrdiv_vf.h b/riscv/insns/vfrdiv_vf.h index b283343cc2..873af01f09 100644 --- a/riscv/insns/vfrdiv_vf.h +++ b/riscv/insns/vfrdiv_vf.h @@ -1,6 +1,12 @@ // vfrdiv.vf vd, vs2, rs1, vm # scalar-vector, vd[i] = f[rs1]/vs2[i] VI_VFP_VF_LOOP ({ + vd = f8_1_div(rs1, vs2); +}, +{ + vd = f8_2_div(rs1, vs2); +}, +{ vd = f16_div(rs1, vs2); }, { diff --git a/riscv/insns/vfrec7_v.h b/riscv/insns/vfrec7_v.h index 69c026b058..c3e1fd97b3 100644 --- a/riscv/insns/vfrec7_v.h +++ b/riscv/insns/vfrec7_v.h @@ -1,6 +1,12 @@ // vfclass.v vd, vs2, vm VI_VFP_V_LOOP ({ + vd = f8_1_recip7(vs2); +}, +{ + vd = f8_2_recip7(vs2); +}, +{ vd = f16_recip7(vs2); }, { diff --git a/riscv/insns/vfredmax_vs.h b/riscv/insns/vfredmax_vs.h index f19ec59791..bc80949d02 100644 --- a/riscv/insns/vfredmax_vs.h +++ b/riscv/insns/vfredmax_vs.h @@ -2,6 +2,12 @@ bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ + vd_0 = f8_1_max(vd_0, vs2); +}, +{ + vd_0 = f8_2_max(vd_0, vs2); +}, +{ vd_0 = f16_max(vd_0, vs2); }, { diff --git a/riscv/insns/vfredmin_vs.h b/riscv/insns/vfredmin_vs.h index e3cf151324..52c989708c 100644 --- a/riscv/insns/vfredmin_vs.h +++ b/riscv/insns/vfredmin_vs.h @@ -2,6 +2,12 @@ bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ + vd_0 = f8_1_min(vd_0, vs2); +}, +{ + vd_0 = f8_2_min(vd_0, vs2); +}, +{ vd_0 = f16_min(vd_0, vs2); }, { diff --git a/riscv/insns/vfredosum_vs.h b/riscv/insns/vfredosum_vs.h index 2438a7ba9c..150cfb20fa 100644 --- a/riscv/insns/vfredosum_vs.h +++ b/riscv/insns/vfredosum_vs.h @@ -2,6 +2,12 @@ bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ + vd_0 = f8_1_add(vd_0, vs2); +}, +{ + vd_0 = f8_2_add(vd_0, vs2); +}, +{ vd_0 = f16_add(vd_0, vs2); }, { diff --git a/riscv/insns/vfredusum_vs.h b/riscv/insns/vfredusum_vs.h index bad7308e54..17d694dd97 100644 --- a/riscv/insns/vfredusum_vs.h +++ b/riscv/insns/vfredusum_vs.h @@ -2,6 +2,12 @@ bool is_propagate = true; VI_VFP_VV_LOOP_REDUCTION ({ + vd_0 = f8_1_add(vd_0, vs2); +}, +{ + vd_0 = f8_2_add(vd_0, vs2); +}, +{ vd_0 = f16_add(vd_0, vs2); }, { diff --git a/riscv/insns/vfrsqrt7_v.h b/riscv/insns/vfrsqrt7_v.h index a073764127..e36e59bd5d 100644 --- a/riscv/insns/vfrsqrt7_v.h +++ b/riscv/insns/vfrsqrt7_v.h @@ -1,6 +1,12 @@ // vfclass.v vd, vs2, vm VI_VFP_V_LOOP ({ + vd = f8_1_rsqrte7(vs2); +}, +{ + vd = f8_2_rsqrte7(vs2); +}, +{ vd = f16_rsqrte7(vs2); }, { diff --git a/riscv/insns/vfrsub_vf.h b/riscv/insns/vfrsub_vf.h index 7fb26a5b5d..9428dd8bd1 100644 --- a/riscv/insns/vfrsub_vf.h +++ b/riscv/insns/vfrsub_vf.h @@ -1,6 +1,12 @@ // vfsub.vf vd, vs2, rs1 VI_VFP_VF_LOOP ({ + vd = f8_1_sub(rs1, vs2); +}, +{ + vd = f8_2_sub(rs1, vs2); +}, +{ vd = f16_sub(rs1, vs2); }, { diff --git a/riscv/insns/vfsgnj_vf.h b/riscv/insns/vfsgnj_vf.h index ce06185ee9..974ddac48c 100644 --- a/riscv/insns/vfsgnj_vf.h +++ b/riscv/insns/vfsgnj_vf.h @@ -1,6 +1,12 @@ // vfsgnj vd, vs2, vs1 VI_VFP_VF_LOOP ({ + vd = fsgnj8_1(vs2.v, rs1.v, false, false); +}, +{ + vd = fsgnj8_2(vs2.v, rs1.v, false, false); +}, +{ vd = fsgnj16(vs2.v, rs1.v, false, false); }, { diff --git a/riscv/insns/vfsgnj_vv.h b/riscv/insns/vfsgnj_vv.h index 722cb29cf0..168af9b760 100644 --- a/riscv/insns/vfsgnj_vv.h +++ b/riscv/insns/vfsgnj_vv.h @@ -1,6 +1,12 @@ // vfsgnj VI_VFP_VV_LOOP ({ + vd = fsgnj8_1(vs2.v, vs1.v, false, false); +}, +{ + vd = fsgnj8_2(vs2.v, vs1.v, false, false); +}, +{ vd = fsgnj16(vs2.v, vs1.v, false, false); }, { diff --git a/riscv/insns/vfsgnjn_vf.h b/riscv/insns/vfsgnjn_vf.h index e4894124aa..c6cf73fcf6 100644 --- a/riscv/insns/vfsgnjn_vf.h +++ b/riscv/insns/vfsgnjn_vf.h @@ -1,6 +1,12 @@ // vfsgnn VI_VFP_VF_LOOP ({ + vd = fsgnj8_1(vs2.v, rs1.v, true, false); +}, +{ + vd = fsgnj8_2(vs2.v, rs1.v, true, false); +}, +{ vd = fsgnj16(vs2.v, rs1.v, true, false); }, { diff --git a/riscv/insns/vfsgnjn_vv.h b/riscv/insns/vfsgnjn_vv.h index 1d91f69199..901e44b68a 100644 --- a/riscv/insns/vfsgnjn_vv.h +++ b/riscv/insns/vfsgnjn_vv.h @@ -1,6 +1,12 @@ // vfsgnn VI_VFP_VV_LOOP ({ + vd = fsgnj8_1(vs2.v, vs1.v, true, false); +}, +{ + vd = fsgnj8_2(vs2.v, vs1.v, true, false); +}, +{ vd = fsgnj16(vs2.v, vs1.v, true, false); }, { diff --git a/riscv/insns/vfsgnjx_vf.h b/riscv/insns/vfsgnjx_vf.h index 7be164c770..1ee3ca9f06 100644 --- a/riscv/insns/vfsgnjx_vf.h +++ b/riscv/insns/vfsgnjx_vf.h @@ -1,6 +1,12 @@ // vfsgnx VI_VFP_VF_LOOP ({ + vd = fsgnj8_1(vs2.v, rs1.v, false, true); +}, +{ + vd = fsgnj8_2(vs2.v, rs1.v, false, true); +}, +{ vd = fsgnj16(vs2.v, rs1.v, false, true); }, { diff --git a/riscv/insns/vfsgnjx_vv.h b/riscv/insns/vfsgnjx_vv.h index b04b8454ac..93fd96b363 100644 --- a/riscv/insns/vfsgnjx_vv.h +++ b/riscv/insns/vfsgnjx_vv.h @@ -1,6 +1,12 @@ // vfsgnx VI_VFP_VV_LOOP ({ + vd = fsgnj8_1(vs2.v, vs1.v, false, true); +}, +{ + vd = fsgnj8_2(vs2.v, vs1.v, false, true); +}, +{ vd = fsgnj16(vs2.v, vs1.v, false, true); }, { diff --git a/riscv/insns/vfsqrt_v.h b/riscv/insns/vfsqrt_v.h index 86f0148d4b..0103d59df3 100644 --- a/riscv/insns/vfsqrt_v.h +++ b/riscv/insns/vfsqrt_v.h @@ -1,6 +1,12 @@ // vsqrt.v vd, vd2, vm VI_VFP_V_LOOP ({ + vd = f8_1_sqrt(vs2); +}, +{ + vd = f8_2_sqrt(vs2); +}, +{ vd = f16_sqrt(vs2); }, { diff --git a/riscv/insns/vfsub_vf.h b/riscv/insns/vfsub_vf.h index fc6877ca5a..04f72f6e51 100644 --- a/riscv/insns/vfsub_vf.h +++ b/riscv/insns/vfsub_vf.h @@ -1,6 +1,12 @@ // vfsub.vf vd, vs2, rs1 VI_VFP_VF_LOOP ({ + vd = f8_1_sub(vs2, rs1); +}, +{ + vd = f8_2_sub(vs2, rs1); +}, +{ vd = f16_sub(vs2, rs1); }, { diff --git a/riscv/insns/vfsub_vv.h b/riscv/insns/vfsub_vv.h index b0403f1180..6f210cc5e8 100644 --- a/riscv/insns/vfsub_vv.h +++ b/riscv/insns/vfsub_vv.h @@ -1,6 +1,12 @@ // vfsub.vv vd, vs2, vs1 VI_VFP_VV_LOOP ({ + vd = f8_1_sub(vs2, vs1); +}, +{ + vd = f8_2_sub(vs2, vs1); +}, +{ vd = f16_sub(vs2, vs1); }, { diff --git a/riscv/insns/vmfeq_vf.h b/riscv/insns/vmfeq_vf.h index a4d7c50c4e..7dbe11eb6d 100644 --- a/riscv/insns/vmfeq_vf.h +++ b/riscv/insns/vmfeq_vf.h @@ -1,6 +1,12 @@ // vmfeq.vf vd, vs2, fs1 VI_VFP_VF_LOOP_CMP ({ + res = f8_1_eq(vs2, rs1); +}, +{ + res = f8_2_eq(vs2, rs1); +}, +{ res = f16_eq(vs2, rs1); }, { diff --git a/riscv/insns/vmfeq_vv.h b/riscv/insns/vmfeq_vv.h index b08ce980f2..b658d1f97e 100644 --- a/riscv/insns/vmfeq_vv.h +++ b/riscv/insns/vmfeq_vv.h @@ -1,6 +1,12 @@ // vmfeq.vv vd, vs2, vs1 VI_VFP_VV_LOOP_CMP ({ + res = f8_1_eq(vs2, vs1); +}, +{ + res = f8_2_eq(vs2, vs1); +}, +{ res = f16_eq(vs2, vs1); }, { diff --git a/riscv/insns/vmfge_vf.h b/riscv/insns/vmfge_vf.h index ab4df5ce10..672a12bd19 100644 --- a/riscv/insns/vmfge_vf.h +++ b/riscv/insns/vmfge_vf.h @@ -1,6 +1,12 @@ // vmfge.vf vd, vs2, rs1 VI_VFP_VF_LOOP_CMP ({ + res = f8_1_le(rs1, vs2); +}, +{ + res = f8_2_le(rs1, vs2); +}, +{ res = f16_le(rs1, vs2); }, { diff --git a/riscv/insns/vmfgt_vf.h b/riscv/insns/vmfgt_vf.h index dcc3ea37c8..8f19e99aba 100644 --- a/riscv/insns/vmfgt_vf.h +++ b/riscv/insns/vmfgt_vf.h @@ -1,6 +1,12 @@ // vmfgt.vf vd, vs2, rs1 VI_VFP_VF_LOOP_CMP ({ + res = f8_1_lt(rs1, vs2); +}, +{ + res = f8_2_lt(rs1, vs2); +}, +{ res = f16_lt(rs1, vs2); }, { diff --git a/riscv/insns/vmfle_vf.h b/riscv/insns/vmfle_vf.h index a942705d41..f81aae3295 100644 --- a/riscv/insns/vmfle_vf.h +++ b/riscv/insns/vmfle_vf.h @@ -1,6 +1,12 @@ // vmfle.vf vd, vs2, rs1 VI_VFP_VF_LOOP_CMP ({ + res = f8_1_le(vs2, rs1); +}, +{ + res = f8_2_le(vs2, rs1); +}, +{ res = f16_le(vs2, rs1); }, { diff --git a/riscv/insns/vmfle_vv.h b/riscv/insns/vmfle_vv.h index dd6f81dac6..474831112b 100644 --- a/riscv/insns/vmfle_vv.h +++ b/riscv/insns/vmfle_vv.h @@ -1,6 +1,12 @@ // vmfle.vv vd, vs2, rs1 VI_VFP_VV_LOOP_CMP ({ + res = f8_1_le(vs2, vs1); +}, +{ + res = f8_2_le(vs2, vs1); +}, +{ res = f16_le(vs2, vs1); }, { diff --git a/riscv/insns/vmflt_vf.h b/riscv/insns/vmflt_vf.h index 110dbd1b62..cd11bcb04d 100644 --- a/riscv/insns/vmflt_vf.h +++ b/riscv/insns/vmflt_vf.h @@ -1,6 +1,12 @@ // vmflt.vf vd, vs2, rs1 VI_VFP_VF_LOOP_CMP ({ + res = f8_1_lt(vs2, rs1); +}, +{ + res = f8_2_lt(vs2, rs1); +}, +{ res = f16_lt(vs2, rs1); }, { diff --git a/riscv/insns/vmflt_vv.h b/riscv/insns/vmflt_vv.h index 35f8d702cd..c110344d6e 100644 --- a/riscv/insns/vmflt_vv.h +++ b/riscv/insns/vmflt_vv.h @@ -1,6 +1,12 @@ // vmflt.vv vd, vs2, vs1 VI_VFP_VV_LOOP_CMP ({ + res = f8_1_lt(vs2, vs1); +}, +{ + res = f8_2_lt(vs2, vs1); +}, +{ res = f16_lt(vs2, vs1); }, { diff --git a/riscv/insns/vmfne_vf.h b/riscv/insns/vmfne_vf.h index 1b61d57100..d45f297955 100644 --- a/riscv/insns/vmfne_vf.h +++ b/riscv/insns/vmfne_vf.h @@ -1,6 +1,12 @@ // vmfne.vf vd, vs2, rs1 VI_VFP_VF_LOOP_CMP ({ + res = !f8_1_eq(vs2, rs1); +}, +{ + res = !f8_2_eq(vs2, rs1); +}, +{ res = !f16_eq(vs2, rs1); }, { diff --git a/riscv/insns/vmfne_vv.h b/riscv/insns/vmfne_vv.h index 4447c3ccba..b89f052fad 100644 --- a/riscv/insns/vmfne_vv.h +++ b/riscv/insns/vmfne_vv.h @@ -1,6 +1,12 @@ // vmfne.vv vd, vs2, rs1 VI_VFP_VV_LOOP_CMP ({ + res = !f8_1_eq(vs2, vs1); +}, +{ + res = !f8_2_eq(vs2, vs1); +}, +{ res = !f16_eq(vs2, vs1); }, { diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 04747c99ab..7ea744b753 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -6,6 +6,7 @@ riscv_subproject_deps = \ disasm \ fesvr \ softfloat \ + softfloat_8 \ riscv_CFLAGS = -fPIC diff --git a/riscv/v_ext_macros.h b/riscv/v_ext_macros.h index b198d54b62..8db9322934 100644 --- a/riscv/v_ext_macros.h +++ b/riscv/v_ext_macros.h @@ -1443,9 +1443,11 @@ reg_t index[P.VU.vlmax]; \ // // vector: vfp helper // +// AAA check whether to add extensions #define VI_VFP_COMMON \ require_fp; \ - require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || \ + require((P.VU.vsew == e8) || \ + (P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || \ (P.VU.vsew == e32 && p->extension_enabled('F')) || \ (P.VU.vsew == e64 && p->extension_enabled('D'))); \ require_vector(true); \ @@ -1571,10 +1573,27 @@ reg_t index[P.VU.vlmax]; \ } \ P.VU.vstart->write(0); -#define VI_VFP_VV_LOOP(BODY16, BODY32, BODY64) \ +#define VI_VFP_VV_LOOP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_SSS(true); \ VI_VFP_LOOP_BASE \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_VV_PARAMS(8_1); \ + BODY8_1; \ + set_fp_exceptions; \ + break; \ + } \ + case e8_2: {\ + VFP_VV_PARAMS(8_2); \ + BODY8_2; \ + set_fp_exceptions; \ + break; \ + } \ + } \ + break;\ + } \ case e16: { \ VFP_VV_PARAMS(16); \ BODY16; \ @@ -1600,10 +1619,25 @@ reg_t index[P.VU.vlmax]; \ DEBUG_RVV_FP_VV; \ VI_VFP_LOOP_END -#define VI_VFP_V_LOOP(BODY16, BODY32, BODY64) \ +#define VI_VFP_V_LOOP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_SSS(false); \ VI_VFP_LOOP_BASE \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_V_PARAMS(8_1); \ + BODY8_1; \ + break; \ + } \ + case e8_2: { \ + VFP_V_PARAMS(8_2); \ + BODY8_2; \ + break; \ + } \ + } \ + break; \ + } \ case e16: { \ VFP_V_PARAMS(16); \ BODY16; \ @@ -1626,10 +1660,29 @@ reg_t index[P.VU.vlmax]; \ set_fp_exceptions; \ VI_VFP_LOOP_END -#define VI_VFP_VV_LOOP_REDUCTION(BODY16, BODY32, BODY64) \ +#define VI_VFP_VV_LOOP_REDUCTION(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_REDUCTION(false) \ VI_VFP_COMMON \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VI_VFP_LOOP_REDUCTION_BASE(8_1) \ + BODY8_1; \ + set_fp_exceptions; \ + VI_VFP_LOOP_REDUCTION_END(e8) \ + break; \ + } \ + case e8_2: { \ + VI_VFP_LOOP_REDUCTION_BASE(8_2) \ + BODY8_2; \ + set_fp_exceptions; \ + VI_VFP_LOOP_REDUCTION_END(e8) \ + break; \ + } \ + } \ + break; \ + } \ case e16: { \ VI_VFP_LOOP_REDUCTION_BASE(16) \ BODY16; \ @@ -1690,10 +1743,27 @@ reg_t index[P.VU.vlmax]; \ break; \ }; \ -#define VI_VFP_VF_LOOP(BODY16, BODY32, BODY64) \ +#define VI_VFP_VF_LOOP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_SSS(false); \ VI_VFP_LOOP_BASE \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_VF_PARAMS(8_1); \ + BODY8_1; \ + set_fp_exceptions; \ + break; \ + } \ + case e8_2: { \ + VFP_VF_PARAMS(8_2); \ + BODY8_2; \ + set_fp_exceptions; \ + break; \ + } \ + } \ + break; \ + } \ case e16: { \ VFP_VF_PARAMS(16); \ BODY16; \ @@ -1719,10 +1789,27 @@ reg_t index[P.VU.vlmax]; \ DEBUG_RVV_FP_VF; \ VI_VFP_LOOP_END -#define VI_VFP_VV_LOOP_CMP(BODY16, BODY32, BODY64) \ +#define VI_VFP_VV_LOOP_CMP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_MSS(true); \ VI_VFP_LOOP_CMP_BASE \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_VV_CMP_PARAMS(8_1); \ + BODY8_1; \ + set_fp_exceptions; \ + break; \ + } \ + case e8_2: { \ + VFP_VV_CMP_PARAMS(8_2); \ + BODY8_2; \ + set_fp_exceptions; \ + break; \ + } \ + } \ + break; \ + } \ case e16: { \ VFP_VV_CMP_PARAMS(16); \ BODY16; \ @@ -1747,10 +1834,27 @@ reg_t index[P.VU.vlmax]; \ }; \ VI_VFP_LOOP_CMP_END \ -#define VI_VFP_VF_LOOP_CMP(BODY16, BODY32, BODY64) \ +#define VI_VFP_VF_LOOP_CMP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64) \ VI_CHECK_MSS(false); \ VI_VFP_LOOP_CMP_BASE \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_VF_CMP_PARAMS(8_1); \ + BODY8_1; \ + set_fp_exceptions; \ + break; \ + } \ + case e8_2: { \ + VFP_VF_CMP_PARAMS(8_2); \ + BODY8_2; \ + set_fp_exceptions; \ + break; \ + } \ + } \ + break; \ + } \ case e16: { \ VFP_VF_CMP_PARAMS(16); \ BODY16; \ @@ -1939,10 +2043,30 @@ reg_t index[P.VU.vlmax]; \ set_fp_exceptions; \ VI_VFP_LOOP_END -#define VI_VFP_CVT_INT_TO_FP(BODY16, BODY32, BODY64, sign) \ +// AAA insert extension if extension was added +#define VI_VFP_CVT_INT_TO_FP(BODY8_1, BODY8_2, BODY16, BODY32, BODY64, sign) \ VI_CHECK_SSS(false); \ VI_VFP_COMMON \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(8, 8_1, sign), \ + , \ + BODY8_1); \ + } \ + break; \ + } \ + case e8_2: { \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(8, 8_2, sign), \ + , \ + BODY8_2); \ + } \ + break; \ + } \ + } \ + break; \ + } \ case e16: \ { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 16, sign), \ { p->extension_enabled(EXT_ZVFH); }, \ @@ -1963,10 +2087,29 @@ reg_t index[P.VU.vlmax]; \ break; \ } -#define VI_VFP_CVT_FP_TO_INT(BODY16, BODY32, BODY64, sign) \ +#define VI_VFP_CVT_FP_TO_INT(BODY8_1, BODY8_2, BODY16, BODY32, BODY64, sign) \ VI_CHECK_SSS(false); \ VI_VFP_COMMON \ switch (P.VU.vsew) { \ + case e8: { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(8_1, 8, sign), \ + , \ + BODY8_1); \ + } \ + break; \ + } \ + case e8_2: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(8_2, 8, sign), \ + , \ + BODY8_2); \ + } \ + break; \ + } \ + } \ + break; \ + } \ case e16: \ { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(16, 16, sign), \ { p->extension_enabled(EXT_ZVFH); }, \ diff --git a/riscv/vector_unit.cc b/riscv/vector_unit.cc index 08adc6166d..789cda55ba 100644 --- a/riscv/vector_unit.cc +++ b/riscv/vector_unit.cc @@ -145,6 +145,8 @@ template uint8_t& vectorUnit_t::elt(reg_t, reg_t, bool); template uint16_t& vectorUnit_t::elt(reg_t, reg_t, bool); template uint32_t& vectorUnit_t::elt(reg_t, reg_t, bool); template uint64_t& vectorUnit_t::elt(reg_t, reg_t, bool); +template float8_1_t& vectorUnit_t::elt(reg_t, reg_t, bool); +template float8_2_t& vectorUnit_t::elt(reg_t, reg_t, bool); template float16_t& vectorUnit_t::elt(reg_t, reg_t, bool); template float32_t& vectorUnit_t::elt(reg_t, reg_t, bool); template float64_t& vectorUnit_t::elt(reg_t, reg_t, bool); diff --git a/riscv/vector_unit.h b/riscv/vector_unit.h index a057c62fbe..eef1d0690e 100644 --- a/riscv/vector_unit.h +++ b/riscv/vector_unit.h @@ -95,6 +95,7 @@ class vectorUnit_t reg_t vlenb; csr_t_p vxsat; vector_csr_t_p vxrm, vstart, vl, vtype; + int altfp; reg_t vma, vta; reg_t vsew; float vflmul; From 8da592df6832eb94aab43df25e174235fd17fb5f Mon Sep 17 00:00:00 2001 From: Abdallah Cheikh Date: Sat, 17 Feb 2024 10:11:54 +0100 Subject: [PATCH 04/31] modified the config files to integrate softfloat_8 functions --- configure | 46 +++++++++++++++++++++++++++++++++++++ configure.ac | 2 +- spike_main/spike_main.mk.in | 1 + 3 files changed, 48 insertions(+), 1 deletion(-) diff --git a/configure b/configure index 8095688d7b..b184c5c3d7 100755 --- a/configure +++ b/configure @@ -6950,6 +6950,51 @@ printf "%s\n" "#define SOFTFLOAT_ENABLED /**/" >>confdefs.h + # Add subproject to our running list + + subprojects="$subprojects softfloat_8" + + # Process the subproject appropriately. If enabled add it to the + # $enabled_subprojects running shell variable, set a + # SUBPROJECT_ENABLED C define, and include the appropriate + # 'subproject.ac'. + + + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: configuring default subproject : softfloat_8" >&5 +printf "%s\n" "$as_me: configuring default subproject : softfloat_8" >&6;} + ac_config_files="$ac_config_files softfloat_8.mk:softfloat_8/softfloat_8.mk.in" + + enable_softfloat_8_sproj="yes" + subprojects_enabled="$subprojects_enabled softfloat_8" + +printf "%s\n" "#define SOFTFLOAT_8_ENABLED /**/" >>confdefs.h + + + + + + + # Determine if this is a required or an optional subproject + + + + # Determine if there is a group with the same name + + + + # Create variations of the subproject name suitable for use as a CPP + # enabled define, a shell enabled variable, and a shell function + + + + + + + + + + + # Add subproject to our running list subprojects="$subprojects spike_main" @@ -7743,6 +7788,7 @@ do "customext.mk") CONFIG_FILES="$CONFIG_FILES customext.mk:customext/customext.mk.in" ;; "fdt.mk") CONFIG_FILES="$CONFIG_FILES fdt.mk:fdt/fdt.mk.in" ;; "softfloat.mk") CONFIG_FILES="$CONFIG_FILES softfloat.mk:softfloat/softfloat.mk.in" ;; + "softfloat_8.mk") CONFIG_FILES="$CONFIG_FILES softfloat_8.mk:softfloat_8/softfloat_8.mk.in" ;; "spike_main.mk") CONFIG_FILES="$CONFIG_FILES spike_main.mk:spike_main/spike_main.mk.in" ;; "spike_dasm.mk") CONFIG_FILES="$CONFIG_FILES spike_dasm.mk:spike_dasm/spike_dasm.mk.in" ;; "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;; diff --git a/configure.ac b/configure.ac index 701bd99481..5e2fdf6b75 100644 --- a/configure.ac +++ b/configure.ac @@ -104,7 +104,7 @@ AX_CHECK_COMPILE_FLAG([-relocatable-pch], AC_SUBST([HAVE_CLANG_PCH],[yes])) # The '*' suffix indicates an optional subproject. The '**' suffix # indicates an optional subproject which is also the name of a group. -MCPPBS_SUBPROJECTS([ fesvr, riscv, disasm, customext, fdt, softfloat, spike_main, spike_dasm ]) +MCPPBS_SUBPROJECTS([ fesvr, riscv, disasm, customext, fdt, softfloat, softfloat_8, spike_main, spike_dasm ]) #------------------------------------------------------------------------- # MCPPBS subproject groups diff --git a/spike_main/spike_main.mk.in b/spike_main/spike_main.mk.in index c842c4ed90..4ac53abd19 100644 --- a/spike_main/spike_main.mk.in +++ b/spike_main/spike_main.mk.in @@ -2,6 +2,7 @@ spike_main_subproject_deps = \ fdt \ fesvr \ softfloat \ + softfloat_8 \ disasm \ riscv \ From 8574bd81438d5d2edb03605f61821302fb7c9b2c Mon Sep 17 00:00:00 2001 From: Abdallah Cheikh Date: Sun, 18 Feb 2024 12:24:38 +0100 Subject: [PATCH 05/31] added support for the remainder instructions --- riscv/insns/vfmv_f_s.h | 6 ++- riscv/insns/vfmv_s_f.h | 12 ++++- riscv/insns/vfncvt_f_x_w.h | 2 + riscv/insns/vfncvt_f_xu_w.h | 2 + riscv/insns/vfncvtf8_f_f_w.h | 6 +++ riscv/insns/vfwcvt_rtz_x_f_v.h | 12 +++-- riscv/insns/vfwcvt_rtz_xu_f_v.h | 12 +++-- riscv/insns/vfwcvt_x_f_v.h | 12 +++-- riscv/insns/vfwcvt_xu_f_v.h | 14 +++--- riscv/insns/vfwcvtf8_f_f_v.h | 6 +++ riscv/v_ext_macros.h | 84 +++++++++++++++++++++++++++++++-- softfloat_8/softfloat_8.mk.in | 2 + 12 files changed, 144 insertions(+), 26 deletions(-) create mode 100644 riscv/insns/vfncvtf8_f_f_w.h create mode 100644 riscv/insns/vfwcvtf8_f_f_v.h diff --git a/riscv/insns/vfmv_f_s.h b/riscv/insns/vfmv_f_s.h index 1ad6bc693a..512c5f7f30 100644 --- a/riscv/insns/vfmv_f_s.h +++ b/riscv/insns/vfmv_f_s.h @@ -1,7 +1,8 @@ // vfmv_f_s: rd = vs2[0] (rs1=0) require_vector(true); require_fp; -require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || +require((P.VU.vsew == e8) || + (P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || (P.VU.vsew == e32 && p->extension_enabled('F')) || (P.VU.vsew == e64 && p->extension_enabled('D'))); require(STATE.frm->read() < 0x5); @@ -10,6 +11,9 @@ reg_t rs2_num = insn.rs2(); uint64_t vs2_0 = 0; const reg_t sew = P.VU.vsew; switch (sew) { + case e8: + vs2_0 = P.VU.elt(rs2_num, 0); + break; case e16: vs2_0 = P.VU.elt(rs2_num, 0); break; diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h index 4b1b955e56..4088afc794 100644 --- a/riscv/insns/vfmv_s_f.h +++ b/riscv/insns/vfmv_s_f.h @@ -1,7 +1,8 @@ // vfmv_s_f: vd[0] = rs1 (vs2=0) require_vector(true); require_fp; -require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || +require((P.VU.vsew == e8) || + (P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || (P.VU.vsew == e32 && p->extension_enabled('F')) || (P.VU.vsew == e64 && p->extension_enabled('D'))); require(STATE.frm->read() < 0x5); @@ -12,6 +13,15 @@ if (vl > 0 && P.VU.vstart->read() < vl) { reg_t rd_num = insn.rd(); switch (P.VU.vsew) { + case e8: + if (P.VU.altfp) { + P.VU.elt(rd_num, 0, true) = f8_1(FRS1).v; + break; + } else { + P.VU.elt(rd_num, 0, true) = f8_2(FRS1).v; + break; + } + break; case e16: P.VU.elt(rd_num, 0, true) = f16(FRS1).v; break; diff --git a/riscv/insns/vfncvt_f_x_w.h b/riscv/insns/vfncvt_f_x_w.h index 46f2d92f71..518f984393 100644 --- a/riscv/insns/vfncvt_f_x_w.h +++ b/riscv/insns/vfncvt_f_x_w.h @@ -1,5 +1,7 @@ // vfncvt.f.x.w vd, vs2, vm VI_VFP_NCVT_INT_TO_FP( + { vd = i16_to_f8_1(vs2); }, // BODY8_1 + { vd = i16_to_f8_2(vs2); }, // BODY8_2 { vd = i32_to_f16(vs2); }, // BODY32 { vd = i64_to_f32(vs2); }, // BODY64 { require_extension(EXT_ZVFH); }, // CHECK32 diff --git a/riscv/insns/vfncvt_f_xu_w.h b/riscv/insns/vfncvt_f_xu_w.h index 729fb528ee..d0e4332979 100644 --- a/riscv/insns/vfncvt_f_xu_w.h +++ b/riscv/insns/vfncvt_f_xu_w.h @@ -1,5 +1,7 @@ // vfncvt.f.xu.w vd, vs2, vm VI_VFP_NCVT_INT_TO_FP( + { vd = ui16_to_f8_1(vs2); }, // BODY8_1 + { vd = ui16_to_f8_2(vs2); }, // BODY8_2 { vd = ui32_to_f16(vs2); }, // BODY32 { vd = ui64_to_f32(vs2); }, // BODY64 { require_extension(EXT_ZVFH); }, // CHECK32 diff --git a/riscv/insns/vfncvtf8_f_f_w.h b/riscv/insns/vfncvtf8_f_f_w.h new file mode 100644 index 0000000000..20d24a26ac --- /dev/null +++ b/riscv/insns/vfncvtf8_f_f_w.h @@ -0,0 +1,6 @@ +// vfncvtf8.f.f.w vd, vs2, vm +VI_VFP_NCVT_BF16_TO_F8( + { vd = bf16_to_f8_1(vs2); }, // BODY8_1 + { vd = bf16_to_f8_2(vs2); }, // BODY8_2 + { NULL; } // AAA modify in case fp8 extension was added +) diff --git a/riscv/insns/vfwcvt_rtz_x_f_v.h b/riscv/insns/vfwcvt_rtz_x_f_v.h index 9caf617db3..24a5b88ccc 100644 --- a/riscv/insns/vfwcvt_rtz_x_f_v.h +++ b/riscv/insns/vfwcvt_rtz_x_f_v.h @@ -1,8 +1,10 @@ // vfwcvt.rtz.x.f.v vd, vs2, vm VI_VFP_WCVT_FP_TO_INT( - { vd = f16_to_i32(vs2, softfloat_round_minMag, true); }, // BODY16 - { vd = f32_to_i64(vs2, softfloat_round_minMag, true); }, // BODY32 - { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 - int // sign + { vd = f8_1_to_i16(vs2, softfloat_round_minMag, true); }, // BODY8_1 + { vd = f8_2_to_i16(vs2, softfloat_round_minMag, true); }, // BODY8_2 + { vd = f16_to_i32(vs2, softfloat_round_minMag, true); }, // BODY16 + { vd = f32_to_i64(vs2, softfloat_round_minMag, true); }, // BODY32 + { require_extension(EXT_ZVFH); }, // CHECK16 + { require_extension('F'); }, // CHECK32 + int // sign ) diff --git a/riscv/insns/vfwcvt_rtz_xu_f_v.h b/riscv/insns/vfwcvt_rtz_xu_f_v.h index a25d847637..9fbd14f330 100644 --- a/riscv/insns/vfwcvt_rtz_xu_f_v.h +++ b/riscv/insns/vfwcvt_rtz_xu_f_v.h @@ -1,8 +1,10 @@ // vfwcvt.rtz,xu.f.v vd, vs2, vm VI_VFP_WCVT_FP_TO_INT( - { vd = f16_to_ui32(vs2, softfloat_round_minMag, true); }, // BODY16 - { vd = f32_to_ui64(vs2, softfloat_round_minMag, true); }, // BODY32 - { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 - uint // sign + { vd = f8_1_to_ui16(vs2, softfloat_round_minMag, true); }, // BODY8_1 + { vd = f8_2_to_ui16(vs2, softfloat_round_minMag, true); }, // BODY8_2 + { vd = f16_to_ui32(vs2, softfloat_round_minMag, true); }, // BODY16 + { vd = f32_to_ui64(vs2, softfloat_round_minMag, true); }, // BODY32 + { require_extension(EXT_ZVFH); }, // CHECK16 + { require_extension('F'); }, // CHECK32 + uint // sign ) diff --git a/riscv/insns/vfwcvt_x_f_v.h b/riscv/insns/vfwcvt_x_f_v.h index 2d536adbad..914fd9c41e 100644 --- a/riscv/insns/vfwcvt_x_f_v.h +++ b/riscv/insns/vfwcvt_x_f_v.h @@ -1,8 +1,10 @@ // vfwcvt.x.f.v vd, vs2, vm VI_VFP_WCVT_FP_TO_INT( - { vd = f16_to_i32(vs2, softfloat_roundingMode, true); }, // BODY16 - { vd = f32_to_i64(vs2, softfloat_roundingMode, true); }, // BODY32 - { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 - int // sign + { vd = f8_1_to_i16(vs2, softfloat_roundingMode, true); }, // BODY8_1 + { vd = f8_2_to_i16(vs2, softfloat_roundingMode, true); }, // BODY8_2 + { vd = f16_to_i32(vs2, softfloat_roundingMode, true); }, // BODY16 + { vd = f32_to_i64(vs2, softfloat_roundingMode, true); }, // BODY32 + { require_extension(EXT_ZVFH); }, // CHECK16 + { require_extension('F'); }, // CHECK32 + int // sign ) diff --git a/riscv/insns/vfwcvt_xu_f_v.h b/riscv/insns/vfwcvt_xu_f_v.h index 37201f5b2c..9b51ad93f2 100644 --- a/riscv/insns/vfwcvt_xu_f_v.h +++ b/riscv/insns/vfwcvt_xu_f_v.h @@ -1,8 +1,10 @@ // vfwcvt.xu.f.v vd, vs2, vm VI_VFP_WCVT_FP_TO_INT( - { vd = f16_to_ui32(vs2, softfloat_roundingMode, true); }, // BODY16 - { vd = f32_to_ui64(vs2, softfloat_roundingMode, true); }, // BODY32 - { require_extension(EXT_ZVFH); }, // CHECK16 - { require_extension('F'); }, // CHECK32 - uint // sign -) + { vd = f8_1_to_ui16(vs2, softfloat_roundingMode, true); }, // BODY8_1 + { vd = f8_2_to_ui16(vs2, softfloat_roundingMode, true); }, // BODY8_2 + { vd = f16_to_ui32(vs2, softfloat_roundingMode, true); }, // BODY16 + { vd = f32_to_ui64(vs2, softfloat_roundingMode, true); }, // BODY32 + { require_extension(EXT_ZVFH); }, // CHECK16 + { require_extension('F'); }, // CHECK32 + uint // sign +) diff --git a/riscv/insns/vfwcvtf8_f_f_v.h b/riscv/insns/vfwcvtf8_f_f_v.h new file mode 100644 index 0000000000..c67fb795da --- /dev/null +++ b/riscv/insns/vfwcvtf8_f_f_v.h @@ -0,0 +1,6 @@ +// vfwcvtbf16.f.f.v vd, vs2, vm +VI_VFP_WCVT_FP_TO_BF16( + { vd = f8_1_to_bf16(vs2); }, // BODY8_1 + { vd = f8_2_to_bf16(vs2); }, // BODY8_2 + { NULL; } // AAA modify in case fp8 extension was adde +d) diff --git a/riscv/v_ext_macros.h b/riscv/v_ext_macros.h index 8db9322934..59ca1d9261 100644 --- a/riscv/v_ext_macros.h +++ b/riscv/v_ext_macros.h @@ -586,7 +586,20 @@ static inline bool is_overlapped_widen(const int astart, int asize, VI_VFP_COMMON \ for (reg_t i = P.VU.vstart->read(); i < vl; ++i) { \ VI_MERGE_VARS \ - if (P.VU.vsew == e16) { \ + if (P.VU.vsew == e8) { \ + switch(P.VU.altfp) { \ + case e8_1: { \ + VFP_VF_PARAMS(8_1); \ + BODY; \ + break; \ + } \ + case e8_2: { \ + VFP_VF_PARAMS(8_2); \ + BODY; \ + break; \ + } \ + } \ + } else if (P.VU.vsew == e16) { \ VFP_VF_PARAMS(16); \ BODY; \ } else if (P.VU.vsew == e32) { \ @@ -2145,6 +2158,26 @@ reg_t index[P.VU.vlmax]; \ break; \ } +#define VI_VFP_WCVT_FP8_TO_BF16(BODY8_1, BODY8_2, CHECK) \ + VI_CHECK_DSS(false); \ + switch (P.VU.vsew) { \ + case e8: \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_FP_PARAMS(8_1, 16), CHECK, BODY8_1); } \ + break; \ + } \ + case e8_2: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_FP_PARAMS(8_2, 16), CHECK, BODY8_2); } \ + break; \ + } \ + } \ + break; \ + default: \ + require(0); \ + break; \ + } + #define VI_VFP_WCVT_FP_TO_BF16(BODY, CHECK) \ VI_CHECK_DSS(false); \ switch (P.VU.vsew) { \ @@ -2175,11 +2208,23 @@ reg_t index[P.VU.vlmax]; \ break; \ } -#define VI_VFP_WCVT_FP_TO_INT(BODY16, BODY32, \ +#define VI_VFP_WCVT_FP_TO_INT(BODY8_1, BODY8_2, BODY16, BODY32, \ CHECK16, CHECK32, \ sign) \ VI_CHECK_DSS(false); \ switch (P.VU.vsew) { \ + case e8: \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(8_1, 16, sign), CHECK16, BODY8_1); } \ + break; \ + } \ + case e8_2: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(8_2, 16, sign), CHECK16, BODY8_2); } \ + break; \ + } \ + } \ + break; \ case e16: \ { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(16, 32, sign), CHECK16, BODY16); } \ break; \ @@ -2206,6 +2251,26 @@ reg_t index[P.VU.vlmax]; \ break; \ } +#define VI_VFP_NCVT_BF16_TO_F8(BODY8_1, BODY8_2, CHECK) \ + VI_CHECK_SDS(false); \ + switch (P.VU.vsew) { \ + case e8: \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_FP_PARAMS(16, 8_1), CHECK, BODY8_1); } \ + break; \ + } \ + case e8_2: { \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_FP_PARAMS(16, 8_2), CHECK, BODY8_2); } \ + break; \ + } \ + } \ + break; \ + default: \ + require(0); \ + break; \ + } + #define VI_VFP_NCVT_BF16_TO_FP(BODY, CHECK) \ VI_CHECK_SDS(false); \ switch (P.VU.vsew) { \ @@ -2217,11 +2282,24 @@ reg_t index[P.VU.vlmax]; \ break; \ } -#define VI_VFP_NCVT_INT_TO_FP(BODY32, BODY64, \ +#define VI_VFP_NCVT_INT_TO_FP(BODY8_1, BODY8_2, \ + BODY32, BODY64, \ CHECK32, CHECK64, \ sign) \ VI_CHECK_SDS(false); \ switch (P.VU.vsew) { \ + case e8: \ + switch(P.VU.altfp) { \ + case e8_1: { \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 8_1, sign), CHECK32, BODY8_1); } \ + break; \ + } \ + case e8_2: {\ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 8_1, sign), CHECK32, BODY8_1); } \ + break; \ + } \ + } \ + break; \ case e16: \ { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(32, 16, sign), CHECK32, BODY32); } \ break; \ diff --git a/softfloat_8/softfloat_8.mk.in b/softfloat_8/softfloat_8.mk.in index 6fcfa32ea7..a7080d1fc6 100644 --- a/softfloat_8/softfloat_8.mk.in +++ b/softfloat_8/softfloat_8.mk.in @@ -55,6 +55,8 @@ softfloat_8_c_srcs = \ f8_2_to_ui16.c \ f8_2_to_ui32.c \ i8_to_bf16.c \ + i16_to_f8_1.c \ + i16_to_f8_2.c \ i32_to_f8_1.c \ i32_to_f8_2.c \ s_addMagsF8_1.c \ From 0cdaeef2eb9bd5838e0c719ff1c888c3f2ce53e6 Mon Sep 17 00:00:00 2001 From: Abdallah Cheikh Date: Sun, 18 Feb 2024 12:46:22 +0100 Subject: [PATCH 06/31] --- softfloat_8/bf16_to_f8_1.c | 16 +++++++++ softfloat_8/bf16_to_f8_1_old.c | 16 +++++++++ softfloat_8/bf16_to_f8_2.c | 16 +++++++++ softfloat_8/bf16_to_f8_2_old.c | 16 +++++++++ softfloat_8/bf16_to_i8.c | 15 +++++++++ softfloat_8/bf16_to_ui8.c | 15 +++++++++ softfloat_8/f8_1_2_recip7_rsqrte7.c | 15 +++++++++ softfloat_8/f8_1_add.c | 15 +++++++++ softfloat_8/f8_1_classify.c | 15 +++++++++ softfloat_8/f8_1_div.c | 15 +++++++++ softfloat_8/f8_1_eq.c | 15 +++++++++ softfloat_8/f8_1_le.c | 15 +++++++++ softfloat_8/f8_1_lt.c | 15 +++++++++ softfloat_8/f8_1_lt_quiet.c | 15 +++++++++ softfloat_8/f8_1_max_min.c | 15 +++++++++ softfloat_8/f8_1_mul.c | 15 +++++++++ softfloat_8/f8_1_mulAdd.c | 15 +++++++++ softfloat_8/f8_1_sqrt.c | 15 +++++++++ softfloat_8/f8_1_sub.c | 15 +++++++++ softfloat_8/f8_1_to_bf16.c | 16 +++++++++ softfloat_8/f8_1_to_f8_2.c | 15 +++++++++ softfloat_8/f8_1_to_i16.c | 15 +++++++++ softfloat_8/f8_1_to_i32.c | 15 +++++++++ softfloat_8/f8_1_to_i8.c | 15 +++++++++ softfloat_8/f8_1_to_ui16.c | 15 +++++++++ softfloat_8/f8_1_to_ui32.c | 15 +++++++++ softfloat_8/f8_1_to_ui8.c | 15 +++++++++ softfloat_8/f8_2_add.c | 15 +++++++++ softfloat_8/f8_2_classify.c | 15 +++++++++ softfloat_8/f8_2_div.c | 15 +++++++++ softfloat_8/f8_2_eq.c | 15 +++++++++ softfloat_8/f8_2_le.c | 15 +++++++++ softfloat_8/f8_2_lt.c | 15 +++++++++ softfloat_8/f8_2_lt_quiet.c | 15 +++++++++ softfloat_8/f8_2_max_min.c | 15 +++++++++ softfloat_8/f8_2_mul.c | 15 +++++++++ softfloat_8/f8_2_mulAdd.c | 15 +++++++++ softfloat_8/f8_2_sqrt.c | 17 +++++++++- softfloat_8/f8_2_sub.c | 15 +++++++++ softfloat_8/f8_2_to_bf16.c | 16 +++++++++ softfloat_8/f8_2_to_f8_1.c | 15 +++++++++ softfloat_8/f8_2_to_i16.c | 15 +++++++++ softfloat_8/f8_2_to_i32.c | 15 +++++++++ softfloat_8/f8_2_to_i8.c | 15 +++++++++ softfloat_8/f8_2_to_ui16.c | 15 +++++++++ softfloat_8/f8_2_to_ui32.c | 15 +++++++++ softfloat_8/f8_2_to_ui8.c | 15 +++++++++ softfloat_8/i16_to_f8_1.c | 15 +++++++++ softfloat_8/i16_to_f8_2.c | 15 +++++++++ softfloat_8/i32_to_f8_1.c | 16 +++++++++ softfloat_8/i32_to_f8_2.c | 15 +++++++++ softfloat_8/i8_to_bf16.c | 15 +++++++++ softfloat_8/internals.h | 40 ++++++----------------- softfloat_8/primitives.h | 40 ++++++----------------- softfloat_8/s_addMagsF8_1.c | 15 +++++++++ softfloat_8/s_addMagsF8_2.c | 15 +++++++++ softfloat_8/s_mulAddF8_1.c | 15 +++++++++ softfloat_8/s_mulAddF8_2.c | 15 +++++++++ softfloat_8/s_normRoundPackToF8_1.c | 15 +++++++++ softfloat_8/s_normRoundPackToF8_2.c | 15 +++++++++ softfloat_8/s_normSubnormalF8_1Sig.c | 15 +++++++++ softfloat_8/s_normSubnormalF8_2Sig.c | 15 +++++++++ softfloat_8/s_propagateNaNF8_1UI.c | 15 +++++++++ softfloat_8/s_propagateNaNF8_2UI.c | 15 +++++++++ softfloat_8/s_roundPackToF8_1.c | 15 +++++++++ softfloat_8/s_roundPackToF8_2.c | 15 +++++++++ softfloat_8/s_subMagsF8_1.c | 15 +++++++++ softfloat_8/s_subMagsF8_2.c | 15 +++++++++ softfloat_8/softfloat.h | 49 ++++++---------------------- softfloat_8/softfloat_types.h | 48 ++++++--------------------- softfloat_8/specialize.h | 40 ++++++----------------- softfloat_8/ui16_to_f8_1.c | 15 +++++++++ softfloat_8/ui16_to_f8_2.c | 15 +++++++++ softfloat_8/ui32_to_f8_1.c | 15 +++++++++ softfloat_8/ui32_to_f8_2.c | 15 +++++++++ softfloat_8/ui8_to_bf16.c | 15 +++++++++ 76 files changed, 1123 insertions(+), 168 deletions(-) diff --git a/softfloat_8/bf16_to_f8_1.c b/softfloat_8/bf16_to_f8_1.c index 049f71fdc7..91da3b16a8 100644 --- a/softfloat_8/bf16_to_f8_1.c +++ b/softfloat_8/bf16_to_f8_1.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "platform.h" diff --git a/softfloat_8/bf16_to_f8_1_old.c b/softfloat_8/bf16_to_f8_1_old.c index 9cb875daf8..da59a682c1 100644 --- a/softfloat_8/bf16_to_f8_1_old.c +++ b/softfloat_8/bf16_to_f8_1_old.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "platform.h" diff --git a/softfloat_8/bf16_to_f8_2.c b/softfloat_8/bf16_to_f8_2.c index 89f39b7c4b..270f950950 100644 --- a/softfloat_8/bf16_to_f8_2.c +++ b/softfloat_8/bf16_to_f8_2.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "platform.h" diff --git a/softfloat_8/bf16_to_f8_2_old.c b/softfloat_8/bf16_to_f8_2_old.c index b7c8aa6955..d33fc624f7 100644 --- a/softfloat_8/bf16_to_f8_2_old.c +++ b/softfloat_8/bf16_to_f8_2_old.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "platform.h" diff --git a/softfloat_8/bf16_to_i8.c b/softfloat_8/bf16_to_i8.c index cad0eb665b..de4ec2bb0a 100644 --- a/softfloat_8/bf16_to_i8.c +++ b/softfloat_8/bf16_to_i8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/bf16_to_ui8.c b/softfloat_8/bf16_to_ui8.c index 532f2e8862..a303651493 100644 --- a/softfloat_8/bf16_to_ui8.c +++ b/softfloat_8/bf16_to_ui8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_1_2_recip7_rsqrte7.c b/softfloat_8/f8_1_2_recip7_rsqrte7.c index 4749554395..facd2461a2 100644 --- a/softfloat_8/f8_1_2_recip7_rsqrte7.c +++ b/softfloat_8/f8_1_2_recip7_rsqrte7.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_add.c b/softfloat_8/f8_1_add.c index d36850820e..3a6c07902f 100644 --- a/softfloat_8/f8_1_add.c +++ b/softfloat_8/f8_1_add.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_classify.c b/softfloat_8/f8_1_classify.c index 7581e47fbc..f7c3063be0 100644 --- a/softfloat_8/f8_1_classify.c +++ b/softfloat_8/f8_1_classify.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_div.c b/softfloat_8/f8_1_div.c index fb67aa5254..dbbfd0791a 100644 --- a/softfloat_8/f8_1_div.c +++ b/softfloat_8/f8_1_div.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_eq.c b/softfloat_8/f8_1_eq.c index 92e0df3ad0..d97b7be8e6 100644 --- a/softfloat_8/f8_1_eq.c +++ b/softfloat_8/f8_1_eq.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_le.c b/softfloat_8/f8_1_le.c index 2886a8d530..a1b2f44a83 100644 --- a/softfloat_8/f8_1_le.c +++ b/softfloat_8/f8_1_le.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_lt.c b/softfloat_8/f8_1_lt.c index 84f9c5f0fd..73a925222e 100644 --- a/softfloat_8/f8_1_lt.c +++ b/softfloat_8/f8_1_lt.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_lt_quiet.c b/softfloat_8/f8_1_lt_quiet.c index 201ab5cd62..e746d67713 100644 --- a/softfloat_8/f8_1_lt_quiet.c +++ b/softfloat_8/f8_1_lt_quiet.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_max_min.c b/softfloat_8/f8_1_max_min.c index af0d1ec297..1dd11e1543 100644 --- a/softfloat_8/f8_1_max_min.c +++ b/softfloat_8/f8_1_max_min.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_mul.c b/softfloat_8/f8_1_mul.c index 73bc8e04bf..72aa577831 100644 --- a/softfloat_8/f8_1_mul.c +++ b/softfloat_8/f8_1_mul.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_mulAdd.c b/softfloat_8/f8_1_mulAdd.c index a73b6e6563..4e5ac7c90c 100644 --- a/softfloat_8/f8_1_mulAdd.c +++ b/softfloat_8/f8_1_mulAdd.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/f8_1_sqrt.c b/softfloat_8/f8_1_sqrt.c index ffaad3841d..f25ea3ae2e 100644 --- a/softfloat_8/f8_1_sqrt.c +++ b/softfloat_8/f8_1_sqrt.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_sub.c b/softfloat_8/f8_1_sub.c index e34501760e..75dcb59115 100644 --- a/softfloat_8/f8_1_sub.c +++ b/softfloat_8/f8_1_sub.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_to_bf16.c b/softfloat_8/f8_1_to_bf16.c index 93a2575f0c..4cc3a7e4e8 100644 --- a/softfloat_8/f8_1_to_bf16.c +++ b/softfloat_8/f8_1_to_bf16.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "internals.h" diff --git a/softfloat_8/f8_1_to_f8_2.c b/softfloat_8/f8_1_to_f8_2.c index e3730521bb..3db40d7504 100644 --- a/softfloat_8/f8_1_to_f8_2.c +++ b/softfloat_8/f8_1_to_f8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_to_i16.c b/softfloat_8/f8_1_to_i16.c index 93974809dd..150b80be0e 100644 --- a/softfloat_8/f8_1_to_i16.c +++ b/softfloat_8/f8_1_to_i16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_1_to_i32.c b/softfloat_8/f8_1_to_i32.c index 74a71772e2..e76e111632 100644 --- a/softfloat_8/f8_1_to_i32.c +++ b/softfloat_8/f8_1_to_i32.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_to_i8.c b/softfloat_8/f8_1_to_i8.c index bc0c0deffc..0acdee5936 100644 --- a/softfloat_8/f8_1_to_i8.c +++ b/softfloat_8/f8_1_to_i8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_1_to_ui16.c b/softfloat_8/f8_1_to_ui16.c index 4cd048107a..9f93acc5fb 100644 --- a/softfloat_8/f8_1_to_ui16.c +++ b/softfloat_8/f8_1_to_ui16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_1_to_ui32.c b/softfloat_8/f8_1_to_ui32.c index a4dc0de98d..33e56be6d5 100644 --- a/softfloat_8/f8_1_to_ui32.c +++ b/softfloat_8/f8_1_to_ui32.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_1_to_ui8.c b/softfloat_8/f8_1_to_ui8.c index c761a6fd5d..51095df3ab 100644 --- a/softfloat_8/f8_1_to_ui8.c +++ b/softfloat_8/f8_1_to_ui8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_add.c b/softfloat_8/f8_2_add.c index dc036e53aa..6cb0ae9539 100644 --- a/softfloat_8/f8_2_add.c +++ b/softfloat_8/f8_2_add.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_classify.c b/softfloat_8/f8_2_classify.c index b09465eea2..32544957b2 100644 --- a/softfloat_8/f8_2_classify.c +++ b/softfloat_8/f8_2_classify.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_div.c b/softfloat_8/f8_2_div.c index 011154d244..61a8c55a14 100644 --- a/softfloat_8/f8_2_div.c +++ b/softfloat_8/f8_2_div.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_eq.c b/softfloat_8/f8_2_eq.c index 6f2f382179..06826a736d 100644 --- a/softfloat_8/f8_2_eq.c +++ b/softfloat_8/f8_2_eq.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_le.c b/softfloat_8/f8_2_le.c index a0a6cad5ad..4996ec7951 100644 --- a/softfloat_8/f8_2_le.c +++ b/softfloat_8/f8_2_le.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_lt.c b/softfloat_8/f8_2_lt.c index 7bdecaa990..d7a3ca4b32 100644 --- a/softfloat_8/f8_2_lt.c +++ b/softfloat_8/f8_2_lt.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_lt_quiet.c b/softfloat_8/f8_2_lt_quiet.c index d168a2fd75..82caf22ffe 100644 --- a/softfloat_8/f8_2_lt_quiet.c +++ b/softfloat_8/f8_2_lt_quiet.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_max_min.c b/softfloat_8/f8_2_max_min.c index 07268a6baa..0059ac943a 100644 --- a/softfloat_8/f8_2_max_min.c +++ b/softfloat_8/f8_2_max_min.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_mul.c b/softfloat_8/f8_2_mul.c index 30dd962572..bc86c488b9 100644 --- a/softfloat_8/f8_2_mul.c +++ b/softfloat_8/f8_2_mul.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_mulAdd.c b/softfloat_8/f8_2_mulAdd.c index e94983c97e..599436d952 100644 --- a/softfloat_8/f8_2_mulAdd.c +++ b/softfloat_8/f8_2_mulAdd.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/f8_2_sqrt.c b/softfloat_8/f8_2_sqrt.c index e143cdfc93..025b28c71e 100644 --- a/softfloat_8/f8_2_sqrt.c +++ b/softfloat_8/f8_2_sqrt.c @@ -1,4 +1,19 @@ -//solo per prova +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "platform.h" diff --git a/softfloat_8/f8_2_sub.c b/softfloat_8/f8_2_sub.c index 86786a003f..dc5fb9668c 100644 --- a/softfloat_8/f8_2_sub.c +++ b/softfloat_8/f8_2_sub.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_bf16.c b/softfloat_8/f8_2_to_bf16.c index 4f726047f7..ec7b3a1d2d 100644 --- a/softfloat_8/f8_2_to_bf16.c +++ b/softfloat_8/f8_2_to_bf16.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include #include "internals.h" diff --git a/softfloat_8/f8_2_to_f8_1.c b/softfloat_8/f8_2_to_f8_1.c index eb3f6fb2b6..3e498679cc 100644 --- a/softfloat_8/f8_2_to_f8_1.c +++ b/softfloat_8/f8_2_to_f8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_i16.c b/softfloat_8/f8_2_to_i16.c index c6c84b458e..4f9aaa0f0c 100644 --- a/softfloat_8/f8_2_to_i16.c +++ b/softfloat_8/f8_2_to_i16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_i32.c b/softfloat_8/f8_2_to_i32.c index 086c9c3c4c..5092ade971 100644 --- a/softfloat_8/f8_2_to_i32.c +++ b/softfloat_8/f8_2_to_i32.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_i8.c b/softfloat_8/f8_2_to_i8.c index 1767b0d216..4854cc7163 100644 --- a/softfloat_8/f8_2_to_i8.c +++ b/softfloat_8/f8_2_to_i8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_ui16.c b/softfloat_8/f8_2_to_ui16.c index e63a58bdd7..c233d83a4a 100644 --- a/softfloat_8/f8_2_to_ui16.c +++ b/softfloat_8/f8_2_to_ui16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_ui32.c b/softfloat_8/f8_2_to_ui32.c index bdc970cec0..940074d7f5 100644 --- a/softfloat_8/f8_2_to_ui32.c +++ b/softfloat_8/f8_2_to_ui32.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_ui8.c b/softfloat_8/f8_2_to_ui8.c index 8871c35fe5..2fd7a36fcb 100644 --- a/softfloat_8/f8_2_to_ui8.c +++ b/softfloat_8/f8_2_to_ui8.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/i16_to_f8_1.c b/softfloat_8/i16_to_f8_1.c index 85ed47860e..7ae67cb7e1 100644 --- a/softfloat_8/i16_to_f8_1.c +++ b/softfloat_8/i16_to_f8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/i16_to_f8_2.c b/softfloat_8/i16_to_f8_2.c index 9a91108908..5c8f04ee79 100644 --- a/softfloat_8/i16_to_f8_2.c +++ b/softfloat_8/i16_to_f8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/i32_to_f8_1.c b/softfloat_8/i32_to_f8_1.c index ce936a3682..441372ac44 100644 --- a/softfloat_8/i32_to_f8_1.c +++ b/softfloat_8/i32_to_f8_1.c @@ -1,3 +1,19 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ + #include #include "platform.h" #include "internals.h" diff --git a/softfloat_8/i32_to_f8_2.c b/softfloat_8/i32_to_f8_2.c index 3853ed13e3..570dfe3142 100644 --- a/softfloat_8/i32_to_f8_2.c +++ b/softfloat_8/i32_to_f8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/i8_to_bf16.c b/softfloat_8/i8_to_bf16.c index 19e0bd011d..6109f60e97 100644 --- a/softfloat_8/i8_to_bf16.c +++ b/softfloat_8/i8_to_bf16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/internals.h b/softfloat_8/internals.h index f55f8e3b32..84e77c82a0 100644 --- a/softfloat_8/internals.h +++ b/softfloat_8/internals.h @@ -1,37 +1,17 @@ - /*============================================================================ +Copyright 2023 Sapienza University of Rome -This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic -Package, Release 3d, by John R. Hauser. - -Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the -University of California. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions, and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions, and the following disclaimer in the documentation - and/or other materials provided with the distribution. - - 3. Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at -THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE -DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + http://www.apache.org/licenses/LICENSE-2.0 +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. =============================================================================*/ #ifndef internals_8_h diff --git a/softfloat_8/primitives.h b/softfloat_8/primitives.h index d17b1fa3e1..524b5ce6e2 100644 --- a/softfloat_8/primitives.h +++ b/softfloat_8/primitives.h @@ -1,37 +1,17 @@ - /*============================================================================ +Copyright 2023 Sapienza University of Rome -This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic -Package, Release 3d, by John R. Hauser. - -Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the -University of California. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions, and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions, and the following disclaimer in the documentation - and/or other materials provided with the distribution. - - 3. Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at -THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE -DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + http://www.apache.org/licenses/LICENSE-2.0 +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. =============================================================================*/ #ifndef primitives_8_h diff --git a/softfloat_8/s_addMagsF8_1.c b/softfloat_8/s_addMagsF8_1.c index 0b86d2f787..d0c35f651b 100644 --- a/softfloat_8/s_addMagsF8_1.c +++ b/softfloat_8/s_addMagsF8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_addMagsF8_2.c b/softfloat_8/s_addMagsF8_2.c index 8c1a6036b0..cebb4f4dfc 100644 --- a/softfloat_8/s_addMagsF8_2.c +++ b/softfloat_8/s_addMagsF8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_mulAddF8_1.c b/softfloat_8/s_mulAddF8_1.c index b8d3f80916..ab086c82db 100644 --- a/softfloat_8/s_mulAddF8_1.c +++ b/softfloat_8/s_mulAddF8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_mulAddF8_2.c b/softfloat_8/s_mulAddF8_2.c index f0c2e488af..d3484a4244 100644 --- a/softfloat_8/s_mulAddF8_2.c +++ b/softfloat_8/s_mulAddF8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_normRoundPackToF8_1.c b/softfloat_8/s_normRoundPackToF8_1.c index c9b3891fd7..3c3e60068a 100644 --- a/softfloat_8/s_normRoundPackToF8_1.c +++ b/softfloat_8/s_normRoundPackToF8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_normRoundPackToF8_2.c b/softfloat_8/s_normRoundPackToF8_2.c index ccd793ef0c..89e5570c08 100644 --- a/softfloat_8/s_normRoundPackToF8_2.c +++ b/softfloat_8/s_normRoundPackToF8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_normSubnormalF8_1Sig.c b/softfloat_8/s_normSubnormalF8_1Sig.c index 47ac630fb2..adeb07d2bd 100644 --- a/softfloat_8/s_normSubnormalF8_1Sig.c +++ b/softfloat_8/s_normSubnormalF8_1Sig.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/s_normSubnormalF8_2Sig.c b/softfloat_8/s_normSubnormalF8_2Sig.c index 84b34e858b..ba44ac0a36 100644 --- a/softfloat_8/s_normSubnormalF8_2Sig.c +++ b/softfloat_8/s_normSubnormalF8_2Sig.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/s_propagateNaNF8_1UI.c b/softfloat_8/s_propagateNaNF8_1UI.c index 1c49ec21ff..a13a28b2b0 100644 --- a/softfloat_8/s_propagateNaNF8_1UI.c +++ b/softfloat_8/s_propagateNaNF8_1UI.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/s_propagateNaNF8_2UI.c b/softfloat_8/s_propagateNaNF8_2UI.c index 7b0a1ec3d6..9a59434228 100644 --- a/softfloat_8/s_propagateNaNF8_2UI.c +++ b/softfloat_8/s_propagateNaNF8_2UI.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/s_roundPackToF8_1.c b/softfloat_8/s_roundPackToF8_1.c index 4c3ebf188c..fe50c58624 100644 --- a/softfloat_8/s_roundPackToF8_1.c +++ b/softfloat_8/s_roundPackToF8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_roundPackToF8_2.c b/softfloat_8/s_roundPackToF8_2.c index 0b2955f96b..17c9ab7f5c 100644 --- a/softfloat_8/s_roundPackToF8_2.c +++ b/softfloat_8/s_roundPackToF8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_subMagsF8_1.c b/softfloat_8/s_subMagsF8_1.c index 7062d07db6..d0980f3de1 100644 --- a/softfloat_8/s_subMagsF8_1.c +++ b/softfloat_8/s_subMagsF8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/s_subMagsF8_2.c b/softfloat_8/s_subMagsF8_2.c index 67c56d6974..60451cd3de 100644 --- a/softfloat_8/s_subMagsF8_2.c +++ b/softfloat_8/s_subMagsF8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include diff --git a/softfloat_8/softfloat.h b/softfloat_8/softfloat.h index 7ad84697e7..a2dd12de2e 100644 --- a/softfloat_8/softfloat.h +++ b/softfloat_8/softfloat.h @@ -1,48 +1,19 @@ - /*============================================================================ +Copyright 2023 Sapienza University of Rome -This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic -Package, Release 3d, by John R. Hauser. - -Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the -University of California. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions, and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions, and the following disclaimer in the documentation - and/or other materials provided with the distribution. +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at - 3. Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE -DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + http://www.apache.org/licenses/LICENSE-2.0 +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. =============================================================================*/ - -/*============================================================================ -| Note: If SoftFloat is made available as a general library for programs to -| use, it is strongly recommended that a platform-specific version of this -| header, "softfloat.h", be created that folds in "softfloat_types.h" and that -| eliminates all dependencies on compile-time macros. -*============================================================================*/ - - #ifndef softfloat_8_h #define softfloat_8_h 1 diff --git a/softfloat_8/softfloat_types.h b/softfloat_8/softfloat_types.h index a9fe19ea1b..c0e4c71b8f 100644 --- a/softfloat_8/softfloat_types.h +++ b/softfloat_8/softfloat_types.h @@ -1,37 +1,17 @@ - /*============================================================================ +Copyright 2023 Sapienza University of Rome -This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic -Package, Release 3d, by John R. Hauser. - -Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of -California. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions, and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions, and the following disclaimer in the documentation - and/or other materials provided with the distribution. - - 3. Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at -THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE -DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + http://www.apache.org/licenses/LICENSE-2.0 +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. =============================================================================*/ #ifndef softfloat_8_types_h @@ -39,14 +19,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include -/*---------------------------------------------------------------------------- -| Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point -| arguments and results to/from functions. These types must be exactly -| 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively. Where a -| platform has "native" support for IEEE-Standard floating-point formats, -| the types below may, if desired, be defined as aliases for the native types -| (typically 'float' and 'double', and possibly 'long double'). -*----------------------------------------------------------------------------*/ typedef struct { uint8_t v; } float8_1_t; // 1-4-3 typedef struct { uint8_t v; } float8_2_t; // 1-5-2 diff --git a/softfloat_8/specialize.h b/softfloat_8/specialize.h index d083ccee2f..49f00ae2f3 100644 --- a/softfloat_8/specialize.h +++ b/softfloat_8/specialize.h @@ -1,37 +1,17 @@ - /*============================================================================ +Copyright 2023 Sapienza University of Rome -This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic -Package, Release 3d, by John R. Hauser. - -Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of -California. All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, - this list of conditions, and the following disclaimer. - - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions, and the following disclaimer in the documentation - and/or other materials provided with the distribution. - - 3. Neither the name of the University nor the names of its contributors may - be used to endorse or promote products derived from this software without - specific prior written permission. +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at -THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE -DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY -DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + http://www.apache.org/licenses/LICENSE-2.0 +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. =============================================================================*/ #ifndef specialize_8_h diff --git a/softfloat_8/ui16_to_f8_1.c b/softfloat_8/ui16_to_f8_1.c index 83430171ce..0f96e6fadf 100644 --- a/softfloat_8/ui16_to_f8_1.c +++ b/softfloat_8/ui16_to_f8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/ui16_to_f8_2.c b/softfloat_8/ui16_to_f8_2.c index 1cd9bc65bb..2fedd82363 100644 --- a/softfloat_8/ui16_to_f8_2.c +++ b/softfloat_8/ui16_to_f8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/ui32_to_f8_1.c b/softfloat_8/ui32_to_f8_1.c index 8140d4ce88..fd1f530501 100644 --- a/softfloat_8/ui32_to_f8_1.c +++ b/softfloat_8/ui32_to_f8_1.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/ui32_to_f8_2.c b/softfloat_8/ui32_to_f8_2.c index bf1c867704..b86af2516f 100644 --- a/softfloat_8/ui32_to_f8_2.c +++ b/softfloat_8/ui32_to_f8_2.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/ui8_to_bf16.c b/softfloat_8/ui8_to_bf16.c index 83cd760ceb..20c10d0942 100644 --- a/softfloat_8/ui8_to_bf16.c +++ b/softfloat_8/ui8_to_bf16.c @@ -1,3 +1,18 @@ +/*============================================================================ +Copyright 2023 Sapienza University of Rome + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +=============================================================================*/ #include #include "platform.h" From b16a2287c122323f5ce904cda9cf3670b3206643 Mon Sep 17 00:00:00 2001 From: aesash Date: Sun, 29 Jun 2025 21:30:34 +0200 Subject: [PATCH 07/31] started adding option to change FP8 --- riscv/processor.cc | 11 +++++++++++ riscv/processor.h | 1 + 2 files changed, 12 insertions(+) diff --git a/riscv/processor.cc b/riscv/processor.cc index cfce08f751..6625341ca7 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -55,6 +55,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg, #endif parse_varch_string(cfg->varch); + parse_varch_string(cfg->vfp8); register_base_instructions(); mmu = new mmu_t(sim, cfg->endianness, this); @@ -182,6 +183,16 @@ void processor_t::parse_varch_string(const char* s) VU.vstart_alu = vstart_alu; } +void processor_t::parse_vfp8_string(const char* s) { + if (strcmp(s,"1") == 0) { + VU.altfp == 0; + } + else if (strcmp(s,"2") == 0) { + VU.altfp == 1; + } +} + + static int xlen_to_uxl(int xlen) { if (xlen == 32) diff --git a/riscv/processor.h b/riscv/processor.h index f9dcf253cc..1cc6d38a1a 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -358,6 +358,7 @@ class processor_t : public abstract_device_t friend class extension_t; void parse_varch_string(const char*); + void parse_vfp8_string(const char*); void parse_priv_string(const char*); void build_opcode_map(); void register_base_instructions(); From b62def0b22233779a707a985fe51aaf601cdc572 Mon Sep 17 00:00:00 2001 From: aesash Date: Sun, 29 Jun 2025 23:09:55 +0200 Subject: [PATCH 08/31] added VFP8 option to distinguish between F8_1 and F8_2 --- config.h.in | 3 +++ configure | 16 ++++++++++++++++ riscv/cfg.cc | 1 + riscv/cfg.h | 1 + riscv/csrs.cc | 14 ++++++++++++++ riscv/csrs.h | 13 +++++++++++++ riscv/encoding.h | 2 ++ riscv/processor.cc | 10 +++++----- riscv/riscv.ac | 6 ++++++ riscv/vector_unit.cc | 2 ++ riscv/vector_unit.h | 6 ++++-- spike_main/spike.cc | 2 ++ 12 files changed, 69 insertions(+), 7 deletions(-) diff --git a/config.h.in b/config.h.in index 95514fddbc..831edf2e04 100644 --- a/config.h.in +++ b/config.h.in @@ -15,6 +15,9 @@ /* Default value for --varch switch */ #undef DEFAULT_VARCH +/* Default value for --vfp8 switch */ +#undef DEFAULT_VFP8 + /* Define if subproject MCPPBS_SPROJ_NORM is enabled */ #undef DISASM_ENABLED diff --git a/configure b/configure index b184c5c3d7..7cb9823525 100755 --- a/configure +++ b/configure @@ -740,6 +740,7 @@ with_boost_regex with_isa with_priv with_varch +with_vfp8 with_target enable_dual_endian ' @@ -1409,6 +1410,7 @@ Optional Packages: --with-priv=MSU Sets the default RISC-V privilege modes supported --with-varch=vlen:128,elen:64 Sets the default vector config + --with-vfp8=1 Sets the default FP8 format (1 or 2) --with-target=riscv64-unknown-elf Sets the default target config @@ -6607,6 +6609,20 @@ fi +# Check whether --with-vfp8 was given. +if test ${with_vfp8+y} +then : + withval=$with_vfp8; +printf "%s\n" "#define DEFAULT_VFP8 \"$withval\"" >>confdefs.h + +else $as_nop + +printf "%s\n" "#define DEFAULT_VFP8 \"1\"" >>confdefs.h + +fi + + + # Check whether --with-target was given. if test ${with_target+y} then : diff --git a/riscv/cfg.cc b/riscv/cfg.cc index d105eb5e0d..88d56b324f 100644 --- a/riscv/cfg.cc +++ b/riscv/cfg.cc @@ -36,6 +36,7 @@ cfg_t::cfg_t() isa = DEFAULT_ISA; priv = DEFAULT_PRIV; varch = DEFAULT_VARCH; + vfp8 = DEFAULT_VFP8; misaligned = false; endianness = endianness_little; pmpregions = 16; diff --git a/riscv/cfg.h b/riscv/cfg.h index 63465e644a..781e4ff0b7 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -68,6 +68,7 @@ class cfg_t const char * isa; const char * priv; const char * varch; + const char * vfp8; bool misaligned; endianness_t endianness; reg_t pmpregions; diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 0e8bf6db88..f91b86df3a 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -6,6 +6,7 @@ #include "csrs.h" // For processor_t: #include "processor.h" +#include "vector_unit.h" #include "mmu.h" // For get_field(): #include "decode_macros.h" @@ -1446,6 +1447,19 @@ bool vxsat_csr_t::unlogged_write(const reg_t val) noexcept { return masked_csr_t::unlogged_write(val); } +vfp8_csr_t::vfp8_csr_t(processor_t* const proc, const reg_t addr, vectorUnit_t* vu) + : vector_csr_t(proc, addr, /*mask*/ 1, /*init*/ 0), vu(vu) {} + +reg_t vfp8_csr_t::read() const noexcept { + return vu->altfp; +} + +bool vfp8_csr_t::unlogged_write(const reg_t val) noexcept { + vu->altfp = val & 1; + return vector_csr_t::unlogged_write(val); +} + + // implement class hstateen_csr_t hstateen_csr_t::hstateen_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, const reg_t init, uint8_t index): diff --git a/riscv/csrs.h b/riscv/csrs.h index b3dfe1c526..168a26ab7c 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -20,6 +20,7 @@ class processor_t; struct state_t; +class vectorUnit_t; // Parent, abstract class for all CSRs class csr_t { @@ -743,6 +744,18 @@ class vector_csr_t: public basic_csr_t { typedef std::shared_ptr vector_csr_t_p; +class vfp8_csr_t: public vector_csr_t { + public: + vfp8_csr_t(processor_t* const proc, const reg_t addr, vectorUnit_t* vu); + virtual reg_t read() const noexcept override; + protected: + virtual bool unlogged_write(const reg_t val) noexcept override; + private: + vectorUnit_t* vu; +}; + +typedef std::shared_ptr vfp8_csr_t_p; + // For CSRs shared between Vector and P extensions (vxsat) class vxsat_csr_t: public masked_csr_t { public: diff --git a/riscv/encoding.h b/riscv/encoding.h index 249b3fa0af..9e9d23743e 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -3176,6 +3176,7 @@ #define CSR_VL 0xc20 #define CSR_VTYPE 0xc21 #define CSR_VLENB 0xc22 +#define CSR_VFP8 0xc23 #define CSR_SSTATUS 0x100 #define CSR_SEDELEG 0x102 #define CSR_SIDELEG 0x103 @@ -5125,6 +5126,7 @@ DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31) DECLARE_CSR(vl, CSR_VL) DECLARE_CSR(vtype, CSR_VTYPE) DECLARE_CSR(vlenb, CSR_VLENB) +DECLARE_CSR(vfp8, CSR_VFP8) DECLARE_CSR(sstatus, CSR_SSTATUS) DECLARE_CSR(sedeleg, CSR_SEDELEG) DECLARE_CSR(sideleg, CSR_SIDELEG) diff --git a/riscv/processor.cc b/riscv/processor.cc index 6625341ca7..454f0f8ba2 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -55,7 +55,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg, #endif parse_varch_string(cfg->varch); - parse_varch_string(cfg->vfp8); + parse_vfp8_string(cfg->vfp8); register_base_instructions(); mmu = new mmu_t(sim, cfg->endianness, this); @@ -184,11 +184,11 @@ void processor_t::parse_varch_string(const char* s) } void processor_t::parse_vfp8_string(const char* s) { - if (strcmp(s,"1") == 0) { - VU.altfp == 0; + if (strcmp(s, "1") == 0) { + VU.altfp = 0; } - else if (strcmp(s,"2") == 0) { - VU.altfp == 1; + else if (strcmp(s, "2") == 0) { + VU.altfp = 1; } } diff --git a/riscv/riscv.ac b/riscv/riscv.ac index 5785f27914..8a317fab4d 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -26,6 +26,12 @@ AC_ARG_WITH(varch, AC_DEFINE_UNQUOTED([DEFAULT_VARCH], "$withval", [Default value for --varch switch]), AC_DEFINE([DEFAULT_VARCH], ["vlen:128,elen:64"], [Default value for --varch switch])) +AC_ARG_WITH(vfp8, + [AS_HELP_STRING([--with-vfp8=1], + [Sets the default FP8 format (1 or 2)])], + AC_DEFINE_UNQUOTED([DEFAULT_VFP8], "$withval", [Default value for --vfp8 switch]), + AC_DEFINE([DEFAULT_VFP8], ["1"], [Default value for --vfp8 switch])) + AC_ARG_WITH(target, [AS_HELP_STRING([--with-target=riscv64-unknown-elf], [Sets the default target config])], diff --git a/riscv/vector_unit.cc b/riscv/vector_unit.cc index 789cda55ba..d2ef5d3887 100644 --- a/riscv/vector_unit.cc +++ b/riscv/vector_unit.cc @@ -12,6 +12,7 @@ void vectorUnit_t::vectorUnit_t::reset() ELEN = get_elen(); reg_file = malloc(NVPR * vlenb); memset(reg_file, 0, NVPR * vlenb); + altfp = 0; auto& csrmap = p->get_state()->csrmap; csrmap[CSR_VXSAT] = vxsat = std::make_shared(p, CSR_VXSAT); @@ -20,6 +21,7 @@ void vectorUnit_t::vectorUnit_t::reset() csrmap[CSR_VL] = vl = std::make_shared(p, CSR_VL, /*mask*/ 0); csrmap[CSR_VTYPE] = vtype = std::make_shared(p, CSR_VTYPE, /*mask*/ 0); csrmap[CSR_VLENB] = std::make_shared(p, CSR_VLENB, /*mask*/ 0, /*init*/ vlenb); + csrmap[CSR_VFP8] = vfp8 = std::make_shared(p, CSR_VFP8, this); assert(VCSR_VXSAT_SHIFT == 0); // composite_csr_t assumes vxsat begins at bit 0 csrmap[CSR_VCSR] = std::make_shared(p, CSR_VCSR, vxrm, vxsat, VCSR_VXRM_SHIFT); diff --git a/riscv/vector_unit.h b/riscv/vector_unit.h index eef1d0690e..ac3811920e 100644 --- a/riscv/vector_unit.h +++ b/riscv/vector_unit.h @@ -94,7 +94,7 @@ class vectorUnit_t reg_t vlmax; reg_t vlenb; csr_t_p vxsat; - vector_csr_t_p vxrm, vstart, vl, vtype; + vector_csr_t_p vxrm, vstart, vl, vtype, vfp8; int altfp; reg_t vma, vta; reg_t vsew; @@ -125,6 +125,7 @@ class vectorUnit_t vstart(0), vl(0), vtype(0), + vfp8(0), vma(0), vta(0), vsew(0), @@ -132,7 +133,8 @@ class vectorUnit_t ELEN(0), VLEN(0), vill(false), - vstart_alu(false) { + vstart_alu(false), + altfp(0) { } ~vectorUnit_t() { diff --git a/spike_main/spike.cc b/spike_main/spike.cc index b5a1ce4df7..1ca4e700bb 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -46,6 +46,7 @@ static void help(int exit_code = 1) fprintf(stderr, " --pmpgranularity= PMP Granularity in bytes [default 4]\n"); fprintf(stderr, " --priv= RISC-V privilege modes supported [default %s]\n", DEFAULT_PRIV); fprintf(stderr, " --varch= RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH); + fprintf(stderr, " --vfp8=<1|2> Select FP8 format [default %s]\n", DEFAULT_VFP8); fprintf(stderr, " --pc=
Override ELF entry point\n"); fprintf(stderr, " --hartids= Explicitly specify hartids, default is 0,1,...\n"); fprintf(stderr, " --ic=:: Instantiate a cache model with S sets,\n"); @@ -405,6 +406,7 @@ int main(int argc, char** argv) parser.option(0, "pmpgranularity", 1, [&](const char* s){cfg.pmpgranularity = atoul_safe(s);}); parser.option(0, "priv", 1, [&](const char* s){cfg.priv = s;}); parser.option(0, "varch", 1, [&](const char* s){cfg.varch = s;}); + parser.option(0, "vfp8", 1, [&](const char* s){cfg.vfp8 = s;}); parser.option(0, "device", 1, device_parser); parser.option(0, "extension", 1, [&](const char* s){extensions.push_back(find_extension(s));}); parser.option(0, "dump-dts", 0, [&](const char UNUSED *s){dump_dts = true;}); From f58edc28bdfebe5c8d4e42c059a035591b296c6c Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 1 Jul 2025 13:06:02 +0200 Subject: [PATCH 09/31] added vector float program --- vfpu/README | 5 + vfpu/inc/encoding.h | 2832 +++++++++++++++++++++++++++++++++++++++++++ vfpu/inc/util.h | 90 ++ vfpu/inc/vdefs.h | 52 + vfpu/print_vsnrl.c | 40 + vfpu/src/crt.S | 227 ++++ vfpu/src/syscalls.c | 551 +++++++++ vfpu/src/test.ld | 66 + vfpu/vfpu | Bin 0 -> 21976 bytes vfpu/vfpu.c | 171 +++ vfpu/vfpu.dump | 1567 ++++++++++++++++++++++++ vfpu/vfpu_old | Bin 0 -> 24624 bytes vfpu/vsnrl.c | 57 + 13 files changed, 5658 insertions(+) create mode 100755 vfpu/README create mode 100755 vfpu/inc/encoding.h create mode 100755 vfpu/inc/util.h create mode 100755 vfpu/inc/vdefs.h create mode 100755 vfpu/print_vsnrl.c create mode 100755 vfpu/src/crt.S create mode 100755 vfpu/src/syscalls.c create mode 100755 vfpu/src/test.ld create mode 100755 vfpu/vfpu create mode 100755 vfpu/vfpu.c create mode 100644 vfpu/vfpu.dump create mode 100755 vfpu/vfpu_old create mode 100755 vfpu/vsnrl.c diff --git a/vfpu/README b/vfpu/README new file mode 100755 index 0000000000..5dd64f6629 --- /dev/null +++ b/vfpu/README @@ -0,0 +1,5 @@ +# Compile for Baremetal + +clang --target=riscv64-unknown-elf --sysroot=$(dirname $(which riscv64-unknown-elf-gcc))/../riscv64-unknown-elf --gcc-toolchain=$(dirname $(which riscv64-unknown-elf-gcc))/.. -B$RISCV_BIN -march=rv64gcv -mcmodel=medany src/crt.S src/syscalls.c vfpu.c -o vfpu -I inc -nostartfiles -T src/test.ld -Wno-literal-conversion -O3 + +spike --isa=rv64gcv --varch=vlen:4096,elen:8 --priv=msu vfpu diff --git a/vfpu/inc/encoding.h b/vfpu/inc/encoding.h new file mode 100755 index 0000000000..2aa895b860 --- /dev/null +++ b/vfpu/inc/encoding.h @@ -0,0 +1,2832 @@ +/* See LICENSE for license details. */ + +#ifndef RISCV_CSR_ENCODING_H +#define RISCV_CSR_ENCODING_H + +#define MSTATUS_UIE 0x00000001 +#define MSTATUS_SIE 0x00000002 +#define MSTATUS_HIE 0x00000004 +#define MSTATUS_MIE 0x00000008 +#define MSTATUS_UPIE 0x00000010 +#define MSTATUS_SPIE 0x00000020 +#define MSTATUS_HPIE 0x00000040 +#define MSTATUS_MPIE 0x00000080 +#define MSTATUS_SPP 0x00000100 +#define MSTATUS_VS 0x00000600 +#define MSTATUS_MPP 0x00001800 +#define MSTATUS_FS 0x00006000 +#define MSTATUS_XS 0x00018000 +#define MSTATUS_MPRV 0x00020000 +#define MSTATUS_SUM 0x00040000 +#define MSTATUS_MXR 0x00080000 +#define MSTATUS_TVM 0x00100000 +#define MSTATUS_TW 0x00200000 +#define MSTATUS_TSR 0x00400000 +#define MSTATUS32_SD 0x80000000 +#define MSTATUS_UXL 0x0000000300000000 +#define MSTATUS_SXL 0x0000000C00000000 +#define MSTATUS64_SD 0x8000000000000000 + +#define SSTATUS_UIE 0x00000001 +#define SSTATUS_SIE 0x00000002 +#define SSTATUS_UPIE 0x00000010 +#define SSTATUS_SPIE 0x00000020 +#define SSTATUS_SPP 0x00000100 +#define SSTATUS_VS 0x00000600 +#define SSTATUS_FS 0x00006000 +#define SSTATUS_XS 0x00018000 +#define SSTATUS_SUM 0x00040000 +#define SSTATUS_MXR 0x00080000 +#define SSTATUS32_SD 0x80000000 +#define SSTATUS_UXL 0x0000000300000000 +#define SSTATUS64_SD 0x8000000000000000 + +#define USTATUS_UIE 0x00000001 +#define USTATUS_UPIE 0x00000010 + +#define DCSR_XDEBUGVER (3U<<30) +#define DCSR_NDRESET (1<<29) +#define DCSR_FULLRESET (1<<28) +#define DCSR_EBREAKM (1<<15) +#define DCSR_EBREAKH (1<<14) +#define DCSR_EBREAKS (1<<13) +#define DCSR_EBREAKU (1<<12) +#define DCSR_STOPCYCLE (1<<10) +#define DCSR_STOPTIME (1<<9) +#define DCSR_CAUSE (7<<6) +#define DCSR_DEBUGINT (1<<5) +#define DCSR_HALT (1<<3) +#define DCSR_STEP (1<<2) +#define DCSR_PRV (3<<0) + +#define DCSR_CAUSE_NONE 0 +#define DCSR_CAUSE_SWBP 1 +#define DCSR_CAUSE_HWBP 2 +#define DCSR_CAUSE_DEBUGINT 3 +#define DCSR_CAUSE_STEP 4 +#define DCSR_CAUSE_HALT 5 + +#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4)) +#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5)) +#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11)) + +#define MCONTROL_SELECT (1<<19) +#define MCONTROL_TIMING (1<<18) +#define MCONTROL_ACTION (0x3f<<12) +#define MCONTROL_CHAIN (1<<11) +#define MCONTROL_MATCH (0xf<<7) +#define MCONTROL_M (1<<6) +#define MCONTROL_H (1<<5) +#define MCONTROL_S (1<<4) +#define MCONTROL_U (1<<3) +#define MCONTROL_EXECUTE (1<<2) +#define MCONTROL_STORE (1<<1) +#define MCONTROL_LOAD (1<<0) + +#define MCONTROL_TYPE_NONE 0 +#define MCONTROL_TYPE_MATCH 2 + +#define MCONTROL_ACTION_DEBUG_EXCEPTION 0 +#define MCONTROL_ACTION_DEBUG_MODE 1 +#define MCONTROL_ACTION_TRACE_START 2 +#define MCONTROL_ACTION_TRACE_STOP 3 +#define MCONTROL_ACTION_TRACE_EMIT 4 + +#define MCONTROL_MATCH_EQUAL 0 +#define MCONTROL_MATCH_NAPOT 1 +#define MCONTROL_MATCH_GE 2 +#define MCONTROL_MATCH_LT 3 +#define MCONTROL_MATCH_MASK_LOW 4 +#define MCONTROL_MATCH_MASK_HIGH 5 + +#define MIP_USIP (1 << IRQ_U_SOFT) +#define MIP_SSIP (1 << IRQ_S_SOFT) +#define MIP_HSIP (1 << IRQ_H_SOFT) +#define MIP_MSIP (1 << IRQ_M_SOFT) +#define MIP_UTIP (1 << IRQ_U_TIMER) +#define MIP_STIP (1 << IRQ_S_TIMER) +#define MIP_HTIP (1 << IRQ_H_TIMER) +#define MIP_MTIP (1 << IRQ_M_TIMER) +#define MIP_UEIP (1 << IRQ_U_EXT) +#define MIP_SEIP (1 << IRQ_S_EXT) +#define MIP_HEIP (1 << IRQ_H_EXT) +#define MIP_MEIP (1 << IRQ_M_EXT) + +#define SIP_SSIP MIP_SSIP +#define SIP_STIP MIP_STIP + +#define PRV_U 0 +#define PRV_S 1 +#define PRV_H 2 +#define PRV_M 3 + +#define SATP32_MODE 0x80000000 +#define SATP32_ASID 0x7FC00000 +#define SATP32_PPN 0x003FFFFF +#define SATP64_MODE 0xF000000000000000 +#define SATP64_ASID 0x0FFFF00000000000 +#define SATP64_PPN 0x00000FFFFFFFFFFF + +#define SATP_MODE_OFF 0 +#define SATP_MODE_SV32 1 +#define SATP_MODE_SV39 8 +#define SATP_MODE_SV48 9 +#define SATP_MODE_SV57 10 +#define SATP_MODE_SV64 11 + +#define PMP_R 0x01 +#define PMP_W 0x02 +#define PMP_X 0x04 +#define PMP_A 0x18 +#define PMP_L 0x80 +#define PMP_SHIFT 2 + +#define PMP_TOR 0x08 +#define PMP_NA4 0x10 +#define PMP_NAPOT 0x18 + +#define IRQ_U_SOFT 0 +#define IRQ_S_SOFT 1 +#define IRQ_H_SOFT 2 +#define IRQ_M_SOFT 3 +#define IRQ_U_TIMER 4 +#define IRQ_S_TIMER 5 +#define IRQ_H_TIMER 6 +#define IRQ_M_TIMER 7 +#define IRQ_U_EXT 8 +#define IRQ_S_EXT 9 +#define IRQ_H_EXT 10 +#define IRQ_M_EXT 11 +#define IRQ_COP 12 +#define IRQ_HOST 13 + +#define DEFAULT_RSTVEC 0x00001000 +#define CLINT_BASE 0x02000000 +#define CLINT_SIZE 0x000c0000 +#define EXT_IO_BASE 0x40000000 +#define DRAM_BASE 0x80000000 + +/* page table entry (PTE) fields */ +#define PTE_V 0x001 /* Valid */ +#define PTE_R 0x002 /* Read */ +#define PTE_W 0x004 /* Write */ +#define PTE_X 0x008 /* Execute */ +#define PTE_U 0x010 /* User */ +#define PTE_G 0x020 /* Global */ +#define PTE_A 0x040 /* Accessed */ +#define PTE_D 0x080 /* Dirty */ +#define PTE_SOFT 0x300 /* Reserved for Software */ +#define PTE_RSVD 0x1FC0000000000000 /* Reserved for future standard use */ +#define PTE_PBMT 0x6000000000000000 /* Svpbmt: Page-based memory types */ +#define PTE_N 0x8000000000000000 /* Svnapot: NAPOT translation contiguity */ +#define PTE_ATTR 0xFFC0000000000000 /* All attributes and reserved bits */ + +#define PTE_PPN_SHIFT 10 + +#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V) + +#ifdef __riscv + +#if __riscv_xlen == 64 +# define MSTATUS_SD MSTATUS64_SD +# define SSTATUS_SD SSTATUS64_SD +# define RISCV_PGLEVEL_BITS 9 +# define SATP_MODE SATP64_MODE +#else +# define MSTATUS_SD MSTATUS32_SD +# define SSTATUS_SD SSTATUS32_SD +# define RISCV_PGLEVEL_BITS 10 +# define SATP_MODE SATP32_MODE +#endif +#define RISCV_PGSHIFT 12 +#define RISCV_PGSIZE (1 << RISCV_PGSHIFT) + +#ifndef __ASSEMBLER__ + +#ifdef __GNUC__ + +#define read_csr(reg) ({ unsigned long __tmp; \ + asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ + __tmp; }) + +#define write_csr(reg, val) ({ \ + asm volatile ("csrw " #reg ", %0" :: "rK"(val)); }) + +#define swap_csr(reg, val) ({ unsigned long __tmp; \ + asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \ + __tmp; }) + +#define set_csr(reg, bit) ({ unsigned long __tmp; \ + asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ + __tmp; }) + +#define clear_csr(reg, bit) ({ unsigned long __tmp; \ + asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \ + __tmp; }) + +#define rdtime() read_csr(time) +#define rdcycle() read_csr(cycle) +#define rdinstret() read_csr(instret) + +#endif + +#endif + +#endif + +#endif +/* Automatically generated by parse_opcodes. */ +#ifndef RISCV_ENCODING_H +#define RISCV_ENCODING_H +#define MATCH_SLLI_RV32 0x1013 +#define MASK_SLLI_RV32 0xfe00707f +#define MATCH_SRLI_RV32 0x5013 +#define MASK_SRLI_RV32 0xfe00707f +#define MATCH_SRAI_RV32 0x40005013 +#define MASK_SRAI_RV32 0xfe00707f +#define MATCH_FRFLAGS 0x102073 +#define MASK_FRFLAGS 0xfffff07f +#define MATCH_FSFLAGS 0x101073 +#define MASK_FSFLAGS 0xfff0707f +#define MATCH_FSFLAGSI 0x105073 +#define MASK_FSFLAGSI 0xfff0707f +#define MATCH_FRRM 0x202073 +#define MASK_FRRM 0xfffff07f +#define MATCH_FSRM 0x201073 +#define MASK_FSRM 0xfff0707f +#define MATCH_FSRMI 0x205073 +#define MASK_FSRMI 0xfff0707f +#define MATCH_FSCSR 0x301073 +#define MASK_FSCSR 0xfff0707f +#define MATCH_FRCSR 0x302073 +#define MASK_FRCSR 0xfffff07f +#define MATCH_RDCYCLE 0xc0002073 +#define MASK_RDCYCLE 0xfffff07f +#define MATCH_RDTIME 0xc0102073 +#define MASK_RDTIME 0xfffff07f +#define MATCH_RDINSTRET 0xc0202073 +#define MASK_RDINSTRET 0xfffff07f +#define MATCH_RDCYCLEH 0xc8002073 +#define MASK_RDCYCLEH 0xfffff07f +#define MATCH_RDTIMEH 0xc8102073 +#define MASK_RDTIMEH 0xfffff07f +#define MATCH_RDINSTRETH 0xc8202073 +#define MASK_RDINSTRETH 0xfffff07f +#define MATCH_SCALL 0x73 +#define MASK_SCALL 0xffffffff +#define MATCH_SBREAK 0x100073 +#define MASK_SBREAK 0xffffffff +#define MATCH_FMV_X_S 0xe0000053 +#define MASK_FMV_X_S 0xfff0707f +#define MATCH_FMV_S_X 0xf0000053 +#define MASK_FMV_S_X 0xfff0707f +#define MATCH_FENCE_TSO 0x8330000f +#define MASK_FENCE_TSO 0xfff0707f +#define MATCH_PAUSE 0x100000f +#define MASK_PAUSE 0xffffffff +#define MATCH_BEQ 0x63 +#define MASK_BEQ 0x707f +#define MATCH_BNE 0x1063 +#define MASK_BNE 0x707f +#define MATCH_BLT 0x4063 +#define MASK_BLT 0x707f +#define MATCH_BGE 0x5063 +#define MASK_BGE 0x707f +#define MATCH_BLTU 0x6063 +#define MASK_BLTU 0x707f +#define MATCH_BGEU 0x7063 +#define MASK_BGEU 0x707f +#define MATCH_JALR 0x67 +#define MASK_JALR 0x707f +#define MATCH_JAL 0x6f +#define MASK_JAL 0x7f +#define MATCH_LUI 0x37 +#define MASK_LUI 0x7f +#define MATCH_AUIPC 0x17 +#define MASK_AUIPC 0x7f +#define MATCH_ADDI 0x13 +#define MASK_ADDI 0x707f +#define MATCH_SLLI 0x1013 +#define MASK_SLLI 0xfc00707f +#define MATCH_SLTI 0x2013 +#define MASK_SLTI 0x707f +#define MATCH_SLTIU 0x3013 +#define MASK_SLTIU 0x707f +#define MATCH_XORI 0x4013 +#define MASK_XORI 0x707f +#define MATCH_SRLI 0x5013 +#define MASK_SRLI 0xfc00707f +#define MATCH_SRAI 0x40005013 +#define MASK_SRAI 0xfc00707f +#define MATCH_ORI 0x6013 +#define MASK_ORI 0x707f +#define MATCH_ANDI 0x7013 +#define MASK_ANDI 0x707f +#define MATCH_ADD 0x33 +#define MASK_ADD 0xfe00707f +#define MATCH_SUB 0x40000033 +#define MASK_SUB 0xfe00707f +#define MATCH_SLL 0x1033 +#define MASK_SLL 0xfe00707f +#define MATCH_SLT 0x2033 +#define MASK_SLT 0xfe00707f +#define MATCH_SLTU 0x3033 +#define MASK_SLTU 0xfe00707f +#define MATCH_XOR 0x4033 +#define MASK_XOR 0xfe00707f +#define MATCH_SRL 0x5033 +#define MASK_SRL 0xfe00707f +#define MATCH_SRA 0x40005033 +#define MASK_SRA 0xfe00707f +#define MATCH_OR 0x6033 +#define MASK_OR 0xfe00707f +#define MATCH_AND 0x7033 +#define MASK_AND 0xfe00707f +#define MATCH_LB 0x3 +#define MASK_LB 0x707f +#define MATCH_LH 0x1003 +#define MASK_LH 0x707f +#define MATCH_LW 0x2003 +#define MASK_LW 0x707f +#define MATCH_LBU 0x4003 +#define MASK_LBU 0x707f +#define MATCH_LHU 0x5003 +#define MASK_LHU 0x707f +#define MATCH_SB 0x23 +#define MASK_SB 0x707f +#define MATCH_SH 0x1023 +#define MASK_SH 0x707f +#define MATCH_SW 0x2023 +#define MASK_SW 0x707f +#define MATCH_FENCE 0xf +#define MASK_FENCE 0x707f +#define MATCH_FENCE_I 0x100f +#define MASK_FENCE_I 0x707f +#define MATCH_ADDIW 0x1b +#define MASK_ADDIW 0x707f +#define MATCH_SLLIW 0x101b +#define MASK_SLLIW 0xfe00707f +#define MATCH_SRLIW 0x501b +#define MASK_SRLIW 0xfe00707f +#define MATCH_SRAIW 0x4000501b +#define MASK_SRAIW 0xfe00707f +#define MATCH_ADDW 0x3b +#define MASK_ADDW 0xfe00707f +#define MATCH_SUBW 0x4000003b +#define MASK_SUBW 0xfe00707f +#define MATCH_SLLW 0x103b +#define MASK_SLLW 0xfe00707f +#define MATCH_SRLW 0x503b +#define MASK_SRLW 0xfe00707f +#define MATCH_SRAW 0x4000503b +#define MASK_SRAW 0xfe00707f +#define MATCH_LD 0x3003 +#define MASK_LD 0x707f +#define MATCH_LWU 0x6003 +#define MASK_LWU 0x707f +#define MATCH_SD 0x3023 +#define MASK_SD 0x707f +#define MATCH_MUL 0x2000033 +#define MASK_MUL 0xfe00707f +#define MATCH_MULH 0x2001033 +#define MASK_MULH 0xfe00707f +#define MATCH_MULHSU 0x2002033 +#define MASK_MULHSU 0xfe00707f +#define MATCH_MULHU 0x2003033 +#define MASK_MULHU 0xfe00707f +#define MATCH_DIV 0x2004033 +#define MASK_DIV 0xfe00707f +#define MATCH_DIVU 0x2005033 +#define MASK_DIVU 0xfe00707f +#define MATCH_REM 0x2006033 +#define MASK_REM 0xfe00707f +#define MATCH_REMU 0x2007033 +#define MASK_REMU 0xfe00707f +#define MATCH_MULW 0x200003b +#define MASK_MULW 0xfe00707f +#define MATCH_DIVW 0x200403b +#define MASK_DIVW 0xfe00707f +#define MATCH_DIVUW 0x200503b +#define MASK_DIVUW 0xfe00707f +#define MATCH_REMW 0x200603b +#define MASK_REMW 0xfe00707f +#define MATCH_REMUW 0x200703b +#define MASK_REMUW 0xfe00707f +#define MATCH_AMOADD_W 0x202f +#define MASK_AMOADD_W 0xf800707f +#define MATCH_AMOXOR_W 0x2000202f +#define MASK_AMOXOR_W 0xf800707f +#define MATCH_AMOOR_W 0x4000202f +#define MASK_AMOOR_W 0xf800707f +#define MATCH_AMOAND_W 0x6000202f +#define MASK_AMOAND_W 0xf800707f +#define MATCH_AMOMIN_W 0x8000202f +#define MASK_AMOMIN_W 0xf800707f +#define MATCH_AMOMAX_W 0xa000202f +#define MASK_AMOMAX_W 0xf800707f +#define MATCH_AMOMINU_W 0xc000202f +#define MASK_AMOMINU_W 0xf800707f +#define MATCH_AMOMAXU_W 0xe000202f +#define MASK_AMOMAXU_W 0xf800707f +#define MATCH_AMOSWAP_W 0x800202f +#define MASK_AMOSWAP_W 0xf800707f +#define MATCH_LR_W 0x1000202f +#define MASK_LR_W 0xf9f0707f +#define MATCH_SC_W 0x1800202f +#define MASK_SC_W 0xf800707f +#define MATCH_AMOADD_D 0x302f +#define MASK_AMOADD_D 0xf800707f +#define MATCH_AMOXOR_D 0x2000302f +#define MASK_AMOXOR_D 0xf800707f +#define MATCH_AMOOR_D 0x4000302f +#define MASK_AMOOR_D 0xf800707f +#define MATCH_AMOAND_D 0x6000302f +#define MASK_AMOAND_D 0xf800707f +#define MATCH_AMOMIN_D 0x8000302f +#define MASK_AMOMIN_D 0xf800707f +#define MATCH_AMOMAX_D 0xa000302f +#define MASK_AMOMAX_D 0xf800707f +#define MATCH_AMOMINU_D 0xc000302f +#define MASK_AMOMINU_D 0xf800707f +#define MATCH_AMOMAXU_D 0xe000302f +#define MASK_AMOMAXU_D 0xf800707f +#define MATCH_AMOSWAP_D 0x800302f +#define MASK_AMOSWAP_D 0xf800707f +#define MATCH_LR_D 0x1000302f +#define MASK_LR_D 0xf9f0707f +#define MATCH_SC_D 0x1800302f +#define MASK_SC_D 0xf800707f +#define MATCH_FADD_S 0x53 +#define MASK_FADD_S 0xfe00007f +#define MATCH_FSUB_S 0x8000053 +#define MASK_FSUB_S 0xfe00007f +#define MATCH_FMUL_S 0x10000053 +#define MASK_FMUL_S 0xfe00007f +#define MATCH_FDIV_S 0x18000053 +#define MASK_FDIV_S 0xfe00007f +#define MATCH_FSGNJ_S 0x20000053 +#define MASK_FSGNJ_S 0xfe00707f +#define MATCH_FSGNJN_S 0x20001053 +#define MASK_FSGNJN_S 0xfe00707f +#define MATCH_FSGNJX_S 0x20002053 +#define MASK_FSGNJX_S 0xfe00707f +#define MATCH_FMIN_S 0x28000053 +#define MASK_FMIN_S 0xfe00707f +#define MATCH_FMAX_S 0x28001053 +#define MASK_FMAX_S 0xfe00707f +#define MATCH_FSQRT_S 0x58000053 +#define MASK_FSQRT_S 0xfff0007f +#define MATCH_FLE_S 0xa0000053 +#define MASK_FLE_S 0xfe00707f +#define MATCH_FLT_S 0xa0001053 +#define MASK_FLT_S 0xfe00707f +#define MATCH_FEQ_S 0xa0002053 +#define MASK_FEQ_S 0xfe00707f +#define MATCH_FCVT_W_S 0xc0000053 +#define MASK_FCVT_W_S 0xfff0007f +#define MATCH_FCVT_WU_S 0xc0100053 +#define MASK_FCVT_WU_S 0xfff0007f +#define MATCH_FMV_X_W 0xe0000053 +#define MASK_FMV_X_W 0xfff0707f +#define MATCH_FCLASS_S 0xe0001053 +#define MASK_FCLASS_S 0xfff0707f +#define MATCH_FCVT_S_W 0xd0000053 +#define MASK_FCVT_S_W 0xfff0007f +#define MATCH_FCVT_S_WU 0xd0100053 +#define MASK_FCVT_S_WU 0xfff0007f +#define MATCH_FMV_W_X 0xf0000053 +#define MASK_FMV_W_X 0xfff0707f +#define MATCH_FLW 0x2007 +#define MASK_FLW 0x707f +#define MATCH_FSW 0x2027 +#define MASK_FSW 0x707f +#define MATCH_FMADD_S 0x43 +#define MASK_FMADD_S 0x600007f +#define MATCH_FMSUB_S 0x47 +#define MASK_FMSUB_S 0x600007f +#define MATCH_FNMSUB_S 0x4b +#define MASK_FNMSUB_S 0x600007f +#define MATCH_FNMADD_S 0x4f +#define MASK_FNMADD_S 0x600007f +#define MATCH_FCVT_L_S 0xc0200053 +#define MASK_FCVT_L_S 0xfff0007f +#define MATCH_FCVT_LU_S 0xc0300053 +#define MASK_FCVT_LU_S 0xfff0007f +#define MATCH_FCVT_S_L 0xd0200053 +#define MASK_FCVT_S_L 0xfff0007f +#define MATCH_FCVT_S_LU 0xd0300053 +#define MASK_FCVT_S_LU 0xfff0007f +#define MATCH_FADD_D 0x2000053 +#define MASK_FADD_D 0xfe00007f +#define MATCH_FSUB_D 0xa000053 +#define MASK_FSUB_D 0xfe00007f +#define MATCH_FMUL_D 0x12000053 +#define MASK_FMUL_D 0xfe00007f +#define MATCH_FDIV_D 0x1a000053 +#define MASK_FDIV_D 0xfe00007f +#define MATCH_FSGNJ_D 0x22000053 +#define MASK_FSGNJ_D 0xfe00707f +#define MATCH_FSGNJN_D 0x22001053 +#define MASK_FSGNJN_D 0xfe00707f +#define MATCH_FSGNJX_D 0x22002053 +#define MASK_FSGNJX_D 0xfe00707f +#define MATCH_FMIN_D 0x2a000053 +#define MASK_FMIN_D 0xfe00707f +#define MATCH_FMAX_D 0x2a001053 +#define MASK_FMAX_D 0xfe00707f +#define MATCH_FCVT_S_D 0x40100053 +#define MASK_FCVT_S_D 0xfff0007f +#define MATCH_FCVT_D_S 0x42000053 +#define MASK_FCVT_D_S 0xfff0007f +#define MATCH_FSQRT_D 0x5a000053 +#define MASK_FSQRT_D 0xfff0007f +#define MATCH_FLE_D 0xa2000053 +#define MASK_FLE_D 0xfe00707f +#define MATCH_FLT_D 0xa2001053 +#define MASK_FLT_D 0xfe00707f +#define MATCH_FEQ_D 0xa2002053 +#define MASK_FEQ_D 0xfe00707f +#define MATCH_FCVT_W_D 0xc2000053 +#define MASK_FCVT_W_D 0xfff0007f +#define MATCH_FCVT_WU_D 0xc2100053 +#define MASK_FCVT_WU_D 0xfff0007f +#define MATCH_FCLASS_D 0xe2001053 +#define MASK_FCLASS_D 0xfff0707f +#define MATCH_FCVT_D_W 0xd2000053 +#define MASK_FCVT_D_W 0xfff0007f +#define MATCH_FCVT_D_WU 0xd2100053 +#define MASK_FCVT_D_WU 0xfff0007f +#define MATCH_FLD 0x3007 +#define MASK_FLD 0x707f +#define MATCH_FSD 0x3027 +#define MASK_FSD 0x707f +#define MATCH_FMADD_D 0x2000043 +#define MASK_FMADD_D 0x600007f +#define MATCH_FMSUB_D 0x2000047 +#define MASK_FMSUB_D 0x600007f +#define MATCH_FNMSUB_D 0x200004b +#define MASK_FNMSUB_D 0x600007f +#define MATCH_FNMADD_D 0x200004f +#define MASK_FNMADD_D 0x600007f +#define MATCH_FCVT_L_D 0xc2200053 +#define MASK_FCVT_L_D 0xfff0007f +#define MATCH_FCVT_LU_D 0xc2300053 +#define MASK_FCVT_LU_D 0xfff0007f +#define MATCH_FMV_X_D 0xe2000053 +#define MASK_FMV_X_D 0xfff0707f +#define MATCH_FCVT_D_L 0xd2200053 +#define MASK_FCVT_D_L 0xfff0007f +#define MATCH_FCVT_D_LU 0xd2300053 +#define MASK_FCVT_D_LU 0xfff0007f +#define MATCH_FMV_D_X 0xf2000053 +#define MASK_FMV_D_X 0xfff0707f +#define MATCH_FADD_Q 0x6000053 +#define MASK_FADD_Q 0xfe00007f +#define MATCH_FSUB_Q 0xe000053 +#define MASK_FSUB_Q 0xfe00007f +#define MATCH_FMUL_Q 0x16000053 +#define MASK_FMUL_Q 0xfe00007f +#define MATCH_FDIV_Q 0x1e000053 +#define MASK_FDIV_Q 0xfe00007f +#define MATCH_FSGNJ_Q 0x26000053 +#define MASK_FSGNJ_Q 0xfe00707f +#define MATCH_FSGNJN_Q 0x26001053 +#define MASK_FSGNJN_Q 0xfe00707f +#define MATCH_FSGNJX_Q 0x26002053 +#define MASK_FSGNJX_Q 0xfe00707f +#define MATCH_FMIN_Q 0x2e000053 +#define MASK_FMIN_Q 0xfe00707f +#define MATCH_FMAX_Q 0x2e001053 +#define MASK_FMAX_Q 0xfe00707f +#define MATCH_FCVT_S_Q 0x40300053 +#define MASK_FCVT_S_Q 0xfff0007f +#define MATCH_FCVT_Q_S 0x46000053 +#define MASK_FCVT_Q_S 0xfff0007f +#define MATCH_FCVT_D_Q 0x42300053 +#define MASK_FCVT_D_Q 0xfff0007f +#define MATCH_FCVT_Q_D 0x46100053 +#define MASK_FCVT_Q_D 0xfff0007f +#define MATCH_FSQRT_Q 0x5e000053 +#define MASK_FSQRT_Q 0xfff0007f +#define MATCH_FLE_Q 0xa6000053 +#define MASK_FLE_Q 0xfe00707f +#define MATCH_FLT_Q 0xa6001053 +#define MASK_FLT_Q 0xfe00707f +#define MATCH_FEQ_Q 0xa6002053 +#define MASK_FEQ_Q 0xfe00707f +#define MATCH_FCVT_W_Q 0xc6000053 +#define MASK_FCVT_W_Q 0xfff0007f +#define MATCH_FCVT_WU_Q 0xc6100053 +#define MASK_FCVT_WU_Q 0xfff0007f +#define MATCH_FCLASS_Q 0xe6001053 +#define MASK_FCLASS_Q 0xfff0707f +#define MATCH_FCVT_Q_W 0xd6000053 +#define MASK_FCVT_Q_W 0xfff0007f +#define MATCH_FCVT_Q_WU 0xd6100053 +#define MASK_FCVT_Q_WU 0xfff0007f +#define MATCH_FLQ 0x4007 +#define MASK_FLQ 0x707f +#define MATCH_FSQ 0x4027 +#define MASK_FSQ 0x707f +#define MATCH_FMADD_Q 0x6000043 +#define MASK_FMADD_Q 0x600007f +#define MATCH_FMSUB_Q 0x6000047 +#define MASK_FMSUB_Q 0x600007f +#define MATCH_FNMSUB_Q 0x600004b +#define MASK_FNMSUB_Q 0x600007f +#define MATCH_FNMADD_Q 0x600004f +#define MASK_FNMADD_Q 0x600007f +#define MATCH_FCVT_L_Q 0xc6200053 +#define MASK_FCVT_L_Q 0xfff0007f +#define MATCH_FCVT_LU_Q 0xc6300053 +#define MASK_FCVT_LU_Q 0xfff0007f +#define MATCH_FCVT_Q_L 0xd6200053 +#define MASK_FCVT_Q_L 0xfff0007f +#define MATCH_FCVT_Q_LU 0xd6300053 +#define MASK_FCVT_Q_LU 0xfff0007f +#define MATCH_FMV_X_Q 0xe6000053 +#define MASK_FMV_X_Q 0xfff0707f +#define MATCH_FMV_Q_X 0xf6000053 +#define MASK_FMV_Q_X 0xfff0707f +#define MATCH_ECALL 0x73 +#define MASK_ECALL 0xffffffff +#define MATCH_EBREAK 0x100073 +#define MASK_EBREAK 0xffffffff +#define MATCH_URET 0x200073 +#define MASK_URET 0xffffffff +#define MATCH_SRET 0x10200073 +#define MASK_SRET 0xffffffff +#define MATCH_MRET 0x30200073 +#define MASK_MRET 0xffffffff +#define MATCH_DRET 0x7b200073 +#define MASK_DRET 0xffffffff +#define MATCH_SFENCE_VMA 0x12000073 +#define MASK_SFENCE_VMA 0xfe007fff +#define MATCH_WFI 0x10500073 +#define MASK_WFI 0xffffffff +#define MATCH_CSRRW 0x1073 +#define MASK_CSRRW 0x707f +#define MATCH_CSRRS 0x2073 +#define MASK_CSRRS 0x707f +#define MATCH_CSRRC 0x3073 +#define MASK_CSRRC 0x707f +#define MATCH_CSRRWI 0x5073 +#define MASK_CSRRWI 0x707f +#define MATCH_CSRRSI 0x6073 +#define MASK_CSRRSI 0x707f +#define MATCH_CSRRCI 0x7073 +#define MASK_CSRRCI 0x707f +#define MATCH_HFENCE_VVMA 0x22000073 +#define MASK_HFENCE_VVMA 0xfe007fff +#define MATCH_HFENCE_GVMA 0x62000073 +#define MASK_HFENCE_GVMA 0xfe007fff +#define MATCH_C_NOP 0x1 +#define MASK_C_NOP 0xffff +#define MATCH_C_ADDI16SP 0x6101 +#define MASK_C_ADDI16SP 0xef83 +#define MATCH_C_JR 0x8002 +#define MASK_C_JR 0xf07f +#define MATCH_C_JALR 0x9002 +#define MASK_C_JALR 0xf07f +#define MATCH_C_EBREAK 0x9002 +#define MASK_C_EBREAK 0xffff +#define MATCH_C_ADDI4SPN 0x0 +#define MASK_C_ADDI4SPN 0xe003 +#define MATCH_C_FLD 0x2000 +#define MASK_C_FLD 0xe003 +#define MATCH_C_LW 0x4000 +#define MASK_C_LW 0xe003 +#define MATCH_C_FLW 0x6000 +#define MASK_C_FLW 0xe003 +#define MATCH_C_FSD 0xa000 +#define MASK_C_FSD 0xe003 +#define MATCH_C_SW 0xc000 +#define MASK_C_SW 0xe003 +#define MATCH_C_FSW 0xe000 +#define MASK_C_FSW 0xe003 +#define MATCH_C_ADDI 0x1 +#define MASK_C_ADDI 0xe003 +#define MATCH_C_JAL 0x2001 +#define MASK_C_JAL 0xe003 +#define MATCH_C_LI 0x4001 +#define MASK_C_LI 0xe003 +#define MATCH_C_LUI 0x6001 +#define MASK_C_LUI 0xe003 +#define MATCH_C_SRLI 0x8001 +#define MASK_C_SRLI 0xec03 +#define MATCH_C_SRAI 0x8401 +#define MASK_C_SRAI 0xec03 +#define MATCH_C_ANDI 0x8801 +#define MASK_C_ANDI 0xec03 +#define MATCH_C_SUB 0x8c01 +#define MASK_C_SUB 0xfc63 +#define MATCH_C_XOR 0x8c21 +#define MASK_C_XOR 0xfc63 +#define MATCH_C_OR 0x8c41 +#define MASK_C_OR 0xfc63 +#define MATCH_C_AND 0x8c61 +#define MASK_C_AND 0xfc63 +#define MATCH_C_J 0xa001 +#define MASK_C_J 0xe003 +#define MATCH_C_BEQZ 0xc001 +#define MASK_C_BEQZ 0xe003 +#define MATCH_C_BNEZ 0xe001 +#define MASK_C_BNEZ 0xe003 +#define MATCH_C_SLLI 0x2 +#define MASK_C_SLLI 0xe003 +#define MATCH_C_FLDSP 0x2002 +#define MASK_C_FLDSP 0xe003 +#define MATCH_C_LWSP 0x4002 +#define MASK_C_LWSP 0xe003 +#define MATCH_C_FLWSP 0x6002 +#define MASK_C_FLWSP 0xe003 +#define MATCH_C_MV 0x8002 +#define MASK_C_MV 0xf003 +#define MATCH_C_ADD 0x9002 +#define MASK_C_ADD 0xf003 +#define MATCH_C_FSDSP 0xa002 +#define MASK_C_FSDSP 0xe003 +#define MATCH_C_SWSP 0xc002 +#define MASK_C_SWSP 0xe003 +#define MATCH_C_FSWSP 0xe002 +#define MASK_C_FSWSP 0xe003 +#define MATCH_C_SRLI_RV32 0x8001 +#define MASK_C_SRLI_RV32 0xfc03 +#define MATCH_C_SRAI_RV32 0x8401 +#define MASK_C_SRAI_RV32 0xfc03 +#define MATCH_C_SLLI_RV32 0x2 +#define MASK_C_SLLI_RV32 0xf003 +#define MATCH_C_LD 0x6000 +#define MASK_C_LD 0xe003 +#define MATCH_C_SD 0xe000 +#define MASK_C_SD 0xe003 +#define MATCH_C_SUBW 0x9c01 +#define MASK_C_SUBW 0xfc63 +#define MATCH_C_ADDW 0x9c21 +#define MASK_C_ADDW 0xfc63 +#define MATCH_C_ADDIW 0x2001 +#define MASK_C_ADDIW 0xe003 +#define MATCH_C_LDSP 0x6002 +#define MASK_C_LDSP 0xe003 +#define MATCH_C_SDSP 0xe002 +#define MASK_C_SDSP 0xe003 +#define MATCH_C_LQ 0x2000 +#define MASK_C_LQ 0xe003 +#define MATCH_C_SQ 0xa000 +#define MASK_C_SQ 0xe003 +#define MATCH_C_LQSP 0x2002 +#define MASK_C_LQSP 0xe003 +#define MATCH_C_SQSP 0xa002 +#define MASK_C_SQSP 0xe003 +#define MATCH_CUSTOM0 0xb +#define MASK_CUSTOM0 0x707f +#define MATCH_CUSTOM0_RS1 0x200b +#define MASK_CUSTOM0_RS1 0x707f +#define MATCH_CUSTOM0_RS1_RS2 0x300b +#define MASK_CUSTOM0_RS1_RS2 0x707f +#define MATCH_CUSTOM0_RD 0x400b +#define MASK_CUSTOM0_RD 0x707f +#define MATCH_CUSTOM0_RD_RS1 0x600b +#define MASK_CUSTOM0_RD_RS1 0x707f +#define MATCH_CUSTOM0_RD_RS1_RS2 0x700b +#define MASK_CUSTOM0_RD_RS1_RS2 0x707f +#define MATCH_CUSTOM1 0x2b +#define MASK_CUSTOM1 0x707f +#define MATCH_CUSTOM1_RS1 0x202b +#define MASK_CUSTOM1_RS1 0x707f +#define MATCH_CUSTOM1_RS1_RS2 0x302b +#define MASK_CUSTOM1_RS1_RS2 0x707f +#define MATCH_CUSTOM1_RD 0x402b +#define MASK_CUSTOM1_RD 0x707f +#define MATCH_CUSTOM1_RD_RS1 0x602b +#define MASK_CUSTOM1_RD_RS1 0x707f +#define MATCH_CUSTOM1_RD_RS1_RS2 0x702b +#define MASK_CUSTOM1_RD_RS1_RS2 0x707f +#define MATCH_CUSTOM2 0x5b +#define MASK_CUSTOM2 0x707f +#define MATCH_CUSTOM2_RS1 0x205b +#define MASK_CUSTOM2_RS1 0x707f +#define MATCH_CUSTOM2_RS1_RS2 0x305b +#define MASK_CUSTOM2_RS1_RS2 0x707f +#define MATCH_CUSTOM2_RD 0x405b +#define MASK_CUSTOM2_RD 0x707f +#define MATCH_CUSTOM2_RD_RS1 0x605b +#define MASK_CUSTOM2_RD_RS1 0x707f +#define MATCH_CUSTOM2_RD_RS1_RS2 0x705b +#define MASK_CUSTOM2_RD_RS1_RS2 0x707f +#define MATCH_CUSTOM3 0x7b +#define MASK_CUSTOM3 0x707f +#define MATCH_CUSTOM3_RS1 0x207b +#define MASK_CUSTOM3_RS1 0x707f +#define MATCH_CUSTOM3_RS1_RS2 0x307b +#define MASK_CUSTOM3_RS1_RS2 0x707f +#define MATCH_CUSTOM3_RD 0x407b +#define MASK_CUSTOM3_RD 0x707f +#define MATCH_CUSTOM3_RD_RS1 0x607b +#define MASK_CUSTOM3_RD_RS1 0x707f +#define MATCH_CUSTOM3_RD_RS1_RS2 0x707b +#define MASK_CUSTOM3_RD_RS1_RS2 0x707f +#define MATCH_VSETVLI 0x7057 +#define MASK_VSETVLI 0x8000707f +#define MATCH_VSETVL 0x80007057 +#define MASK_VSETVL 0xfe00707f +#define MATCH_VLB_V 0x10000007 +#define MASK_VLB_V 0x1df0707f +#define MATCH_VLH_V 0x10005007 +#define MASK_VLH_V 0x1df0707f +#define MATCH_VLW_V 0x10006007 +#define MASK_VLW_V 0x1df0707f +#define MATCH_VLE_V 0x7007 +#define MASK_VLE_V 0x1df0707f +#define MATCH_VLBU_V 0x7 +#define MASK_VLBU_V 0x1df0707f +#define MATCH_VLHU_V 0x5007 +#define MASK_VLHU_V 0x1df0707f +#define MATCH_VLWU_V 0x6007 +#define MASK_VLWU_V 0x1df0707f +#define MATCH_VSB_V 0x27 +#define MASK_VSB_V 0x1df0707f +#define MATCH_VSH_V 0x5027 +#define MASK_VSH_V 0x1df0707f +#define MATCH_VSW_V 0x6027 +#define MASK_VSW_V 0x1df0707f +#define MATCH_VSE_V 0x7027 +#define MASK_VSE_V 0x1df0707f +#define MATCH_VLSB_V 0x18000007 +#define MASK_VLSB_V 0x1c00707f +#define MATCH_VLSH_V 0x18005007 +#define MASK_VLSH_V 0x1c00707f +#define MATCH_VLSW_V 0x18006007 +#define MASK_VLSW_V 0x1c00707f +#define MATCH_VLSE_V 0x8007007 +#define MASK_VLSE_V 0x1c00707f +#define MATCH_VLSBU_V 0x8000007 +#define MASK_VLSBU_V 0x1c00707f +#define MATCH_VLSHU_V 0x8005007 +#define MASK_VLSHU_V 0x1c00707f +#define MATCH_VLSWU_V 0x8006007 +#define MASK_VLSWU_V 0x1c00707f +#define MATCH_VSSB_V 0x8000027 +#define MASK_VSSB_V 0x1c00707f +#define MATCH_VSSH_V 0x8005027 +#define MASK_VSSH_V 0x1c00707f +#define MATCH_VSSW_V 0x8006027 +#define MASK_VSSW_V 0x1c00707f +#define MATCH_VSSE_V 0x8007027 +#define MASK_VSSE_V 0x1c00707f +#define MATCH_VLXB_V 0x1c000007 +#define MASK_VLXB_V 0x1c00707f +#define MATCH_VLXH_V 0x1c005007 +#define MASK_VLXH_V 0x1c00707f +#define MATCH_VLXW_V 0x1c006007 +#define MASK_VLXW_V 0x1c00707f +#define MATCH_VLXE_V 0xc007007 +#define MASK_VLXE_V 0x1c00707f +#define MATCH_VLXBU_V 0xc000007 +#define MASK_VLXBU_V 0x1c00707f +#define MATCH_VLXHU_V 0xc005007 +#define MASK_VLXHU_V 0x1c00707f +#define MATCH_VLXWU_V 0xc006007 +#define MASK_VLXWU_V 0x1c00707f +#define MATCH_VSXB_V 0xc000027 +#define MASK_VSXB_V 0x1c00707f +#define MATCH_VSXH_V 0xc005027 +#define MASK_VSXH_V 0x1c00707f +#define MATCH_VSXW_V 0xc006027 +#define MASK_VSXW_V 0x1c00707f +#define MATCH_VSXE_V 0xc007027 +#define MASK_VSXE_V 0x1c00707f +#define MATCH_VSUXB_V 0x1c000027 +#define MASK_VSUXB_V 0xfc00707f +#define MATCH_VSUXH_V 0x1c005027 +#define MASK_VSUXH_V 0xfc00707f +#define MATCH_VSUXW_V 0x1c006027 +#define MASK_VSUXW_V 0xfc00707f +#define MATCH_VSUXE_V 0x1c007027 +#define MASK_VSUXE_V 0xfc00707f +#define MATCH_VLBFF_V 0x11000007 +#define MASK_VLBFF_V 0x1df0707f +#define MATCH_VLHFF_V 0x11005007 +#define MASK_VLHFF_V 0x1df0707f +#define MATCH_VLWFF_V 0x11006007 +#define MASK_VLWFF_V 0x1df0707f +#define MATCH_VLEFF_V 0x1007007 +#define MASK_VLEFF_V 0x1df0707f +#define MATCH_VLBUFF_V 0x1000007 +#define MASK_VLBUFF_V 0x1df0707f +#define MATCH_VLHUFF_V 0x1005007 +#define MASK_VLHUFF_V 0x1df0707f +#define MATCH_VLWUFF_V 0x1006007 +#define MASK_VLWUFF_V 0x1df0707f +#define MATCH_VL1R_V 0x2807007 +#define MASK_VL1R_V 0xfff0707f +#define MATCH_VS1R_V 0x2807027 +#define MASK_VS1R_V 0xfff0707f +#define MATCH_VFADD_VF 0x5057 +#define MASK_VFADD_VF 0xfc00707f +#define MATCH_VFSUB_VF 0x8005057 +#define MASK_VFSUB_VF 0xfc00707f +#define MATCH_VFMIN_VF 0x10005057 +#define MASK_VFMIN_VF 0xfc00707f +#define MATCH_VFMAX_VF 0x18005057 +#define MASK_VFMAX_VF 0xfc00707f +#define MATCH_VFSGNJ_VF 0x20005057 +#define MASK_VFSGNJ_VF 0xfc00707f +#define MATCH_VFSGNJN_VF 0x24005057 +#define MASK_VFSGNJN_VF 0xfc00707f +#define MATCH_VFSGNJX_VF 0x28005057 +#define MASK_VFSGNJX_VF 0xfc00707f +#define MATCH_VFSLIDE1UP_VF 0x38005057 +#define MASK_VFSLIDE1UP_VF 0xfc00707f +#define MATCH_VFSLIDE1DOWN_VF 0x3c005057 +#define MASK_VFSLIDE1DOWN_VF 0xfc00707f +#define MATCH_VFMV_S_F 0x42005057 +#define MASK_VFMV_S_F 0xfff0707f +#define MATCH_VFMERGE_VFM 0x5c005057 +#define MASK_VFMERGE_VFM 0xfe00707f +#define MATCH_VFMV_V_F 0x5e005057 +#define MASK_VFMV_V_F 0xfff0707f +#define MATCH_VMFEQ_VF 0x60005057 +#define MASK_VMFEQ_VF 0xfc00707f +#define MATCH_VMFLE_VF 0x64005057 +#define MASK_VMFLE_VF 0xfc00707f +#define MATCH_VMFLT_VF 0x6c005057 +#define MASK_VMFLT_VF 0xfc00707f +#define MATCH_VMFNE_VF 0x70005057 +#define MASK_VMFNE_VF 0xfc00707f +#define MATCH_VMFGT_VF 0x74005057 +#define MASK_VMFGT_VF 0xfc00707f +#define MATCH_VMFGE_VF 0x7c005057 +#define MASK_VMFGE_VF 0xfc00707f +#define MATCH_VFDIV_VF 0x80005057 +#define MASK_VFDIV_VF 0xfc00707f +#define MATCH_VFRDIV_VF 0x84005057 +#define MASK_VFRDIV_VF 0xfc00707f +#define MATCH_VFMUL_VF 0x90005057 +#define MASK_VFMUL_VF 0xfc00707f +#define MATCH_VFRSUB_VF 0x9c005057 +#define MASK_VFRSUB_VF 0xfc00707f +#define MATCH_VFMADD_VF 0xa0005057 +#define MASK_VFMADD_VF 0xfc00707f +#define MATCH_VFNMADD_VF 0xa4005057 +#define MASK_VFNMADD_VF 0xfc00707f +#define MATCH_VFMSUB_VF 0xa8005057 +#define MASK_VFMSUB_VF 0xfc00707f +#define MATCH_VFNMSUB_VF 0xac005057 +#define MASK_VFNMSUB_VF 0xfc00707f +#define MATCH_VFMACC_VF 0xb0005057 +#define MASK_VFMACC_VF 0xfc00707f +#define MATCH_VFNMACC_VF 0xb4005057 +#define MASK_VFNMACC_VF 0xfc00707f +#define MATCH_VFMSAC_VF 0xb8005057 +#define MASK_VFMSAC_VF 0xfc00707f +#define MATCH_VFNMSAC_VF 0xbc005057 +#define MASK_VFNMSAC_VF 0xfc00707f +#define MATCH_VFWADD_VF 0xc0005057 +#define MASK_VFWADD_VF 0xfc00707f +#define MATCH_VFWSUB_VF 0xc8005057 +#define MASK_VFWSUB_VF 0xfc00707f +#define MATCH_VFWADD_WF 0xd0005057 +#define MASK_VFWADD_WF 0xfc00707f +#define MATCH_VFWSUB_WF 0xd8005057 +#define MASK_VFWSUB_WF 0xfc00707f +#define MATCH_VFWMUL_VF 0xe0005057 +#define MASK_VFWMUL_VF 0xfc00707f +#define MATCH_VFWMACC_VF 0xf0005057 +#define MASK_VFWMACC_VF 0xfc00707f +#define MATCH_VFWNMACC_VF 0xf4005057 +#define MASK_VFWNMACC_VF 0xfc00707f +#define MATCH_VFWMSAC_VF 0xf8005057 +#define MASK_VFWMSAC_VF 0xfc00707f +#define MATCH_VFWNMSAC_VF 0xfc005057 +#define MASK_VFWNMSAC_VF 0xfc00707f +#define MATCH_VFADD_VV 0x1057 +#define MASK_VFADD_VV 0xfc00707f +#define MATCH_VFREDSUM_VS 0x4001057 +#define MASK_VFREDSUM_VS 0xfc00707f +#define MATCH_VFSUB_VV 0x8001057 +#define MASK_VFSUB_VV 0xfc00707f +#define MATCH_VFREDOSUM_VS 0xc001057 +#define MASK_VFREDOSUM_VS 0xfc00707f +#define MATCH_VFMIN_VV 0x10001057 +#define MASK_VFMIN_VV 0xfc00707f +#define MATCH_VFREDMIN_VS 0x14001057 +#define MASK_VFREDMIN_VS 0xfc00707f +#define MATCH_VFMAX_VV 0x18001057 +#define MASK_VFMAX_VV 0xfc00707f +#define MATCH_VFREDMAX_VS 0x1c001057 +#define MASK_VFREDMAX_VS 0xfc00707f +#define MATCH_VFSGNJ_VV 0x20001057 +#define MASK_VFSGNJ_VV 0xfc00707f +#define MATCH_VFSGNJN_VV 0x24001057 +#define MASK_VFSGNJN_VV 0xfc00707f +#define MATCH_VFSGNJX_VV 0x28001057 +#define MASK_VFSGNJX_VV 0xfc00707f +#define MATCH_VFMV_F_S 0x42001057 +#define MASK_VFMV_F_S 0xfe0ff07f +#define MATCH_VMFEQ_VV 0x60001057 +#define MASK_VMFEQ_VV 0xfc00707f +#define MATCH_VMFLE_VV 0x64001057 +#define MASK_VMFLE_VV 0xfc00707f +#define MATCH_VMFLT_VV 0x6c001057 +#define MASK_VMFLT_VV 0xfc00707f +#define MATCH_VMFNE_VV 0x70001057 +#define MASK_VMFNE_VV 0xfc00707f +#define MATCH_VFDIV_VV 0x80001057 +#define MASK_VFDIV_VV 0xfc00707f +#define MATCH_VFMUL_VV 0x90001057 +#define MASK_VFMUL_VV 0xfc00707f +#define MATCH_VFMADD_VV 0xa0001057 +#define MASK_VFMADD_VV 0xfc00707f +#define MATCH_VFNMADD_VV 0xa4001057 +#define MASK_VFNMADD_VV 0xfc00707f +#define MATCH_VFMSUB_VV 0xa8001057 +#define MASK_VFMSUB_VV 0xfc00707f +#define MATCH_VFNMSUB_VV 0xac001057 +#define MASK_VFNMSUB_VV 0xfc00707f +#define MATCH_VFMACC_VV 0xb0001057 +#define MASK_VFMACC_VV 0xfc00707f +#define MATCH_VFNMACC_VV 0xb4001057 +#define MASK_VFNMACC_VV 0xfc00707f +#define MATCH_VFMSAC_VV 0xb8001057 +#define MASK_VFMSAC_VV 0xfc00707f +#define MATCH_VFNMSAC_VV 0xbc001057 +#define MASK_VFNMSAC_VV 0xfc00707f +#define MATCH_VFCVT_XU_F_V 0x88001057 +#define MASK_VFCVT_XU_F_V 0xfc0ff07f +#define MATCH_VFCVT_X_F_V 0x88009057 +#define MASK_VFCVT_X_F_V 0xfc0ff07f +#define MATCH_VFCVT_F_XU_V 0x88011057 +#define MASK_VFCVT_F_XU_V 0xfc0ff07f +#define MATCH_VFCVT_F_X_V 0x88019057 +#define MASK_VFCVT_F_X_V 0xfc0ff07f +#define MATCH_VFCVT_RTZ_XU_F_V 0x88031057 +#define MASK_VFCVT_RTZ_XU_F_V 0xfc0ff07f +#define MATCH_VFCVT_RTZ_X_F_V 0x88039057 +#define MASK_VFCVT_RTZ_X_F_V 0xfc0ff07f +#define MATCH_VFWCVT_XU_F_V 0x88041057 +#define MASK_VFWCVT_XU_F_V 0xfc0ff07f +#define MATCH_VFWCVT_X_F_V 0x88049057 +#define MASK_VFWCVT_X_F_V 0xfc0ff07f +#define MATCH_VFWCVT_F_XU_V 0x88051057 +#define MASK_VFWCVT_F_XU_V 0xfc0ff07f +#define MATCH_VFWCVT_F_X_V 0x88059057 +#define MASK_VFWCVT_F_X_V 0xfc0ff07f +#define MATCH_VFWCVT_F_F_V 0x88061057 +#define MASK_VFWCVT_F_F_V 0xfc0ff07f +#define MATCH_VFWCVT_RTZ_XU_F_V 0x88071057 +#define MASK_VFWCVT_RTZ_XU_F_V 0xfc0ff07f +#define MATCH_VFWCVT_RTZ_X_F_V 0x88079057 +#define MASK_VFWCVT_RTZ_X_F_V 0xfc0ff07f +#define MATCH_VFNCVT_XU_F_W 0x88081057 +#define MASK_VFNCVT_XU_F_W 0xfc0ff07f +#define MATCH_VFNCVT_X_F_W 0x88089057 +#define MASK_VFNCVT_X_F_W 0xfc0ff07f +#define MATCH_VFNCVT_F_XU_W 0x88091057 +#define MASK_VFNCVT_F_XU_W 0xfc0ff07f +#define MATCH_VFNCVT_F_X_W 0x88099057 +#define MASK_VFNCVT_F_X_W 0xfc0ff07f +#define MATCH_VFNCVT_F_F_W 0x880a1057 +#define MASK_VFNCVT_F_F_W 0xfc0ff07f +#define MATCH_VFNCVT_ROD_F_F_W 0x880a9057 +#define MASK_VFNCVT_ROD_F_F_W 0xfc0ff07f +#define MATCH_VFNCVT_RTZ_XU_F_W 0x880b1057 +#define MASK_VFNCVT_RTZ_XU_F_W 0xfc0ff07f +#define MATCH_VFNCVT_RTZ_X_F_W 0x880b9057 +#define MASK_VFNCVT_RTZ_X_F_W 0xfc0ff07f +#define MATCH_VFSQRT_V 0x8c001057 +#define MASK_VFSQRT_V 0xfc0ff07f +#define MATCH_VFCLASS_V 0x8c081057 +#define MASK_VFCLASS_V 0xfc0ff07f +#define MATCH_VFWADD_VV 0xc0001057 +#define MASK_VFWADD_VV 0xfc00707f +#define MATCH_VFWREDSUM_VS 0xc4001057 +#define MASK_VFWREDSUM_VS 0xfc00707f +#define MATCH_VFWSUB_VV 0xc8001057 +#define MASK_VFWSUB_VV 0xfc00707f +#define MATCH_VFWREDOSUM_VS 0xcc001057 +#define MASK_VFWREDOSUM_VS 0xfc00707f +#define MATCH_VFWADD_WV 0xd0001057 +#define MASK_VFWADD_WV 0xfc00707f +#define MATCH_VFWSUB_WV 0xd8001057 +#define MASK_VFWSUB_WV 0xfc00707f +#define MATCH_VFWMUL_VV 0xe0001057 +#define MASK_VFWMUL_VV 0xfc00707f +#define MATCH_VFDOT_VV 0xe4001057 +#define MASK_VFDOT_VV 0xfc00707f +#define MATCH_VFWMACC_VV 0xf0001057 +#define MASK_VFWMACC_VV 0xfc00707f +#define MATCH_VFWNMACC_VV 0xf4001057 +#define MASK_VFWNMACC_VV 0xfc00707f +#define MATCH_VFWMSAC_VV 0xf8001057 +#define MASK_VFWMSAC_VV 0xfc00707f +#define MATCH_VFWNMSAC_VV 0xfc001057 +#define MASK_VFWNMSAC_VV 0xfc00707f +#define MATCH_VADD_VX 0x4057 +#define MASK_VADD_VX 0xfc00707f +#define MATCH_VSUB_VX 0x8004057 +#define MASK_VSUB_VX 0xfc00707f +#define MATCH_VRSUB_VX 0xc004057 +#define MASK_VRSUB_VX 0xfc00707f +#define MATCH_VMINU_VX 0x10004057 +#define MASK_VMINU_VX 0xfc00707f +#define MATCH_VMIN_VX 0x14004057 +#define MASK_VMIN_VX 0xfc00707f +#define MATCH_VMAXU_VX 0x18004057 +#define MASK_VMAXU_VX 0xfc00707f +#define MATCH_VMAX_VX 0x1c004057 +#define MASK_VMAX_VX 0xfc00707f +#define MATCH_VAND_VX 0x24004057 +#define MASK_VAND_VX 0xfc00707f +#define MATCH_VOR_VX 0x28004057 +#define MASK_VOR_VX 0xfc00707f +#define MATCH_VXOR_VX 0x2c004057 +#define MASK_VXOR_VX 0xfc00707f +#define MATCH_VRGATHER_VX 0x30004057 +#define MASK_VRGATHER_VX 0xfc00707f +#define MATCH_VSLIDEUP_VX 0x38004057 +#define MASK_VSLIDEUP_VX 0xfc00707f +#define MATCH_VSLIDEDOWN_VX 0x3c004057 +#define MASK_VSLIDEDOWN_VX 0xfc00707f +#define MATCH_VADC_VXM 0x40004057 +#define MASK_VADC_VXM 0xfe00707f +#define MATCH_VMADC_VXM 0x44004057 +#define MASK_VMADC_VXM 0xfc00707f +#define MATCH_VSBC_VXM 0x48004057 +#define MASK_VSBC_VXM 0xfe00707f +#define MATCH_VMSBC_VXM 0x4c004057 +#define MASK_VMSBC_VXM 0xfc00707f +#define MATCH_VMERGE_VXM 0x5c004057 +#define MASK_VMERGE_VXM 0xfe00707f +#define MATCH_VMV_V_X 0x5e004057 +#define MASK_VMV_V_X 0xfff0707f +#define MATCH_VMSEQ_VX 0x60004057 +#define MASK_VMSEQ_VX 0xfc00707f +#define MATCH_VMSNE_VX 0x64004057 +#define MASK_VMSNE_VX 0xfc00707f +#define MATCH_VMSLTU_VX 0x68004057 +#define MASK_VMSLTU_VX 0xfc00707f +#define MATCH_VMSLT_VX 0x6c004057 +#define MASK_VMSLT_VX 0xfc00707f +#define MATCH_VMSLEU_VX 0x70004057 +#define MASK_VMSLEU_VX 0xfc00707f +#define MATCH_VMSLE_VX 0x74004057 +#define MASK_VMSLE_VX 0xfc00707f +#define MATCH_VMSGTU_VX 0x78004057 +#define MASK_VMSGTU_VX 0xfc00707f +#define MATCH_VMSGT_VX 0x7c004057 +#define MASK_VMSGT_VX 0xfc00707f +#define MATCH_VSADDU_VX 0x80004057 +#define MASK_VSADDU_VX 0xfc00707f +#define MATCH_VSADD_VX 0x84004057 +#define MASK_VSADD_VX 0xfc00707f +#define MATCH_VSSUBU_VX 0x88004057 +#define MASK_VSSUBU_VX 0xfc00707f +#define MATCH_VSSUB_VX 0x8c004057 +#define MASK_VSSUB_VX 0xfc00707f +#define MATCH_VSLL_VX 0x94004057 +#define MASK_VSLL_VX 0xfc00707f +#define MATCH_VSMUL_VX 0x9c004057 +#define MASK_VSMUL_VX 0xfc00707f +#define MATCH_VSRL_VX 0xa0004057 +#define MASK_VSRL_VX 0xfc00707f +#define MATCH_VSRA_VX 0xa4004057 +#define MASK_VSRA_VX 0xfc00707f +#define MATCH_VSSRL_VX 0xa8004057 +#define MASK_VSSRL_VX 0xfc00707f +#define MATCH_VSSRA_VX 0xac004057 +#define MASK_VSSRA_VX 0xfc00707f +#define MATCH_VNSRL_WX 0xb0004057 +#define MASK_VNSRL_WX 0xfc00707f +#define MATCH_VNSRA_WX 0xb4004057 +#define MASK_VNSRA_WX 0xfc00707f +#define MATCH_VNCLIPU_WX 0xb8004057 +#define MASK_VNCLIPU_WX 0xfc00707f +#define MATCH_VNCLIP_WX 0xbc004057 +#define MASK_VNCLIP_WX 0xfc00707f +#define MATCH_VQMACCU_VX 0xf0004057 +#define MASK_VQMACCU_VX 0xfc00707f +#define MATCH_VQMACC_VX 0xf4004057 +#define MASK_VQMACC_VX 0xfc00707f +#define MATCH_VQMACCUS_VX 0xf8004057 +#define MASK_VQMACCUS_VX 0xfc00707f +#define MATCH_VQMACCSU_VX 0xfc004057 +#define MASK_VQMACCSU_VX 0xfc00707f +#define MATCH_VADD_VV 0x57 +#define MASK_VADD_VV 0xfc00707f +#define MATCH_VSUB_VV 0x8000057 +#define MASK_VSUB_VV 0xfc00707f +#define MATCH_VMINU_VV 0x10000057 +#define MASK_VMINU_VV 0xfc00707f +#define MATCH_VMIN_VV 0x14000057 +#define MASK_VMIN_VV 0xfc00707f +#define MATCH_VMAXU_VV 0x18000057 +#define MASK_VMAXU_VV 0xfc00707f +#define MATCH_VMAX_VV 0x1c000057 +#define MASK_VMAX_VV 0xfc00707f +#define MATCH_VAND_VV 0x24000057 +#define MASK_VAND_VV 0xfc00707f +#define MATCH_VOR_VV 0x28000057 +#define MASK_VOR_VV 0xfc00707f +#define MATCH_VXOR_VV 0x2c000057 +#define MASK_VXOR_VV 0xfc00707f +#define MATCH_VRGATHER_VV 0x30000057 +#define MASK_VRGATHER_VV 0xfc00707f +#define MATCH_VADC_VVM 0x40000057 +#define MASK_VADC_VVM 0xfe00707f +#define MATCH_VMADC_VVM 0x44000057 +#define MASK_VMADC_VVM 0xfc00707f +#define MATCH_VSBC_VVM 0x48000057 +#define MASK_VSBC_VVM 0xfe00707f +#define MATCH_VMSBC_VVM 0x4c000057 +#define MASK_VMSBC_VVM 0xfc00707f +#define MATCH_VMERGE_VVM 0x5c000057 +#define MASK_VMERGE_VVM 0xfe00707f +#define MATCH_VMV_V_V 0x5e000057 +#define MASK_VMV_V_V 0xfff0707f +#define MATCH_VMSEQ_VV 0x60000057 +#define MASK_VMSEQ_VV 0xfc00707f +#define MATCH_VMSNE_VV 0x64000057 +#define MASK_VMSNE_VV 0xfc00707f +#define MATCH_VMSLTU_VV 0x68000057 +#define MASK_VMSLTU_VV 0xfc00707f +#define MATCH_VMSLT_VV 0x6c000057 +#define MASK_VMSLT_VV 0xfc00707f +#define MATCH_VMSLEU_VV 0x70000057 +#define MASK_VMSLEU_VV 0xfc00707f +#define MATCH_VMSLE_VV 0x74000057 +#define MASK_VMSLE_VV 0xfc00707f +#define MATCH_VSADDU_VV 0x80000057 +#define MASK_VSADDU_VV 0xfc00707f +#define MATCH_VSADD_VV 0x84000057 +#define MASK_VSADD_VV 0xfc00707f +#define MATCH_VSSUBU_VV 0x88000057 +#define MASK_VSSUBU_VV 0xfc00707f +#define MATCH_VSSUB_VV 0x8c000057 +#define MASK_VSSUB_VV 0xfc00707f +#define MATCH_VSLL_VV 0x94000057 +#define MASK_VSLL_VV 0xfc00707f +#define MATCH_VSMUL_VV 0x9c000057 +#define MASK_VSMUL_VV 0xfc00707f +#define MATCH_VSRL_VV 0xa0000057 +#define MASK_VSRL_VV 0xfc00707f +#define MATCH_VSRA_VV 0xa4000057 +#define MASK_VSRA_VV 0xfc00707f +#define MATCH_VSSRL_VV 0xa8000057 +#define MASK_VSSRL_VV 0xfc00707f +#define MATCH_VSSRA_VV 0xac000057 +#define MASK_VSSRA_VV 0xfc00707f +#define MATCH_VNSRL_WV 0xb0000057 +#define MASK_VNSRL_WV 0xfc00707f +#define MATCH_VNSRA_WV 0xb4000057 +#define MASK_VNSRA_WV 0xfc00707f +#define MATCH_VNCLIPU_WV 0xb8000057 +#define MASK_VNCLIPU_WV 0xfc00707f +#define MATCH_VNCLIP_WV 0xbc000057 +#define MASK_VNCLIP_WV 0xfc00707f +#define MATCH_VWREDSUMU_VS 0xc0000057 +#define MASK_VWREDSUMU_VS 0xfc00707f +#define MATCH_VWREDSUM_VS 0xc4000057 +#define MASK_VWREDSUM_VS 0xfc00707f +#define MATCH_VDOTU_VV 0xe0000057 +#define MASK_VDOTU_VV 0xfc00707f +#define MATCH_VDOT_VV 0xe4000057 +#define MASK_VDOT_VV 0xfc00707f +#define MATCH_VQMACCU_VV 0xf0000057 +#define MASK_VQMACCU_VV 0xfc00707f +#define MATCH_VQMACC_VV 0xf4000057 +#define MASK_VQMACC_VV 0xfc00707f +#define MATCH_VQMACCSU_VV 0xfc000057 +#define MASK_VQMACCSU_VV 0xfc00707f +#define MATCH_VADD_VI 0x3057 +#define MASK_VADD_VI 0xfc00707f +#define MATCH_VRSUB_VI 0xc003057 +#define MASK_VRSUB_VI 0xfc00707f +#define MATCH_VAND_VI 0x24003057 +#define MASK_VAND_VI 0xfc00707f +#define MATCH_VOR_VI 0x28003057 +#define MASK_VOR_VI 0xfc00707f +#define MATCH_VXOR_VI 0x2c003057 +#define MASK_VXOR_VI 0xfc00707f +#define MATCH_VRGATHER_VI 0x30003057 +#define MASK_VRGATHER_VI 0xfc00707f +#define MATCH_VSLIDEUP_VI 0x38003057 +#define MASK_VSLIDEUP_VI 0xfc00707f +#define MATCH_VSLIDEDOWN_VI 0x3c003057 +#define MASK_VSLIDEDOWN_VI 0xfc00707f +#define MATCH_VADC_VIM 0x40003057 +#define MASK_VADC_VIM 0xfe00707f +#define MATCH_VMADC_VIM 0x44003057 +#define MASK_VMADC_VIM 0xfc00707f +#define MATCH_VMERGE_VIM 0x5c003057 +#define MASK_VMERGE_VIM 0xfe00707f +#define MATCH_VMV_V_I 0x5e003057 +#define MASK_VMV_V_I 0xfff0707f +#define MATCH_VMSEQ_VI 0x60003057 +#define MASK_VMSEQ_VI 0xfc00707f +#define MATCH_VMSNE_VI 0x64003057 +#define MASK_VMSNE_VI 0xfc00707f +#define MATCH_VMSLEU_VI 0x70003057 +#define MASK_VMSLEU_VI 0xfc00707f +#define MATCH_VMSLE_VI 0x74003057 +#define MASK_VMSLE_VI 0xfc00707f +#define MATCH_VMSGTU_VI 0x78003057 +#define MASK_VMSGTU_VI 0xfc00707f +#define MATCH_VMSGT_VI 0x7c003057 +#define MASK_VMSGT_VI 0xfc00707f +#define MATCH_VSADDU_VI 0x80003057 +#define MASK_VSADDU_VI 0xfc00707f +#define MATCH_VSADD_VI 0x84003057 +#define MASK_VSADD_VI 0xfc00707f +#define MATCH_VSLL_VI 0x94003057 +#define MASK_VSLL_VI 0xfc00707f +#define MATCH_VMV1R_V 0x9e003057 +#define MASK_VMV1R_V 0xfe0ff07f +#define MATCH_VMV2R_V 0x9e00b057 +#define MASK_VMV2R_V 0xfe0ff07f +#define MATCH_VMV4R_V 0x9e01b057 +#define MASK_VMV4R_V 0xfe0ff07f +#define MATCH_VMV8R_V 0x9e03b057 +#define MASK_VMV8R_V 0xfe0ff07f +#define MATCH_VSRL_VI 0xa0003057 +#define MASK_VSRL_VI 0xfc00707f +#define MATCH_VSRA_VI 0xa4003057 +#define MASK_VSRA_VI 0xfc00707f +#define MATCH_VSSRL_VI 0xa8003057 +#define MASK_VSSRL_VI 0xfc00707f +#define MATCH_VSSRA_VI 0xac003057 +#define MASK_VSSRA_VI 0xfc00707f +#define MATCH_VNSRL_WI 0xb0003057 +#define MASK_VNSRL_WI 0xfc00707f +#define MATCH_VNSRA_WI 0xb4003057 +#define MASK_VNSRA_WI 0xfc00707f +#define MATCH_VNCLIPU_WI 0xb8003057 +#define MASK_VNCLIPU_WI 0xfc00707f +#define MATCH_VNCLIP_WI 0xbc003057 +#define MASK_VNCLIP_WI 0xfc00707f +#define MATCH_VREDSUM_VS 0x2057 +#define MASK_VREDSUM_VS 0xfc00707f +#define MATCH_VREDAND_VS 0x4002057 +#define MASK_VREDAND_VS 0xfc00707f +#define MATCH_VREDOR_VS 0x8002057 +#define MASK_VREDOR_VS 0xfc00707f +#define MATCH_VREDXOR_VS 0xc002057 +#define MASK_VREDXOR_VS 0xfc00707f +#define MATCH_VREDMINU_VS 0x10002057 +#define MASK_VREDMINU_VS 0xfc00707f +#define MATCH_VREDMIN_VS 0x14002057 +#define MASK_VREDMIN_VS 0xfc00707f +#define MATCH_VREDMAXU_VS 0x18002057 +#define MASK_VREDMAXU_VS 0xfc00707f +#define MATCH_VREDMAX_VS 0x1c002057 +#define MASK_VREDMAX_VS 0xfc00707f +#define MATCH_VAADDU_VV 0x20002057 +#define MASK_VAADDU_VV 0xfc00707f +#define MATCH_VAADD_VV 0x24002057 +#define MASK_VAADD_VV 0xfc00707f +#define MATCH_VASUBU_VV 0x28002057 +#define MASK_VASUBU_VV 0xfc00707f +#define MATCH_VASUB_VV 0x2c002057 +#define MASK_VASUB_VV 0xfc00707f +#define MATCH_VMV_X_S 0x42002057 +#define MASK_VMV_X_S 0xfe0ff07f +#define MATCH_VCOMPRESS_VM 0x5e002057 +#define MASK_VCOMPRESS_VM 0xfe00707f +#define MATCH_VMANDNOT_MM 0x60002057 +#define MASK_VMANDNOT_MM 0xfc00707f +#define MATCH_VMAND_MM 0x64002057 +#define MASK_VMAND_MM 0xfc00707f +#define MATCH_VMOR_MM 0x68002057 +#define MASK_VMOR_MM 0xfc00707f +#define MATCH_VMXOR_MM 0x6c002057 +#define MASK_VMXOR_MM 0xfc00707f +#define MATCH_VMORNOT_MM 0x70002057 +#define MASK_VMORNOT_MM 0xfc00707f +#define MATCH_VMNAND_MM 0x74002057 +#define MASK_VMNAND_MM 0xfc00707f +#define MATCH_VMNOR_MM 0x78002057 +#define MASK_VMNOR_MM 0xfc00707f +#define MATCH_VMXNOR_MM 0x7c002057 +#define MASK_VMXNOR_MM 0xfc00707f +#define MATCH_VMSBF_M 0x5000a057 +#define MASK_VMSBF_M 0xfc0ff07f +#define MATCH_VMSOF_M 0x50012057 +#define MASK_VMSOF_M 0xfc0ff07f +#define MATCH_VMSIF_M 0x5001a057 +#define MASK_VMSIF_M 0xfc0ff07f +#define MATCH_VIOTA_M 0x50082057 +#define MASK_VIOTA_M 0xfc0ff07f +#define MATCH_VID_V 0x5008a057 +#define MASK_VID_V 0xfdfff07f +#define MATCH_VPOPC_M 0x40082057 +#define MASK_VPOPC_M 0xfc0ff07f +#define MATCH_VFIRST_M 0x4008a057 +#define MASK_VFIRST_M 0xfc0ff07f +#define MATCH_VDIVU_VV 0x80002057 +#define MASK_VDIVU_VV 0xfc00707f +#define MATCH_VDIV_VV 0x84002057 +#define MASK_VDIV_VV 0xfc00707f +#define MATCH_VREMU_VV 0x88002057 +#define MASK_VREMU_VV 0xfc00707f +#define MATCH_VREM_VV 0x8c002057 +#define MASK_VREM_VV 0xfc00707f +#define MATCH_VMULHU_VV 0x90002057 +#define MASK_VMULHU_VV 0xfc00707f +#define MATCH_VMUL_VV 0x94002057 +#define MASK_VMUL_VV 0xfc00707f +#define MATCH_VMULHSU_VV 0x98002057 +#define MASK_VMULHSU_VV 0xfc00707f +#define MATCH_VMULH_VV 0x9c002057 +#define MASK_VMULH_VV 0xfc00707f +#define MATCH_VMADD_VV 0xa4002057 +#define MASK_VMADD_VV 0xfc00707f +#define MATCH_VNMSUB_VV 0xac002057 +#define MASK_VNMSUB_VV 0xfc00707f +#define MATCH_VMACC_VV 0xb4002057 +#define MASK_VMACC_VV 0xfc00707f +#define MATCH_VNMSAC_VV 0xbc002057 +#define MASK_VNMSAC_VV 0xfc00707f +#define MATCH_VWADDU_VV 0xc0002057 +#define MASK_VWADDU_VV 0xfc00707f +#define MATCH_VWADD_VV 0xc4002057 +#define MASK_VWADD_VV 0xfc00707f +#define MATCH_VWSUBU_VV 0xc8002057 +#define MASK_VWSUBU_VV 0xfc00707f +#define MATCH_VWSUB_VV 0xcc002057 +#define MASK_VWSUB_VV 0xfc00707f +#define MATCH_VWADDU_WV 0xd0002057 +#define MASK_VWADDU_WV 0xfc00707f +#define MATCH_VWADD_WV 0xd4002057 +#define MASK_VWADD_WV 0xfc00707f +#define MATCH_VWSUBU_WV 0xd8002057 +#define MASK_VWSUBU_WV 0xfc00707f +#define MATCH_VWSUB_WV 0xdc002057 +#define MASK_VWSUB_WV 0xfc00707f +#define MATCH_VWMULU_VV 0xe0002057 +#define MASK_VWMULU_VV 0xfc00707f +#define MATCH_VWMULSU_VV 0xe8002057 +#define MASK_VWMULSU_VV 0xfc00707f +#define MATCH_VWMUL_VV 0xec002057 +#define MASK_VWMUL_VV 0xfc00707f +#define MATCH_VWMACCU_VV 0xf0002057 +#define MASK_VWMACCU_VV 0xfc00707f +#define MATCH_VWMACC_VV 0xf4002057 +#define MASK_VWMACC_VV 0xfc00707f +#define MATCH_VWMACCSU_VV 0xfc002057 +#define MASK_VWMACCSU_VV 0xfc00707f +#define MATCH_VAADDU_VX 0x20006057 +#define MASK_VAADDU_VX 0xfc00707f +#define MATCH_VAADD_VX 0x24006057 +#define MASK_VAADD_VX 0xfc00707f +#define MATCH_VASUBU_VX 0x28006057 +#define MASK_VASUBU_VX 0xfc00707f +#define MATCH_VASUB_VX 0x2c006057 +#define MASK_VASUB_VX 0xfc00707f +#define MATCH_VMV_S_X 0x42006057 +#define MASK_VMV_S_X 0xfff0707f +#define MATCH_VSLIDE1UP_VX 0x38006057 +#define MASK_VSLIDE1UP_VX 0xfc00707f +#define MATCH_VSLIDE1DOWN_VX 0x3c006057 +#define MASK_VSLIDE1DOWN_VX 0xfc00707f +#define MATCH_VDIVU_VX 0x80006057 +#define MASK_VDIVU_VX 0xfc00707f +#define MATCH_VDIV_VX 0x84006057 +#define MASK_VDIV_VX 0xfc00707f +#define MATCH_VREMU_VX 0x88006057 +#define MASK_VREMU_VX 0xfc00707f +#define MATCH_VREM_VX 0x8c006057 +#define MASK_VREM_VX 0xfc00707f +#define MATCH_VMULHU_VX 0x90006057 +#define MASK_VMULHU_VX 0xfc00707f +#define MATCH_VMUL_VX 0x94006057 +#define MASK_VMUL_VX 0xfc00707f +#define MATCH_VMULHSU_VX 0x98006057 +#define MASK_VMULHSU_VX 0xfc00707f +#define MATCH_VMULH_VX 0x9c006057 +#define MASK_VMULH_VX 0xfc00707f +#define MATCH_VMADD_VX 0xa4006057 +#define MASK_VMADD_VX 0xfc00707f +#define MATCH_VNMSUB_VX 0xac006057 +#define MASK_VNMSUB_VX 0xfc00707f +#define MATCH_VMACC_VX 0xb4006057 +#define MASK_VMACC_VX 0xfc00707f +#define MATCH_VNMSAC_VX 0xbc006057 +#define MASK_VNMSAC_VX 0xfc00707f +#define MATCH_VWADDU_VX 0xc0006057 +#define MASK_VWADDU_VX 0xfc00707f +#define MATCH_VWADD_VX 0xc4006057 +#define MASK_VWADD_VX 0xfc00707f +#define MATCH_VWSUBU_VX 0xc8006057 +#define MASK_VWSUBU_VX 0xfc00707f +#define MATCH_VWSUB_VX 0xcc006057 +#define MASK_VWSUB_VX 0xfc00707f +#define MATCH_VWADDU_WX 0xd0006057 +#define MASK_VWADDU_WX 0xfc00707f +#define MATCH_VWADD_WX 0xd4006057 +#define MASK_VWADD_WX 0xfc00707f +#define MATCH_VWSUBU_WX 0xd8006057 +#define MASK_VWSUBU_WX 0xfc00707f +#define MATCH_VWSUB_WX 0xdc006057 +#define MASK_VWSUB_WX 0xfc00707f +#define MATCH_VWMULU_VX 0xe0006057 +#define MASK_VWMULU_VX 0xfc00707f +#define MATCH_VWMULSU_VX 0xe8006057 +#define MASK_VWMULSU_VX 0xfc00707f +#define MATCH_VWMUL_VX 0xec006057 +#define MASK_VWMUL_VX 0xfc00707f +#define MATCH_VWMACCU_VX 0xf0006057 +#define MASK_VWMACCU_VX 0xfc00707f +#define MATCH_VWMACC_VX 0xf4006057 +#define MASK_VWMACC_VX 0xfc00707f +#define MATCH_VWMACCUS_VX 0xf8006057 +#define MASK_VWMACCUS_VX 0xfc00707f +#define MATCH_VWMACCSU_VX 0xfc006057 +#define MASK_VWMACCSU_VX 0xfc00707f +#define MATCH_VAMOSWAPW_V 0x800602f +#define MASK_VAMOSWAPW_V 0xf800707f +#define MATCH_VAMOADDW_V 0x602f +#define MASK_VAMOADDW_V 0xf800707f +#define MATCH_VAMOXORW_V 0x2000602f +#define MASK_VAMOXORW_V 0xf800707f +#define MATCH_VAMOANDW_V 0x6000602f +#define MASK_VAMOANDW_V 0xf800707f +#define MATCH_VAMOORW_V 0x4000602f +#define MASK_VAMOORW_V 0xf800707f +#define MATCH_VAMOMINW_V 0x8000602f +#define MASK_VAMOMINW_V 0xf800707f +#define MATCH_VAMOMAXW_V 0xa000602f +#define MASK_VAMOMAXW_V 0xf800707f +#define MATCH_VAMOMINUW_V 0xc000602f +#define MASK_VAMOMINUW_V 0xf800707f +#define MATCH_VAMOMAXUW_V 0xe000602f +#define MASK_VAMOMAXUW_V 0xf800707f +#define MATCH_VAMOSWAPE_V 0x800702f +#define MASK_VAMOSWAPE_V 0xf800707f +#define MATCH_VAMOADDE_V 0x702f +#define MASK_VAMOADDE_V 0xf800707f +#define MATCH_VAMOXORE_V 0x2000702f +#define MASK_VAMOXORE_V 0xf800707f +#define MATCH_VAMOANDE_V 0x6000702f +#define MASK_VAMOANDE_V 0xf800707f +#define MATCH_VAMOORE_V 0x4000702f +#define MASK_VAMOORE_V 0xf800707f +#define MATCH_VAMOMINE_V 0x8000702f +#define MASK_VAMOMINE_V 0xf800707f +#define MATCH_VAMOMAXE_V 0xa000702f +#define MASK_VAMOMAXE_V 0xf800707f +#define MATCH_VAMOMINUE_V 0xc000702f +#define MASK_VAMOMINUE_V 0xf800707f +#define MATCH_VAMOMAXUE_V 0xe000702f +#define MASK_VAMOMAXUE_V 0xf800707f +#define MATCH_VMVNFR_V 0x9e003057 +#define MASK_VMVNFR_V 0xfe00707f +#define CSR_FFLAGS 0x1 +#define CSR_FRM 0x2 +#define CSR_FCSR 0x3 +#define CSR_USTATUS 0x0 +#define CSR_UIE 0x4 +#define CSR_UTVEC 0x5 +#define CSR_VSTART 0x8 +#define CSR_VXSAT 0x9 +#define CSR_VXRM 0xa +#define CSR_VCSR 0xf +#define CSR_USCRATCH 0x40 +#define CSR_UEPC 0x41 +#define CSR_UCAUSE 0x42 +#define CSR_UTVAL 0x43 +#define CSR_UIP 0x44 +#define CSR_CYCLE 0xc00 +#define CSR_TIME 0xc01 +#define CSR_INSTRET 0xc02 +#define CSR_HPMCOUNTER3 0xc03 +#define CSR_HPMCOUNTER4 0xc04 +#define CSR_HPMCOUNTER5 0xc05 +#define CSR_HPMCOUNTER6 0xc06 +#define CSR_HPMCOUNTER7 0xc07 +#define CSR_HPMCOUNTER8 0xc08 +#define CSR_HPMCOUNTER9 0xc09 +#define CSR_HPMCOUNTER10 0xc0a +#define CSR_HPMCOUNTER11 0xc0b +#define CSR_HPMCOUNTER12 0xc0c +#define CSR_HPMCOUNTER13 0xc0d +#define CSR_HPMCOUNTER14 0xc0e +#define CSR_HPMCOUNTER15 0xc0f +#define CSR_HPMCOUNTER16 0xc10 +#define CSR_HPMCOUNTER17 0xc11 +#define CSR_HPMCOUNTER18 0xc12 +#define CSR_HPMCOUNTER19 0xc13 +#define CSR_HPMCOUNTER20 0xc14 +#define CSR_HPMCOUNTER21 0xc15 +#define CSR_HPMCOUNTER22 0xc16 +#define CSR_HPMCOUNTER23 0xc17 +#define CSR_HPMCOUNTER24 0xc18 +#define CSR_HPMCOUNTER25 0xc19 +#define CSR_HPMCOUNTER26 0xc1a +#define CSR_HPMCOUNTER27 0xc1b +#define CSR_HPMCOUNTER28 0xc1c +#define CSR_HPMCOUNTER29 0xc1d +#define CSR_HPMCOUNTER30 0xc1e +#define CSR_HPMCOUNTER31 0xc1f +#define CSR_VL 0xc20 +#define CSR_VTYPE 0xc21 +#define CSR_VLENB 0xc22 +#define CSR_SSTATUS 0x100 +#define CSR_SEDELEG 0x102 +#define CSR_SIDELEG 0x103 +#define CSR_SIE 0x104 +#define CSR_STVEC 0x105 +#define CSR_SCOUNTEREN 0x106 +#define CSR_SSCRATCH 0x140 +#define CSR_SEPC 0x141 +#define CSR_SCAUSE 0x142 +#define CSR_STVAL 0x143 +#define CSR_SIP 0x144 +#define CSR_SATP 0x180 +#define CSR_VSSTATUS 0x200 +#define CSR_VSIE 0x204 +#define CSR_VSTVEC 0x205 +#define CSR_VSSCRATCH 0x240 +#define CSR_VSEPC 0x241 +#define CSR_VSCAUSE 0x242 +#define CSR_VSTVAL 0x243 +#define CSR_VSIP 0x244 +#define CSR_VSATP 0x280 +#define CSR_HSTATUS 0x600 +#define CSR_HEDELEG 0x602 +#define CSR_HIDELEG 0x603 +#define CSR_HIE 0x604 +#define CSR_HTIMEDELTA 0x605 +#define CSR_HCOUNTEREN 0x606 +#define CSR_HGEIE 0x607 +#define CSR_HTVAL 0x643 +#define CSR_HIP 0x644 +#define CSR_HVIP 0x645 +#define CSR_HTINST 0x64a +#define CSR_HGATP 0x680 +#define CSR_HGEIP 0xe12 +#define CSR_UTVT 0x7 +#define CSR_UNXTI 0x45 +#define CSR_UINTSTATUS 0x46 +#define CSR_USCRATCHCSW 0x48 +#define CSR_USCRATCHCSWL 0x49 +#define CSR_STVT 0x107 +#define CSR_SNXTI 0x145 +#define CSR_SINTSTATUS 0x146 +#define CSR_SSCRATCHCSW 0x148 +#define CSR_SSCRATCHCSWL 0x149 +#define CSR_MTVT 0x307 +#define CSR_MNXTI 0x345 +#define CSR_MINTSTATUS 0x346 +#define CSR_MSCRATCHCSW 0x348 +#define CSR_MSCRATCHCSWL 0x349 +#define CSR_MSTATUS 0x300 +#define CSR_MISA 0x301 +#define CSR_MEDELEG 0x302 +#define CSR_MIDELEG 0x303 +#define CSR_MIE 0x304 +#define CSR_MTVEC 0x305 +#define CSR_MCOUNTEREN 0x306 +#define CSR_MCOUNTINHIBIT 0x320 +#define CSR_MSCRATCH 0x340 +#define CSR_MEPC 0x341 +#define CSR_MCAUSE 0x342 +#define CSR_MTVAL 0x343 +#define CSR_MIP 0x344 +#define CSR_MTINST 0x34a +#define CSR_MTVAL2 0x34b +#define CSR_PMPCFG0 0x3a0 +#define CSR_PMPCFG1 0x3a1 +#define CSR_PMPCFG2 0x3a2 +#define CSR_PMPCFG3 0x3a3 +#define CSR_PMPADDR0 0x3b0 +#define CSR_PMPADDR1 0x3b1 +#define CSR_PMPADDR2 0x3b2 +#define CSR_PMPADDR3 0x3b3 +#define CSR_PMPADDR4 0x3b4 +#define CSR_PMPADDR5 0x3b5 +#define CSR_PMPADDR6 0x3b6 +#define CSR_PMPADDR7 0x3b7 +#define CSR_PMPADDR8 0x3b8 +#define CSR_PMPADDR9 0x3b9 +#define CSR_PMPADDR10 0x3ba +#define CSR_PMPADDR11 0x3bb +#define CSR_PMPADDR12 0x3bc +#define CSR_PMPADDR13 0x3bd +#define CSR_PMPADDR14 0x3be +#define CSR_PMPADDR15 0x3bf +#define CSR_TSELECT 0x7a0 +#define CSR_TDATA1 0x7a1 +#define CSR_TDATA2 0x7a2 +#define CSR_TDATA3 0x7a3 +#define CSR_DCSR 0x7b0 +#define CSR_DPC 0x7b1 +#define CSR_DSCRATCH0 0x7b2 +#define CSR_DSCRATCH1 0x7b3 +#define CSR_MCYCLE 0xb00 +#define CSR_MINSTRET 0xb02 +#define CSR_MHPMCOUNTER3 0xb03 +#define CSR_MHPMCOUNTER4 0xb04 +#define CSR_MHPMCOUNTER5 0xb05 +#define CSR_MHPMCOUNTER6 0xb06 +#define CSR_MHPMCOUNTER7 0xb07 +#define CSR_MHPMCOUNTER8 0xb08 +#define CSR_MHPMCOUNTER9 0xb09 +#define CSR_MHPMCOUNTER10 0xb0a +#define CSR_MHPMCOUNTER11 0xb0b +#define CSR_MHPMCOUNTER12 0xb0c +#define CSR_MHPMCOUNTER13 0xb0d +#define CSR_MHPMCOUNTER14 0xb0e +#define CSR_MHPMCOUNTER15 0xb0f +#define CSR_MHPMCOUNTER16 0xb10 +#define CSR_MHPMCOUNTER17 0xb11 +#define CSR_MHPMCOUNTER18 0xb12 +#define CSR_MHPMCOUNTER19 0xb13 +#define CSR_MHPMCOUNTER20 0xb14 +#define CSR_MHPMCOUNTER21 0xb15 +#define CSR_MHPMCOUNTER22 0xb16 +#define CSR_MHPMCOUNTER23 0xb17 +#define CSR_MHPMCOUNTER24 0xb18 +#define CSR_MHPMCOUNTER25 0xb19 +#define CSR_MHPMCOUNTER26 0xb1a +#define CSR_MHPMCOUNTER27 0xb1b +#define CSR_MHPMCOUNTER28 0xb1c +#define CSR_MHPMCOUNTER29 0xb1d +#define CSR_MHPMCOUNTER30 0xb1e +#define CSR_MHPMCOUNTER31 0xb1f +#define CSR_MHPMEVENT3 0x323 +#define CSR_MHPMEVENT4 0x324 +#define CSR_MHPMEVENT5 0x325 +#define CSR_MHPMEVENT6 0x326 +#define CSR_MHPMEVENT7 0x327 +#define CSR_MHPMEVENT8 0x328 +#define CSR_MHPMEVENT9 0x329 +#define CSR_MHPMEVENT10 0x32a +#define CSR_MHPMEVENT11 0x32b +#define CSR_MHPMEVENT12 0x32c +#define CSR_MHPMEVENT13 0x32d +#define CSR_MHPMEVENT14 0x32e +#define CSR_MHPMEVENT15 0x32f +#define CSR_MHPMEVENT16 0x330 +#define CSR_MHPMEVENT17 0x331 +#define CSR_MHPMEVENT18 0x332 +#define CSR_MHPMEVENT19 0x333 +#define CSR_MHPMEVENT20 0x334 +#define CSR_MHPMEVENT21 0x335 +#define CSR_MHPMEVENT22 0x336 +#define CSR_MHPMEVENT23 0x337 +#define CSR_MHPMEVENT24 0x338 +#define CSR_MHPMEVENT25 0x339 +#define CSR_MHPMEVENT26 0x33a +#define CSR_MHPMEVENT27 0x33b +#define CSR_MHPMEVENT28 0x33c +#define CSR_MHPMEVENT29 0x33d +#define CSR_MHPMEVENT30 0x33e +#define CSR_MHPMEVENT31 0x33f +#define CSR_MVENDORID 0xf11 +#define CSR_MARCHID 0xf12 +#define CSR_MIMPID 0xf13 +#define CSR_MHARTID 0xf14 +#define CSR_HTIMEDELTAH 0x615 +#define CSR_CYCLEH 0xc80 +#define CSR_TIMEH 0xc81 +#define CSR_INSTRETH 0xc82 +#define CSR_HPMCOUNTER3H 0xc83 +#define CSR_HPMCOUNTER4H 0xc84 +#define CSR_HPMCOUNTER5H 0xc85 +#define CSR_HPMCOUNTER6H 0xc86 +#define CSR_HPMCOUNTER7H 0xc87 +#define CSR_HPMCOUNTER8H 0xc88 +#define CSR_HPMCOUNTER9H 0xc89 +#define CSR_HPMCOUNTER10H 0xc8a +#define CSR_HPMCOUNTER11H 0xc8b +#define CSR_HPMCOUNTER12H 0xc8c +#define CSR_HPMCOUNTER13H 0xc8d +#define CSR_HPMCOUNTER14H 0xc8e +#define CSR_HPMCOUNTER15H 0xc8f +#define CSR_HPMCOUNTER16H 0xc90 +#define CSR_HPMCOUNTER17H 0xc91 +#define CSR_HPMCOUNTER18H 0xc92 +#define CSR_HPMCOUNTER19H 0xc93 +#define CSR_HPMCOUNTER20H 0xc94 +#define CSR_HPMCOUNTER21H 0xc95 +#define CSR_HPMCOUNTER22H 0xc96 +#define CSR_HPMCOUNTER23H 0xc97 +#define CSR_HPMCOUNTER24H 0xc98 +#define CSR_HPMCOUNTER25H 0xc99 +#define CSR_HPMCOUNTER26H 0xc9a +#define CSR_HPMCOUNTER27H 0xc9b +#define CSR_HPMCOUNTER28H 0xc9c +#define CSR_HPMCOUNTER29H 0xc9d +#define CSR_HPMCOUNTER30H 0xc9e +#define CSR_HPMCOUNTER31H 0xc9f +#define CSR_MSTATUSH 0x310 +#define CSR_MCYCLEH 0xb80 +#define CSR_MINSTRETH 0xb82 +#define CSR_MHPMCOUNTER3H 0xb83 +#define CSR_MHPMCOUNTER4H 0xb84 +#define CSR_MHPMCOUNTER5H 0xb85 +#define CSR_MHPMCOUNTER6H 0xb86 +#define CSR_MHPMCOUNTER7H 0xb87 +#define CSR_MHPMCOUNTER8H 0xb88 +#define CSR_MHPMCOUNTER9H 0xb89 +#define CSR_MHPMCOUNTER10H 0xb8a +#define CSR_MHPMCOUNTER11H 0xb8b +#define CSR_MHPMCOUNTER12H 0xb8c +#define CSR_MHPMCOUNTER13H 0xb8d +#define CSR_MHPMCOUNTER14H 0xb8e +#define CSR_MHPMCOUNTER15H 0xb8f +#define CSR_MHPMCOUNTER16H 0xb90 +#define CSR_MHPMCOUNTER17H 0xb91 +#define CSR_MHPMCOUNTER18H 0xb92 +#define CSR_MHPMCOUNTER19H 0xb93 +#define CSR_MHPMCOUNTER20H 0xb94 +#define CSR_MHPMCOUNTER21H 0xb95 +#define CSR_MHPMCOUNTER22H 0xb96 +#define CSR_MHPMCOUNTER23H 0xb97 +#define CSR_MHPMCOUNTER24H 0xb98 +#define CSR_MHPMCOUNTER25H 0xb99 +#define CSR_MHPMCOUNTER26H 0xb9a +#define CSR_MHPMCOUNTER27H 0xb9b +#define CSR_MHPMCOUNTER28H 0xb9c +#define CSR_MHPMCOUNTER29H 0xb9d +#define CSR_MHPMCOUNTER30H 0xb9e +#define CSR_MHPMCOUNTER31H 0xb9f +#define CAUSE_MISALIGNED_FETCH 0x0 +#define CAUSE_FETCH_ACCESS 0x1 +#define CAUSE_ILLEGAL_INSTRUCTION 0x2 +#define CAUSE_BREAKPOINT 0x3 +#define CAUSE_MISALIGNED_LOAD 0x4 +#define CAUSE_LOAD_ACCESS 0x5 +#define CAUSE_MISALIGNED_STORE 0x6 +#define CAUSE_STORE_ACCESS 0x7 +#define CAUSE_USER_ECALL 0x8 +#define CAUSE_SUPERVISOR_ECALL 0x9 +#define CAUSE_HYPERVISOR_ECALL 0xa +#define CAUSE_MACHINE_ECALL 0xb +#define CAUSE_FETCH_PAGE_FAULT 0xc +#define CAUSE_LOAD_PAGE_FAULT 0xd +#define CAUSE_STORE_PAGE_FAULT 0xf +#endif +#ifdef DECLARE_INSN +DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32) +DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32) +DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32) +DECLARE_INSN(frflags, MATCH_FRFLAGS, MASK_FRFLAGS) +DECLARE_INSN(fsflags, MATCH_FSFLAGS, MASK_FSFLAGS) +DECLARE_INSN(fsflagsi, MATCH_FSFLAGSI, MASK_FSFLAGSI) +DECLARE_INSN(frrm, MATCH_FRRM, MASK_FRRM) +DECLARE_INSN(fsrm, MATCH_FSRM, MASK_FSRM) +DECLARE_INSN(fsrmi, MATCH_FSRMI, MASK_FSRMI) +DECLARE_INSN(fscsr, MATCH_FSCSR, MASK_FSCSR) +DECLARE_INSN(frcsr, MATCH_FRCSR, MASK_FRCSR) +DECLARE_INSN(rdcycle, MATCH_RDCYCLE, MASK_RDCYCLE) +DECLARE_INSN(rdtime, MATCH_RDTIME, MASK_RDTIME) +DECLARE_INSN(rdinstret, MATCH_RDINSTRET, MASK_RDINSTRET) +DECLARE_INSN(rdcycleh, MATCH_RDCYCLEH, MASK_RDCYCLEH) +DECLARE_INSN(rdtimeh, MATCH_RDTIMEH, MASK_RDTIMEH) +DECLARE_INSN(rdinstreth, MATCH_RDINSTRETH, MASK_RDINSTRETH) +DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) +DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK) +DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) +DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) +DECLARE_INSN(fence_tso, MATCH_FENCE_TSO, MASK_FENCE_TSO) +DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE) +DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ) +DECLARE_INSN(bne, MATCH_BNE, MASK_BNE) +DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) +DECLARE_INSN(bge, MATCH_BGE, MASK_BGE) +DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) +DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU) +DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR) +DECLARE_INSN(jal, MATCH_JAL, MASK_JAL) +DECLARE_INSN(lui, MATCH_LUI, MASK_LUI) +DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC) +DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI) +DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI) +DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) +DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) +DECLARE_INSN(xori, MATCH_XORI, MASK_XORI) +DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) +DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) +DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) +DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI) +DECLARE_INSN(add, MATCH_ADD, MASK_ADD) +DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) +DECLARE_INSN(sll, MATCH_SLL, MASK_SLL) +DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) +DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU) +DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) +DECLARE_INSN(srl, MATCH_SRL, MASK_SRL) +DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) +DECLARE_INSN(or, MATCH_OR, MASK_OR) +DECLARE_INSN(and, MATCH_AND, MASK_AND) +DECLARE_INSN(lb, MATCH_LB, MASK_LB) +DECLARE_INSN(lh, MATCH_LH, MASK_LH) +DECLARE_INSN(lw, MATCH_LW, MASK_LW) +DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU) +DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU) +DECLARE_INSN(sb, MATCH_SB, MASK_SB) +DECLARE_INSN(sh, MATCH_SH, MASK_SH) +DECLARE_INSN(sw, MATCH_SW, MASK_SW) +DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE) +DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I) +DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW) +DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) +DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) +DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW) +DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW) +DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) +DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW) +DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) +DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW) +DECLARE_INSN(ld, MATCH_LD, MASK_LD) +DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU) +DECLARE_INSN(sd, MATCH_SD, MASK_SD) +DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) +DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) +DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) +DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) +DECLARE_INSN(div, MATCH_DIV, MASK_DIV) +DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU) +DECLARE_INSN(rem, MATCH_REM, MASK_REM) +DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) +DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) +DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW) +DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW) +DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) +DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) +DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W) +DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) +DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) +DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W) +DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W) +DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W) +DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W) +DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W) +DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W) +DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W) +DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) +DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D) +DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D) +DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D) +DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D) +DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D) +DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) +DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D) +DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D) +DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D) +DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D) +DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) +DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S) +DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S) +DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S) +DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S) +DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S) +DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S) +DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S) +DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) +DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S) +DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S) +DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S) +DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S) +DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S) +DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) +DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) +DECLARE_INSN(fmv_x_w, MATCH_FMV_X_W, MASK_FMV_X_W) +DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) +DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) +DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) +DECLARE_INSN(fmv_w_x, MATCH_FMV_W_X, MASK_FMV_W_X) +DECLARE_INSN(flw, MATCH_FLW, MASK_FLW) +DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW) +DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S) +DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S) +DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S) +DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S) +DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S) +DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S) +DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) +DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) +DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D) +DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D) +DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D) +DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D) +DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D) +DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) +DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D) +DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) +DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D) +DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D) +DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S) +DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D) +DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D) +DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D) +DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D) +DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D) +DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D) +DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D) +DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) +DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) +DECLARE_INSN(fld, MATCH_FLD, MASK_FLD) +DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD) +DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D) +DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D) +DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D) +DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D) +DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D) +DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D) +DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D) +DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) +DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU) +DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X) +DECLARE_INSN(fadd_q, MATCH_FADD_Q, MASK_FADD_Q) +DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q) +DECLARE_INSN(fmul_q, MATCH_FMUL_Q, MASK_FMUL_Q) +DECLARE_INSN(fdiv_q, MATCH_FDIV_Q, MASK_FDIV_Q) +DECLARE_INSN(fsgnj_q, MATCH_FSGNJ_Q, MASK_FSGNJ_Q) +DECLARE_INSN(fsgnjn_q, MATCH_FSGNJN_Q, MASK_FSGNJN_Q) +DECLARE_INSN(fsgnjx_q, MATCH_FSGNJX_Q, MASK_FSGNJX_Q) +DECLARE_INSN(fmin_q, MATCH_FMIN_Q, MASK_FMIN_Q) +DECLARE_INSN(fmax_q, MATCH_FMAX_Q, MASK_FMAX_Q) +DECLARE_INSN(fcvt_s_q, MATCH_FCVT_S_Q, MASK_FCVT_S_Q) +DECLARE_INSN(fcvt_q_s, MATCH_FCVT_Q_S, MASK_FCVT_Q_S) +DECLARE_INSN(fcvt_d_q, MATCH_FCVT_D_Q, MASK_FCVT_D_Q) +DECLARE_INSN(fcvt_q_d, MATCH_FCVT_Q_D, MASK_FCVT_Q_D) +DECLARE_INSN(fsqrt_q, MATCH_FSQRT_Q, MASK_FSQRT_Q) +DECLARE_INSN(fle_q, MATCH_FLE_Q, MASK_FLE_Q) +DECLARE_INSN(flt_q, MATCH_FLT_Q, MASK_FLT_Q) +DECLARE_INSN(feq_q, MATCH_FEQ_Q, MASK_FEQ_Q) +DECLARE_INSN(fcvt_w_q, MATCH_FCVT_W_Q, MASK_FCVT_W_Q) +DECLARE_INSN(fcvt_wu_q, MATCH_FCVT_WU_Q, MASK_FCVT_WU_Q) +DECLARE_INSN(fclass_q, MATCH_FCLASS_Q, MASK_FCLASS_Q) +DECLARE_INSN(fcvt_q_w, MATCH_FCVT_Q_W, MASK_FCVT_Q_W) +DECLARE_INSN(fcvt_q_wu, MATCH_FCVT_Q_WU, MASK_FCVT_Q_WU) +DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ) +DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ) +DECLARE_INSN(fmadd_q, MATCH_FMADD_Q, MASK_FMADD_Q) +DECLARE_INSN(fmsub_q, MATCH_FMSUB_Q, MASK_FMSUB_Q) +DECLARE_INSN(fnmsub_q, MATCH_FNMSUB_Q, MASK_FNMSUB_Q) +DECLARE_INSN(fnmadd_q, MATCH_FNMADD_Q, MASK_FNMADD_Q) +DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q) +DECLARE_INSN(fcvt_lu_q, MATCH_FCVT_LU_Q, MASK_FCVT_LU_Q) +DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L) +DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU) +DECLARE_INSN(fmv_x_q, MATCH_FMV_X_Q, MASK_FMV_X_Q) +DECLARE_INSN(fmv_q_x, MATCH_FMV_Q_X, MASK_FMV_Q_X) +DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) +DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) +DECLARE_INSN(uret, MATCH_URET, MASK_URET) +DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) +DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) +DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) +DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA) +DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) +DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) +DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) +DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) +DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI) +DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) +DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) +DECLARE_INSN(hfence_vvma, MATCH_HFENCE_VVMA, MASK_HFENCE_VVMA) +DECLARE_INSN(hfence_gvma, MATCH_HFENCE_GVMA, MASK_HFENCE_GVMA) +DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP) +DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP) +DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR) +DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR) +DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK) +DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN) +DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD) +DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW) +DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW) +DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD) +DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW) +DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW) +DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI) +DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL) +DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI) +DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI) +DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI) +DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI) +DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI) +DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB) +DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR) +DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR) +DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND) +DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J) +DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) +DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) +DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI) +DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP) +DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP) +DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP) +DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV) +DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD) +DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP) +DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP) +DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP) +DECLARE_INSN(c_srli_rv32, MATCH_C_SRLI_RV32, MASK_C_SRLI_RV32) +DECLARE_INSN(c_srai_rv32, MATCH_C_SRAI_RV32, MASK_C_SRAI_RV32) +DECLARE_INSN(c_slli_rv32, MATCH_C_SLLI_RV32, MASK_C_SLLI_RV32) +DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD) +DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD) +DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW) +DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW) +DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) +DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) +DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) +DECLARE_INSN(c_lq, MATCH_C_LQ, MASK_C_LQ) +DECLARE_INSN(c_sq, MATCH_C_SQ, MASK_C_SQ) +DECLARE_INSN(c_lqsp, MATCH_C_LQSP, MASK_C_LQSP) +DECLARE_INSN(c_sqsp, MATCH_C_SQSP, MASK_C_SQSP) +DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0) +DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1) +DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2) +DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD) +DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1) +DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, MASK_CUSTOM0_RD_RS1_RS2) +DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1) +DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1) +DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2) +DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD) +DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1) +DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, MASK_CUSTOM1_RD_RS1_RS2) +DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2) +DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1) +DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2) +DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD) +DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1) +DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, MASK_CUSTOM2_RD_RS1_RS2) +DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3) +DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1) +DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2) +DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD) +DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1) +DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2) +DECLARE_INSN(vsetvli, MATCH_VSETVLI, MASK_VSETVLI) +DECLARE_INSN(vsetvl, MATCH_VSETVL, MASK_VSETVL) +DECLARE_INSN(vlb_v, MATCH_VLB_V, MASK_VLB_V) +DECLARE_INSN(vlh_v, MATCH_VLH_V, MASK_VLH_V) +DECLARE_INSN(vlw_v, MATCH_VLW_V, MASK_VLW_V) +DECLARE_INSN(vle_v, MATCH_VLE_V, MASK_VLE_V) +DECLARE_INSN(vlbu_v, MATCH_VLBU_V, MASK_VLBU_V) +DECLARE_INSN(vlhu_v, MATCH_VLHU_V, MASK_VLHU_V) +DECLARE_INSN(vlwu_v, MATCH_VLWU_V, MASK_VLWU_V) +DECLARE_INSN(vsb_v, MATCH_VSB_V, MASK_VSB_V) +DECLARE_INSN(vsh_v, MATCH_VSH_V, MASK_VSH_V) +DECLARE_INSN(vsw_v, MATCH_VSW_V, MASK_VSW_V) +DECLARE_INSN(vse_v, MATCH_VSE_V, MASK_VSE_V) +DECLARE_INSN(vlsb_v, MATCH_VLSB_V, MASK_VLSB_V) +DECLARE_INSN(vlsh_v, MATCH_VLSH_V, MASK_VLSH_V) +DECLARE_INSN(vlsw_v, MATCH_VLSW_V, MASK_VLSW_V) +DECLARE_INSN(vlse_v, MATCH_VLSE_V, MASK_VLSE_V) +DECLARE_INSN(vlsbu_v, MATCH_VLSBU_V, MASK_VLSBU_V) +DECLARE_INSN(vlshu_v, MATCH_VLSHU_V, MASK_VLSHU_V) +DECLARE_INSN(vlswu_v, MATCH_VLSWU_V, MASK_VLSWU_V) +DECLARE_INSN(vssb_v, MATCH_VSSB_V, MASK_VSSB_V) +DECLARE_INSN(vssh_v, MATCH_VSSH_V, MASK_VSSH_V) +DECLARE_INSN(vssw_v, MATCH_VSSW_V, MASK_VSSW_V) +DECLARE_INSN(vsse_v, MATCH_VSSE_V, MASK_VSSE_V) +DECLARE_INSN(vlxb_v, MATCH_VLXB_V, MASK_VLXB_V) +DECLARE_INSN(vlxh_v, MATCH_VLXH_V, MASK_VLXH_V) +DECLARE_INSN(vlxw_v, MATCH_VLXW_V, MASK_VLXW_V) +DECLARE_INSN(vlxe_v, MATCH_VLXE_V, MASK_VLXE_V) +DECLARE_INSN(vlxbu_v, MATCH_VLXBU_V, MASK_VLXBU_V) +DECLARE_INSN(vlxhu_v, MATCH_VLXHU_V, MASK_VLXHU_V) +DECLARE_INSN(vlxwu_v, MATCH_VLXWU_V, MASK_VLXWU_V) +DECLARE_INSN(vsxb_v, MATCH_VSXB_V, MASK_VSXB_V) +DECLARE_INSN(vsxh_v, MATCH_VSXH_V, MASK_VSXH_V) +DECLARE_INSN(vsxw_v, MATCH_VSXW_V, MASK_VSXW_V) +DECLARE_INSN(vsxe_v, MATCH_VSXE_V, MASK_VSXE_V) +DECLARE_INSN(vsuxb_v, MATCH_VSUXB_V, MASK_VSUXB_V) +DECLARE_INSN(vsuxh_v, MATCH_VSUXH_V, MASK_VSUXH_V) +DECLARE_INSN(vsuxw_v, MATCH_VSUXW_V, MASK_VSUXW_V) +DECLARE_INSN(vsuxe_v, MATCH_VSUXE_V, MASK_VSUXE_V) +DECLARE_INSN(vlbff_v, MATCH_VLBFF_V, MASK_VLBFF_V) +DECLARE_INSN(vlhff_v, MATCH_VLHFF_V, MASK_VLHFF_V) +DECLARE_INSN(vlwff_v, MATCH_VLWFF_V, MASK_VLWFF_V) +DECLARE_INSN(vleff_v, MATCH_VLEFF_V, MASK_VLEFF_V) +DECLARE_INSN(vlbuff_v, MATCH_VLBUFF_V, MASK_VLBUFF_V) +DECLARE_INSN(vlhuff_v, MATCH_VLHUFF_V, MASK_VLHUFF_V) +DECLARE_INSN(vlwuff_v, MATCH_VLWUFF_V, MASK_VLWUFF_V) +DECLARE_INSN(vl1r_v, MATCH_VL1R_V, MASK_VL1R_V) +DECLARE_INSN(vs1r_v, MATCH_VS1R_V, MASK_VS1R_V) +DECLARE_INSN(vfadd_vf, MATCH_VFADD_VF, MASK_VFADD_VF) +DECLARE_INSN(vfsub_vf, MATCH_VFSUB_VF, MASK_VFSUB_VF) +DECLARE_INSN(vfmin_vf, MATCH_VFMIN_VF, MASK_VFMIN_VF) +DECLARE_INSN(vfmax_vf, MATCH_VFMAX_VF, MASK_VFMAX_VF) +DECLARE_INSN(vfsgnj_vf, MATCH_VFSGNJ_VF, MASK_VFSGNJ_VF) +DECLARE_INSN(vfsgnjn_vf, MATCH_VFSGNJN_VF, MASK_VFSGNJN_VF) +DECLARE_INSN(vfsgnjx_vf, MATCH_VFSGNJX_VF, MASK_VFSGNJX_VF) +DECLARE_INSN(vfslide1up_vf, MATCH_VFSLIDE1UP_VF, MASK_VFSLIDE1UP_VF) +DECLARE_INSN(vfslide1down_vf, MATCH_VFSLIDE1DOWN_VF, MASK_VFSLIDE1DOWN_VF) +DECLARE_INSN(vfmv_s_f, MATCH_VFMV_S_F, MASK_VFMV_S_F) +DECLARE_INSN(vfmerge_vfm, MATCH_VFMERGE_VFM, MASK_VFMERGE_VFM) +DECLARE_INSN(vfmv_v_f, MATCH_VFMV_V_F, MASK_VFMV_V_F) +DECLARE_INSN(vmfeq_vf, MATCH_VMFEQ_VF, MASK_VMFEQ_VF) +DECLARE_INSN(vmfle_vf, MATCH_VMFLE_VF, MASK_VMFLE_VF) +DECLARE_INSN(vmflt_vf, MATCH_VMFLT_VF, MASK_VMFLT_VF) +DECLARE_INSN(vmfne_vf, MATCH_VMFNE_VF, MASK_VMFNE_VF) +DECLARE_INSN(vmfgt_vf, MATCH_VMFGT_VF, MASK_VMFGT_VF) +DECLARE_INSN(vmfge_vf, MATCH_VMFGE_VF, MASK_VMFGE_VF) +DECLARE_INSN(vfdiv_vf, MATCH_VFDIV_VF, MASK_VFDIV_VF) +DECLARE_INSN(vfrdiv_vf, MATCH_VFRDIV_VF, MASK_VFRDIV_VF) +DECLARE_INSN(vfmul_vf, MATCH_VFMUL_VF, MASK_VFMUL_VF) +DECLARE_INSN(vfrsub_vf, MATCH_VFRSUB_VF, MASK_VFRSUB_VF) +DECLARE_INSN(vfmadd_vf, MATCH_VFMADD_VF, MASK_VFMADD_VF) +DECLARE_INSN(vfnmadd_vf, MATCH_VFNMADD_VF, MASK_VFNMADD_VF) +DECLARE_INSN(vfmsub_vf, MATCH_VFMSUB_VF, MASK_VFMSUB_VF) +DECLARE_INSN(vfnmsub_vf, MATCH_VFNMSUB_VF, MASK_VFNMSUB_VF) +DECLARE_INSN(vfmacc_vf, MATCH_VFMACC_VF, MASK_VFMACC_VF) +DECLARE_INSN(vfnmacc_vf, MATCH_VFNMACC_VF, MASK_VFNMACC_VF) +DECLARE_INSN(vfmsac_vf, MATCH_VFMSAC_VF, MASK_VFMSAC_VF) +DECLARE_INSN(vfnmsac_vf, MATCH_VFNMSAC_VF, MASK_VFNMSAC_VF) +DECLARE_INSN(vfwadd_vf, MATCH_VFWADD_VF, MASK_VFWADD_VF) +DECLARE_INSN(vfwsub_vf, MATCH_VFWSUB_VF, MASK_VFWSUB_VF) +DECLARE_INSN(vfwadd_wf, MATCH_VFWADD_WF, MASK_VFWADD_WF) +DECLARE_INSN(vfwsub_wf, MATCH_VFWSUB_WF, MASK_VFWSUB_WF) +DECLARE_INSN(vfwmul_vf, MATCH_VFWMUL_VF, MASK_VFWMUL_VF) +DECLARE_INSN(vfwmacc_vf, MATCH_VFWMACC_VF, MASK_VFWMACC_VF) +DECLARE_INSN(vfwnmacc_vf, MATCH_VFWNMACC_VF, MASK_VFWNMACC_VF) +DECLARE_INSN(vfwmsac_vf, MATCH_VFWMSAC_VF, MASK_VFWMSAC_VF) +DECLARE_INSN(vfwnmsac_vf, MATCH_VFWNMSAC_VF, MASK_VFWNMSAC_VF) +DECLARE_INSN(vfadd_vv, MATCH_VFADD_VV, MASK_VFADD_VV) +DECLARE_INSN(vfredsum_vs, MATCH_VFREDSUM_VS, MASK_VFREDSUM_VS) +DECLARE_INSN(vfsub_vv, MATCH_VFSUB_VV, MASK_VFSUB_VV) +DECLARE_INSN(vfredosum_vs, MATCH_VFREDOSUM_VS, MASK_VFREDOSUM_VS) +DECLARE_INSN(vfmin_vv, MATCH_VFMIN_VV, MASK_VFMIN_VV) +DECLARE_INSN(vfredmin_vs, MATCH_VFREDMIN_VS, MASK_VFREDMIN_VS) +DECLARE_INSN(vfmax_vv, MATCH_VFMAX_VV, MASK_VFMAX_VV) +DECLARE_INSN(vfredmax_vs, MATCH_VFREDMAX_VS, MASK_VFREDMAX_VS) +DECLARE_INSN(vfsgnj_vv, MATCH_VFSGNJ_VV, MASK_VFSGNJ_VV) +DECLARE_INSN(vfsgnjn_vv, MATCH_VFSGNJN_VV, MASK_VFSGNJN_VV) +DECLARE_INSN(vfsgnjx_vv, MATCH_VFSGNJX_VV, MASK_VFSGNJX_VV) +DECLARE_INSN(vfmv_f_s, MATCH_VFMV_F_S, MASK_VFMV_F_S) +DECLARE_INSN(vmfeq_vv, MATCH_VMFEQ_VV, MASK_VMFEQ_VV) +DECLARE_INSN(vmfle_vv, MATCH_VMFLE_VV, MASK_VMFLE_VV) +DECLARE_INSN(vmflt_vv, MATCH_VMFLT_VV, MASK_VMFLT_VV) +DECLARE_INSN(vmfne_vv, MATCH_VMFNE_VV, MASK_VMFNE_VV) +DECLARE_INSN(vfdiv_vv, MATCH_VFDIV_VV, MASK_VFDIV_VV) +DECLARE_INSN(vfmul_vv, MATCH_VFMUL_VV, MASK_VFMUL_VV) +DECLARE_INSN(vfmadd_vv, MATCH_VFMADD_VV, MASK_VFMADD_VV) +DECLARE_INSN(vfnmadd_vv, MATCH_VFNMADD_VV, MASK_VFNMADD_VV) +DECLARE_INSN(vfmsub_vv, MATCH_VFMSUB_VV, MASK_VFMSUB_VV) +DECLARE_INSN(vfnmsub_vv, MATCH_VFNMSUB_VV, MASK_VFNMSUB_VV) +DECLARE_INSN(vfmacc_vv, MATCH_VFMACC_VV, MASK_VFMACC_VV) +DECLARE_INSN(vfnmacc_vv, MATCH_VFNMACC_VV, MASK_VFNMACC_VV) +DECLARE_INSN(vfmsac_vv, MATCH_VFMSAC_VV, MASK_VFMSAC_VV) +DECLARE_INSN(vfnmsac_vv, MATCH_VFNMSAC_VV, MASK_VFNMSAC_VV) +DECLARE_INSN(vfcvt_xu_f_v, MATCH_VFCVT_XU_F_V, MASK_VFCVT_XU_F_V) +DECLARE_INSN(vfcvt_x_f_v, MATCH_VFCVT_X_F_V, MASK_VFCVT_X_F_V) +DECLARE_INSN(vfcvt_f_xu_v, MATCH_VFCVT_F_XU_V, MASK_VFCVT_F_XU_V) +DECLARE_INSN(vfcvt_f_x_v, MATCH_VFCVT_F_X_V, MASK_VFCVT_F_X_V) +DECLARE_INSN(vfcvt_rtz_xu_f_v, MATCH_VFCVT_RTZ_XU_F_V, MASK_VFCVT_RTZ_XU_F_V) +DECLARE_INSN(vfcvt_rtz_x_f_v, MATCH_VFCVT_RTZ_X_F_V, MASK_VFCVT_RTZ_X_F_V) +DECLARE_INSN(vfwcvt_xu_f_v, MATCH_VFWCVT_XU_F_V, MASK_VFWCVT_XU_F_V) +DECLARE_INSN(vfwcvt_x_f_v, MATCH_VFWCVT_X_F_V, MASK_VFWCVT_X_F_V) +DECLARE_INSN(vfwcvt_f_xu_v, MATCH_VFWCVT_F_XU_V, MASK_VFWCVT_F_XU_V) +DECLARE_INSN(vfwcvt_f_x_v, MATCH_VFWCVT_F_X_V, MASK_VFWCVT_F_X_V) +DECLARE_INSN(vfwcvt_f_f_v, MATCH_VFWCVT_F_F_V, MASK_VFWCVT_F_F_V) +DECLARE_INSN(vfwcvt_rtz_xu_f_v, MATCH_VFWCVT_RTZ_XU_F_V, MASK_VFWCVT_RTZ_XU_F_V) +DECLARE_INSN(vfwcvt_rtz_x_f_v, MATCH_VFWCVT_RTZ_X_F_V, MASK_VFWCVT_RTZ_X_F_V) +DECLARE_INSN(vfncvt_xu_f_w, MATCH_VFNCVT_XU_F_W, MASK_VFNCVT_XU_F_W) +DECLARE_INSN(vfncvt_x_f_w, MATCH_VFNCVT_X_F_W, MASK_VFNCVT_X_F_W) +DECLARE_INSN(vfncvt_f_xu_w, MATCH_VFNCVT_F_XU_W, MASK_VFNCVT_F_XU_W) +DECLARE_INSN(vfncvt_f_x_w, MATCH_VFNCVT_F_X_W, MASK_VFNCVT_F_X_W) +DECLARE_INSN(vfncvt_f_f_w, MATCH_VFNCVT_F_F_W, MASK_VFNCVT_F_F_W) +DECLARE_INSN(vfncvt_rod_f_f_w, MATCH_VFNCVT_ROD_F_F_W, MASK_VFNCVT_ROD_F_F_W) +DECLARE_INSN(vfncvt_rtz_xu_f_w, MATCH_VFNCVT_RTZ_XU_F_W, MASK_VFNCVT_RTZ_XU_F_W) +DECLARE_INSN(vfncvt_rtz_x_f_w, MATCH_VFNCVT_RTZ_X_F_W, MASK_VFNCVT_RTZ_X_F_W) +DECLARE_INSN(vfsqrt_v, MATCH_VFSQRT_V, MASK_VFSQRT_V) +DECLARE_INSN(vfclass_v, MATCH_VFCLASS_V, MASK_VFCLASS_V) +DECLARE_INSN(vfwadd_vv, MATCH_VFWADD_VV, MASK_VFWADD_VV) +DECLARE_INSN(vfwredsum_vs, MATCH_VFWREDSUM_VS, MASK_VFWREDSUM_VS) +DECLARE_INSN(vfwsub_vv, MATCH_VFWSUB_VV, MASK_VFWSUB_VV) +DECLARE_INSN(vfwredosum_vs, MATCH_VFWREDOSUM_VS, MASK_VFWREDOSUM_VS) +DECLARE_INSN(vfwadd_wv, MATCH_VFWADD_WV, MASK_VFWADD_WV) +DECLARE_INSN(vfwsub_wv, MATCH_VFWSUB_WV, MASK_VFWSUB_WV) +DECLARE_INSN(vfwmul_vv, MATCH_VFWMUL_VV, MASK_VFWMUL_VV) +DECLARE_INSN(vfdot_vv, MATCH_VFDOT_VV, MASK_VFDOT_VV) +DECLARE_INSN(vfwmacc_vv, MATCH_VFWMACC_VV, MASK_VFWMACC_VV) +DECLARE_INSN(vfwnmacc_vv, MATCH_VFWNMACC_VV, MASK_VFWNMACC_VV) +DECLARE_INSN(vfwmsac_vv, MATCH_VFWMSAC_VV, MASK_VFWMSAC_VV) +DECLARE_INSN(vfwnmsac_vv, MATCH_VFWNMSAC_VV, MASK_VFWNMSAC_VV) +DECLARE_INSN(vadd_vx, MATCH_VADD_VX, MASK_VADD_VX) +DECLARE_INSN(vsub_vx, MATCH_VSUB_VX, MASK_VSUB_VX) +DECLARE_INSN(vrsub_vx, MATCH_VRSUB_VX, MASK_VRSUB_VX) +DECLARE_INSN(vminu_vx, MATCH_VMINU_VX, MASK_VMINU_VX) +DECLARE_INSN(vmin_vx, MATCH_VMIN_VX, MASK_VMIN_VX) +DECLARE_INSN(vmaxu_vx, MATCH_VMAXU_VX, MASK_VMAXU_VX) +DECLARE_INSN(vmax_vx, MATCH_VMAX_VX, MASK_VMAX_VX) +DECLARE_INSN(vand_vx, MATCH_VAND_VX, MASK_VAND_VX) +DECLARE_INSN(vor_vx, MATCH_VOR_VX, MASK_VOR_VX) +DECLARE_INSN(vxor_vx, MATCH_VXOR_VX, MASK_VXOR_VX) +DECLARE_INSN(vrgather_vx, MATCH_VRGATHER_VX, MASK_VRGATHER_VX) +DECLARE_INSN(vslideup_vx, MATCH_VSLIDEUP_VX, MASK_VSLIDEUP_VX) +DECLARE_INSN(vslidedown_vx, MATCH_VSLIDEDOWN_VX, MASK_VSLIDEDOWN_VX) +DECLARE_INSN(vadc_vxm, MATCH_VADC_VXM, MASK_VADC_VXM) +DECLARE_INSN(vmadc_vxm, MATCH_VMADC_VXM, MASK_VMADC_VXM) +DECLARE_INSN(vsbc_vxm, MATCH_VSBC_VXM, MASK_VSBC_VXM) +DECLARE_INSN(vmsbc_vxm, MATCH_VMSBC_VXM, MASK_VMSBC_VXM) +DECLARE_INSN(vmerge_vxm, MATCH_VMERGE_VXM, MASK_VMERGE_VXM) +DECLARE_INSN(vmv_v_x, MATCH_VMV_V_X, MASK_VMV_V_X) +DECLARE_INSN(vmseq_vx, MATCH_VMSEQ_VX, MASK_VMSEQ_VX) +DECLARE_INSN(vmsne_vx, MATCH_VMSNE_VX, MASK_VMSNE_VX) +DECLARE_INSN(vmsltu_vx, MATCH_VMSLTU_VX, MASK_VMSLTU_VX) +DECLARE_INSN(vmslt_vx, MATCH_VMSLT_VX, MASK_VMSLT_VX) +DECLARE_INSN(vmsleu_vx, MATCH_VMSLEU_VX, MASK_VMSLEU_VX) +DECLARE_INSN(vmsle_vx, MATCH_VMSLE_VX, MASK_VMSLE_VX) +DECLARE_INSN(vmsgtu_vx, MATCH_VMSGTU_VX, MASK_VMSGTU_VX) +DECLARE_INSN(vmsgt_vx, MATCH_VMSGT_VX, MASK_VMSGT_VX) +DECLARE_INSN(vsaddu_vx, MATCH_VSADDU_VX, MASK_VSADDU_VX) +DECLARE_INSN(vsadd_vx, MATCH_VSADD_VX, MASK_VSADD_VX) +DECLARE_INSN(vssubu_vx, MATCH_VSSUBU_VX, MASK_VSSUBU_VX) +DECLARE_INSN(vssub_vx, MATCH_VSSUB_VX, MASK_VSSUB_VX) +DECLARE_INSN(vsll_vx, MATCH_VSLL_VX, MASK_VSLL_VX) +DECLARE_INSN(vsmul_vx, MATCH_VSMUL_VX, MASK_VSMUL_VX) +DECLARE_INSN(vsrl_vx, MATCH_VSRL_VX, MASK_VSRL_VX) +DECLARE_INSN(vsra_vx, MATCH_VSRA_VX, MASK_VSRA_VX) +DECLARE_INSN(vssrl_vx, MATCH_VSSRL_VX, MASK_VSSRL_VX) +DECLARE_INSN(vssra_vx, MATCH_VSSRA_VX, MASK_VSSRA_VX) +DECLARE_INSN(vnsrl_wx, MATCH_VNSRL_WX, MASK_VNSRL_WX) +DECLARE_INSN(vnsra_wx, MATCH_VNSRA_WX, MASK_VNSRA_WX) +DECLARE_INSN(vnclipu_wx, MATCH_VNCLIPU_WX, MASK_VNCLIPU_WX) +DECLARE_INSN(vnclip_wx, MATCH_VNCLIP_WX, MASK_VNCLIP_WX) +DECLARE_INSN(vqmaccu_vx, MATCH_VQMACCU_VX, MASK_VQMACCU_VX) +DECLARE_INSN(vqmacc_vx, MATCH_VQMACC_VX, MASK_VQMACC_VX) +DECLARE_INSN(vqmaccus_vx, MATCH_VQMACCUS_VX, MASK_VQMACCUS_VX) +DECLARE_INSN(vqmaccsu_vx, MATCH_VQMACCSU_VX, MASK_VQMACCSU_VX) +DECLARE_INSN(vadd_vv, MATCH_VADD_VV, MASK_VADD_VV) +DECLARE_INSN(vsub_vv, MATCH_VSUB_VV, MASK_VSUB_VV) +DECLARE_INSN(vminu_vv, MATCH_VMINU_VV, MASK_VMINU_VV) +DECLARE_INSN(vmin_vv, MATCH_VMIN_VV, MASK_VMIN_VV) +DECLARE_INSN(vmaxu_vv, MATCH_VMAXU_VV, MASK_VMAXU_VV) +DECLARE_INSN(vmax_vv, MATCH_VMAX_VV, MASK_VMAX_VV) +DECLARE_INSN(vand_vv, MATCH_VAND_VV, MASK_VAND_VV) +DECLARE_INSN(vor_vv, MATCH_VOR_VV, MASK_VOR_VV) +DECLARE_INSN(vxor_vv, MATCH_VXOR_VV, MASK_VXOR_VV) +DECLARE_INSN(vrgather_vv, MATCH_VRGATHER_VV, MASK_VRGATHER_VV) +DECLARE_INSN(vadc_vvm, MATCH_VADC_VVM, MASK_VADC_VVM) +DECLARE_INSN(vmadc_vvm, MATCH_VMADC_VVM, MASK_VMADC_VVM) +DECLARE_INSN(vsbc_vvm, MATCH_VSBC_VVM, MASK_VSBC_VVM) +DECLARE_INSN(vmsbc_vvm, MATCH_VMSBC_VVM, MASK_VMSBC_VVM) +DECLARE_INSN(vmerge_vvm, MATCH_VMERGE_VVM, MASK_VMERGE_VVM) +DECLARE_INSN(vmv_v_v, MATCH_VMV_V_V, MASK_VMV_V_V) +DECLARE_INSN(vmseq_vv, MATCH_VMSEQ_VV, MASK_VMSEQ_VV) +DECLARE_INSN(vmsne_vv, MATCH_VMSNE_VV, MASK_VMSNE_VV) +DECLARE_INSN(vmsltu_vv, MATCH_VMSLTU_VV, MASK_VMSLTU_VV) +DECLARE_INSN(vmslt_vv, MATCH_VMSLT_VV, MASK_VMSLT_VV) +DECLARE_INSN(vmsleu_vv, MATCH_VMSLEU_VV, MASK_VMSLEU_VV) +DECLARE_INSN(vmsle_vv, MATCH_VMSLE_VV, MASK_VMSLE_VV) +DECLARE_INSN(vsaddu_vv, MATCH_VSADDU_VV, MASK_VSADDU_VV) +DECLARE_INSN(vsadd_vv, MATCH_VSADD_VV, MASK_VSADD_VV) +DECLARE_INSN(vssubu_vv, MATCH_VSSUBU_VV, MASK_VSSUBU_VV) +DECLARE_INSN(vssub_vv, MATCH_VSSUB_VV, MASK_VSSUB_VV) +DECLARE_INSN(vsll_vv, MATCH_VSLL_VV, MASK_VSLL_VV) +DECLARE_INSN(vsmul_vv, MATCH_VSMUL_VV, MASK_VSMUL_VV) +DECLARE_INSN(vsrl_vv, MATCH_VSRL_VV, MASK_VSRL_VV) +DECLARE_INSN(vsra_vv, MATCH_VSRA_VV, MASK_VSRA_VV) +DECLARE_INSN(vssrl_vv, MATCH_VSSRL_VV, MASK_VSSRL_VV) +DECLARE_INSN(vssra_vv, MATCH_VSSRA_VV, MASK_VSSRA_VV) +DECLARE_INSN(vnsrl_wv, MATCH_VNSRL_WV, MASK_VNSRL_WV) +DECLARE_INSN(vnsra_wv, MATCH_VNSRA_WV, MASK_VNSRA_WV) +DECLARE_INSN(vnclipu_wv, MATCH_VNCLIPU_WV, MASK_VNCLIPU_WV) +DECLARE_INSN(vnclip_wv, MATCH_VNCLIP_WV, MASK_VNCLIP_WV) +DECLARE_INSN(vwredsumu_vs, MATCH_VWREDSUMU_VS, MASK_VWREDSUMU_VS) +DECLARE_INSN(vwredsum_vs, MATCH_VWREDSUM_VS, MASK_VWREDSUM_VS) +DECLARE_INSN(vdotu_vv, MATCH_VDOTU_VV, MASK_VDOTU_VV) +DECLARE_INSN(vdot_vv, MATCH_VDOT_VV, MASK_VDOT_VV) +DECLARE_INSN(vqmaccu_vv, MATCH_VQMACCU_VV, MASK_VQMACCU_VV) +DECLARE_INSN(vqmacc_vv, MATCH_VQMACC_VV, MASK_VQMACC_VV) +DECLARE_INSN(vqmaccsu_vv, MATCH_VQMACCSU_VV, MASK_VQMACCSU_VV) +DECLARE_INSN(vadd_vi, MATCH_VADD_VI, MASK_VADD_VI) +DECLARE_INSN(vrsub_vi, MATCH_VRSUB_VI, MASK_VRSUB_VI) +DECLARE_INSN(vand_vi, MATCH_VAND_VI, MASK_VAND_VI) +DECLARE_INSN(vor_vi, MATCH_VOR_VI, MASK_VOR_VI) +DECLARE_INSN(vxor_vi, MATCH_VXOR_VI, MASK_VXOR_VI) +DECLARE_INSN(vrgather_vi, MATCH_VRGATHER_VI, MASK_VRGATHER_VI) +DECLARE_INSN(vslideup_vi, MATCH_VSLIDEUP_VI, MASK_VSLIDEUP_VI) +DECLARE_INSN(vslidedown_vi, MATCH_VSLIDEDOWN_VI, MASK_VSLIDEDOWN_VI) +DECLARE_INSN(vadc_vim, MATCH_VADC_VIM, MASK_VADC_VIM) +DECLARE_INSN(vmadc_vim, MATCH_VMADC_VIM, MASK_VMADC_VIM) +DECLARE_INSN(vmerge_vim, MATCH_VMERGE_VIM, MASK_VMERGE_VIM) +DECLARE_INSN(vmv_v_i, MATCH_VMV_V_I, MASK_VMV_V_I) +DECLARE_INSN(vmseq_vi, MATCH_VMSEQ_VI, MASK_VMSEQ_VI) +DECLARE_INSN(vmsne_vi, MATCH_VMSNE_VI, MASK_VMSNE_VI) +DECLARE_INSN(vmsleu_vi, MATCH_VMSLEU_VI, MASK_VMSLEU_VI) +DECLARE_INSN(vmsle_vi, MATCH_VMSLE_VI, MASK_VMSLE_VI) +DECLARE_INSN(vmsgtu_vi, MATCH_VMSGTU_VI, MASK_VMSGTU_VI) +DECLARE_INSN(vmsgt_vi, MATCH_VMSGT_VI, MASK_VMSGT_VI) +DECLARE_INSN(vsaddu_vi, MATCH_VSADDU_VI, MASK_VSADDU_VI) +DECLARE_INSN(vsadd_vi, MATCH_VSADD_VI, MASK_VSADD_VI) +DECLARE_INSN(vsll_vi, MATCH_VSLL_VI, MASK_VSLL_VI) +DECLARE_INSN(vmv1r_v, MATCH_VMV1R_V, MASK_VMV1R_V) +DECLARE_INSN(vmv2r_v, MATCH_VMV2R_V, MASK_VMV2R_V) +DECLARE_INSN(vmv4r_v, MATCH_VMV4R_V, MASK_VMV4R_V) +DECLARE_INSN(vmv8r_v, MATCH_VMV8R_V, MASK_VMV8R_V) +DECLARE_INSN(vsrl_vi, MATCH_VSRL_VI, MASK_VSRL_VI) +DECLARE_INSN(vsra_vi, MATCH_VSRA_VI, MASK_VSRA_VI) +DECLARE_INSN(vssrl_vi, MATCH_VSSRL_VI, MASK_VSSRL_VI) +DECLARE_INSN(vssra_vi, MATCH_VSSRA_VI, MASK_VSSRA_VI) +DECLARE_INSN(vnsrl_wi, MATCH_VNSRL_WI, MASK_VNSRL_WI) +DECLARE_INSN(vnsra_wi, MATCH_VNSRA_WI, MASK_VNSRA_WI) +DECLARE_INSN(vnclipu_wi, MATCH_VNCLIPU_WI, MASK_VNCLIPU_WI) +DECLARE_INSN(vnclip_wi, MATCH_VNCLIP_WI, MASK_VNCLIP_WI) +DECLARE_INSN(vredsum_vs, MATCH_VREDSUM_VS, MASK_VREDSUM_VS) +DECLARE_INSN(vredand_vs, MATCH_VREDAND_VS, MASK_VREDAND_VS) +DECLARE_INSN(vredor_vs, MATCH_VREDOR_VS, MASK_VREDOR_VS) +DECLARE_INSN(vredxor_vs, MATCH_VREDXOR_VS, MASK_VREDXOR_VS) +DECLARE_INSN(vredminu_vs, MATCH_VREDMINU_VS, MASK_VREDMINU_VS) +DECLARE_INSN(vredmin_vs, MATCH_VREDMIN_VS, MASK_VREDMIN_VS) +DECLARE_INSN(vredmaxu_vs, MATCH_VREDMAXU_VS, MASK_VREDMAXU_VS) +DECLARE_INSN(vredmax_vs, MATCH_VREDMAX_VS, MASK_VREDMAX_VS) +DECLARE_INSN(vaaddu_vv, MATCH_VAADDU_VV, MASK_VAADDU_VV) +DECLARE_INSN(vaadd_vv, MATCH_VAADD_VV, MASK_VAADD_VV) +DECLARE_INSN(vasubu_vv, MATCH_VASUBU_VV, MASK_VASUBU_VV) +DECLARE_INSN(vasub_vv, MATCH_VASUB_VV, MASK_VASUB_VV) +DECLARE_INSN(vmv_x_s, MATCH_VMV_X_S, MASK_VMV_X_S) +DECLARE_INSN(vcompress_vm, MATCH_VCOMPRESS_VM, MASK_VCOMPRESS_VM) +DECLARE_INSN(vmandnot_mm, MATCH_VMANDNOT_MM, MASK_VMANDNOT_MM) +DECLARE_INSN(vmand_mm, MATCH_VMAND_MM, MASK_VMAND_MM) +DECLARE_INSN(vmor_mm, MATCH_VMOR_MM, MASK_VMOR_MM) +DECLARE_INSN(vmxor_mm, MATCH_VMXOR_MM, MASK_VMXOR_MM) +DECLARE_INSN(vmornot_mm, MATCH_VMORNOT_MM, MASK_VMORNOT_MM) +DECLARE_INSN(vmnand_mm, MATCH_VMNAND_MM, MASK_VMNAND_MM) +DECLARE_INSN(vmnor_mm, MATCH_VMNOR_MM, MASK_VMNOR_MM) +DECLARE_INSN(vmxnor_mm, MATCH_VMXNOR_MM, MASK_VMXNOR_MM) +DECLARE_INSN(vmsbf_m, MATCH_VMSBF_M, MASK_VMSBF_M) +DECLARE_INSN(vmsof_m, MATCH_VMSOF_M, MASK_VMSOF_M) +DECLARE_INSN(vmsif_m, MATCH_VMSIF_M, MASK_VMSIF_M) +DECLARE_INSN(viota_m, MATCH_VIOTA_M, MASK_VIOTA_M) +DECLARE_INSN(vid_v, MATCH_VID_V, MASK_VID_V) +DECLARE_INSN(vpopc_m, MATCH_VPOPC_M, MASK_VPOPC_M) +DECLARE_INSN(vfirst_m, MATCH_VFIRST_M, MASK_VFIRST_M) +DECLARE_INSN(vdivu_vv, MATCH_VDIVU_VV, MASK_VDIVU_VV) +DECLARE_INSN(vdiv_vv, MATCH_VDIV_VV, MASK_VDIV_VV) +DECLARE_INSN(vremu_vv, MATCH_VREMU_VV, MASK_VREMU_VV) +DECLARE_INSN(vrem_vv, MATCH_VREM_VV, MASK_VREM_VV) +DECLARE_INSN(vmulhu_vv, MATCH_VMULHU_VV, MASK_VMULHU_VV) +DECLARE_INSN(vmul_vv, MATCH_VMUL_VV, MASK_VMUL_VV) +DECLARE_INSN(vmulhsu_vv, MATCH_VMULHSU_VV, MASK_VMULHSU_VV) +DECLARE_INSN(vmulh_vv, MATCH_VMULH_VV, MASK_VMULH_VV) +DECLARE_INSN(vmadd_vv, MATCH_VMADD_VV, MASK_VMADD_VV) +DECLARE_INSN(vnmsub_vv, MATCH_VNMSUB_VV, MASK_VNMSUB_VV) +DECLARE_INSN(vmacc_vv, MATCH_VMACC_VV, MASK_VMACC_VV) +DECLARE_INSN(vnmsac_vv, MATCH_VNMSAC_VV, MASK_VNMSAC_VV) +DECLARE_INSN(vwaddu_vv, MATCH_VWADDU_VV, MASK_VWADDU_VV) +DECLARE_INSN(vwadd_vv, MATCH_VWADD_VV, MASK_VWADD_VV) +DECLARE_INSN(vwsubu_vv, MATCH_VWSUBU_VV, MASK_VWSUBU_VV) +DECLARE_INSN(vwsub_vv, MATCH_VWSUB_VV, MASK_VWSUB_VV) +DECLARE_INSN(vwaddu_wv, MATCH_VWADDU_WV, MASK_VWADDU_WV) +DECLARE_INSN(vwadd_wv, MATCH_VWADD_WV, MASK_VWADD_WV) +DECLARE_INSN(vwsubu_wv, MATCH_VWSUBU_WV, MASK_VWSUBU_WV) +DECLARE_INSN(vwsub_wv, MATCH_VWSUB_WV, MASK_VWSUB_WV) +DECLARE_INSN(vwmulu_vv, MATCH_VWMULU_VV, MASK_VWMULU_VV) +DECLARE_INSN(vwmulsu_vv, MATCH_VWMULSU_VV, MASK_VWMULSU_VV) +DECLARE_INSN(vwmul_vv, MATCH_VWMUL_VV, MASK_VWMUL_VV) +DECLARE_INSN(vwmaccu_vv, MATCH_VWMACCU_VV, MASK_VWMACCU_VV) +DECLARE_INSN(vwmacc_vv, MATCH_VWMACC_VV, MASK_VWMACC_VV) +DECLARE_INSN(vwmaccsu_vv, MATCH_VWMACCSU_VV, MASK_VWMACCSU_VV) +DECLARE_INSN(vaaddu_vx, MATCH_VAADDU_VX, MASK_VAADDU_VX) +DECLARE_INSN(vaadd_vx, MATCH_VAADD_VX, MASK_VAADD_VX) +DECLARE_INSN(vasubu_vx, MATCH_VASUBU_VX, MASK_VASUBU_VX) +DECLARE_INSN(vasub_vx, MATCH_VASUB_VX, MASK_VASUB_VX) +DECLARE_INSN(vmv_s_x, MATCH_VMV_S_X, MASK_VMV_S_X) +DECLARE_INSN(vslide1up_vx, MATCH_VSLIDE1UP_VX, MASK_VSLIDE1UP_VX) +DECLARE_INSN(vslide1down_vx, MATCH_VSLIDE1DOWN_VX, MASK_VSLIDE1DOWN_VX) +DECLARE_INSN(vdivu_vx, MATCH_VDIVU_VX, MASK_VDIVU_VX) +DECLARE_INSN(vdiv_vx, MATCH_VDIV_VX, MASK_VDIV_VX) +DECLARE_INSN(vremu_vx, MATCH_VREMU_VX, MASK_VREMU_VX) +DECLARE_INSN(vrem_vx, MATCH_VREM_VX, MASK_VREM_VX) +DECLARE_INSN(vmulhu_vx, MATCH_VMULHU_VX, MASK_VMULHU_VX) +DECLARE_INSN(vmul_vx, MATCH_VMUL_VX, MASK_VMUL_VX) +DECLARE_INSN(vmulhsu_vx, MATCH_VMULHSU_VX, MASK_VMULHSU_VX) +DECLARE_INSN(vmulh_vx, MATCH_VMULH_VX, MASK_VMULH_VX) +DECLARE_INSN(vmadd_vx, MATCH_VMADD_VX, MASK_VMADD_VX) +DECLARE_INSN(vnmsub_vx, MATCH_VNMSUB_VX, MASK_VNMSUB_VX) +DECLARE_INSN(vmacc_vx, MATCH_VMACC_VX, MASK_VMACC_VX) +DECLARE_INSN(vnmsac_vx, MATCH_VNMSAC_VX, MASK_VNMSAC_VX) +DECLARE_INSN(vwaddu_vx, MATCH_VWADDU_VX, MASK_VWADDU_VX) +DECLARE_INSN(vwadd_vx, MATCH_VWADD_VX, MASK_VWADD_VX) +DECLARE_INSN(vwsubu_vx, MATCH_VWSUBU_VX, MASK_VWSUBU_VX) +DECLARE_INSN(vwsub_vx, MATCH_VWSUB_VX, MASK_VWSUB_VX) +DECLARE_INSN(vwaddu_wx, MATCH_VWADDU_WX, MASK_VWADDU_WX) +DECLARE_INSN(vwadd_wx, MATCH_VWADD_WX, MASK_VWADD_WX) +DECLARE_INSN(vwsubu_wx, MATCH_VWSUBU_WX, MASK_VWSUBU_WX) +DECLARE_INSN(vwsub_wx, MATCH_VWSUB_WX, MASK_VWSUB_WX) +DECLARE_INSN(vwmulu_vx, MATCH_VWMULU_VX, MASK_VWMULU_VX) +DECLARE_INSN(vwmulsu_vx, MATCH_VWMULSU_VX, MASK_VWMULSU_VX) +DECLARE_INSN(vwmul_vx, MATCH_VWMUL_VX, MASK_VWMUL_VX) +DECLARE_INSN(vwmaccu_vx, MATCH_VWMACCU_VX, MASK_VWMACCU_VX) +DECLARE_INSN(vwmacc_vx, MATCH_VWMACC_VX, MASK_VWMACC_VX) +DECLARE_INSN(vwmaccus_vx, MATCH_VWMACCUS_VX, MASK_VWMACCUS_VX) +DECLARE_INSN(vwmaccsu_vx, MATCH_VWMACCSU_VX, MASK_VWMACCSU_VX) +DECLARE_INSN(vamoswapw_v, MATCH_VAMOSWAPW_V, MASK_VAMOSWAPW_V) +DECLARE_INSN(vamoaddw_v, MATCH_VAMOADDW_V, MASK_VAMOADDW_V) +DECLARE_INSN(vamoxorw_v, MATCH_VAMOXORW_V, MASK_VAMOXORW_V) +DECLARE_INSN(vamoandw_v, MATCH_VAMOANDW_V, MASK_VAMOANDW_V) +DECLARE_INSN(vamoorw_v, MATCH_VAMOORW_V, MASK_VAMOORW_V) +DECLARE_INSN(vamominw_v, MATCH_VAMOMINW_V, MASK_VAMOMINW_V) +DECLARE_INSN(vamomaxw_v, MATCH_VAMOMAXW_V, MASK_VAMOMAXW_V) +DECLARE_INSN(vamominuw_v, MATCH_VAMOMINUW_V, MASK_VAMOMINUW_V) +DECLARE_INSN(vamomaxuw_v, MATCH_VAMOMAXUW_V, MASK_VAMOMAXUW_V) +DECLARE_INSN(vamoswape_v, MATCH_VAMOSWAPE_V, MASK_VAMOSWAPE_V) +DECLARE_INSN(vamoadde_v, MATCH_VAMOADDE_V, MASK_VAMOADDE_V) +DECLARE_INSN(vamoxore_v, MATCH_VAMOXORE_V, MASK_VAMOXORE_V) +DECLARE_INSN(vamoande_v, MATCH_VAMOANDE_V, MASK_VAMOANDE_V) +DECLARE_INSN(vamoore_v, MATCH_VAMOORE_V, MASK_VAMOORE_V) +DECLARE_INSN(vamomine_v, MATCH_VAMOMINE_V, MASK_VAMOMINE_V) +DECLARE_INSN(vamomaxe_v, MATCH_VAMOMAXE_V, MASK_VAMOMAXE_V) +DECLARE_INSN(vamominue_v, MATCH_VAMOMINUE_V, MASK_VAMOMINUE_V) +DECLARE_INSN(vamomaxue_v, MATCH_VAMOMAXUE_V, MASK_VAMOMAXUE_V) +DECLARE_INSN(vmvnfr_v, MATCH_VMVNFR_V, MASK_VMVNFR_V) +#endif +#ifdef DECLARE_CSR +DECLARE_CSR(fflags, CSR_FFLAGS) +DECLARE_CSR(frm, CSR_FRM) +DECLARE_CSR(fcsr, CSR_FCSR) +DECLARE_CSR(ustatus, CSR_USTATUS) +DECLARE_CSR(uie, CSR_UIE) +DECLARE_CSR(utvec, CSR_UTVEC) +DECLARE_CSR(vstart, CSR_VSTART) +DECLARE_CSR(vxsat, CSR_VXSAT) +DECLARE_CSR(vxrm, CSR_VXRM) +DECLARE_CSR(vcsr, CSR_VCSR) +DECLARE_CSR(uscratch, CSR_USCRATCH) +DECLARE_CSR(uepc, CSR_UEPC) +DECLARE_CSR(ucause, CSR_UCAUSE) +DECLARE_CSR(utval, CSR_UTVAL) +DECLARE_CSR(uip, CSR_UIP) +DECLARE_CSR(cycle, CSR_CYCLE) +DECLARE_CSR(time, CSR_TIME) +DECLARE_CSR(instret, CSR_INSTRET) +DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3) +DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4) +DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5) +DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6) +DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7) +DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8) +DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9) +DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10) +DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11) +DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12) +DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13) +DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14) +DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15) +DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16) +DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17) +DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18) +DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19) +DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20) +DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21) +DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22) +DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23) +DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24) +DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25) +DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26) +DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27) +DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28) +DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29) +DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30) +DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31) +DECLARE_CSR(vl, CSR_VL) +DECLARE_CSR(vtype, CSR_VTYPE) +DECLARE_CSR(vlenb, CSR_VLENB) +DECLARE_CSR(sstatus, CSR_SSTATUS) +DECLARE_CSR(sedeleg, CSR_SEDELEG) +DECLARE_CSR(sideleg, CSR_SIDELEG) +DECLARE_CSR(sie, CSR_SIE) +DECLARE_CSR(stvec, CSR_STVEC) +DECLARE_CSR(scounteren, CSR_SCOUNTEREN) +DECLARE_CSR(sscratch, CSR_SSCRATCH) +DECLARE_CSR(sepc, CSR_SEPC) +DECLARE_CSR(scause, CSR_SCAUSE) +DECLARE_CSR(stval, CSR_STVAL) +DECLARE_CSR(sip, CSR_SIP) +DECLARE_CSR(satp, CSR_SATP) +DECLARE_CSR(vsstatus, CSR_VSSTATUS) +DECLARE_CSR(vsie, CSR_VSIE) +DECLARE_CSR(vstvec, CSR_VSTVEC) +DECLARE_CSR(vsscratch, CSR_VSSCRATCH) +DECLARE_CSR(vsepc, CSR_VSEPC) +DECLARE_CSR(vscause, CSR_VSCAUSE) +DECLARE_CSR(vstval, CSR_VSTVAL) +DECLARE_CSR(vsip, CSR_VSIP) +DECLARE_CSR(vsatp, CSR_VSATP) +DECLARE_CSR(hstatus, CSR_HSTATUS) +DECLARE_CSR(hedeleg, CSR_HEDELEG) +DECLARE_CSR(hideleg, CSR_HIDELEG) +DECLARE_CSR(hie, CSR_HIE) +DECLARE_CSR(htimedelta, CSR_HTIMEDELTA) +DECLARE_CSR(hcounteren, CSR_HCOUNTEREN) +DECLARE_CSR(hgeie, CSR_HGEIE) +DECLARE_CSR(htval, CSR_HTVAL) +DECLARE_CSR(hip, CSR_HIP) +DECLARE_CSR(hvip, CSR_HVIP) +DECLARE_CSR(htinst, CSR_HTINST) +DECLARE_CSR(hgatp, CSR_HGATP) +DECLARE_CSR(hgeip, CSR_HGEIP) +DECLARE_CSR(utvt, CSR_UTVT) +DECLARE_CSR(unxti, CSR_UNXTI) +DECLARE_CSR(uintstatus, CSR_UINTSTATUS) +DECLARE_CSR(uscratchcsw, CSR_USCRATCHCSW) +DECLARE_CSR(uscratchcswl, CSR_USCRATCHCSWL) +DECLARE_CSR(stvt, CSR_STVT) +DECLARE_CSR(snxti, CSR_SNXTI) +DECLARE_CSR(sintstatus, CSR_SINTSTATUS) +DECLARE_CSR(sscratchcsw, CSR_SSCRATCHCSW) +DECLARE_CSR(sscratchcswl, CSR_SSCRATCHCSWL) +DECLARE_CSR(mtvt, CSR_MTVT) +DECLARE_CSR(mnxti, CSR_MNXTI) +DECLARE_CSR(mintstatus, CSR_MINTSTATUS) +DECLARE_CSR(mscratchcsw, CSR_MSCRATCHCSW) +DECLARE_CSR(mscratchcswl, CSR_MSCRATCHCSWL) +DECLARE_CSR(mstatus, CSR_MSTATUS) +DECLARE_CSR(misa, CSR_MISA) +DECLARE_CSR(medeleg, CSR_MEDELEG) +DECLARE_CSR(mideleg, CSR_MIDELEG) +DECLARE_CSR(mie, CSR_MIE) +DECLARE_CSR(mtvec, CSR_MTVEC) +DECLARE_CSR(mcounteren, CSR_MCOUNTEREN) +DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT) +DECLARE_CSR(mscratch, CSR_MSCRATCH) +DECLARE_CSR(mepc, CSR_MEPC) +DECLARE_CSR(mcause, CSR_MCAUSE) +DECLARE_CSR(mtval, CSR_MTVAL) +DECLARE_CSR(mip, CSR_MIP) +DECLARE_CSR(mtinst, CSR_MTINST) +DECLARE_CSR(mtval2, CSR_MTVAL2) +DECLARE_CSR(pmpcfg0, CSR_PMPCFG0) +DECLARE_CSR(pmpcfg1, CSR_PMPCFG1) +DECLARE_CSR(pmpcfg2, CSR_PMPCFG2) +DECLARE_CSR(pmpcfg3, CSR_PMPCFG3) +DECLARE_CSR(pmpaddr0, CSR_PMPADDR0) +DECLARE_CSR(pmpaddr1, CSR_PMPADDR1) +DECLARE_CSR(pmpaddr2, CSR_PMPADDR2) +DECLARE_CSR(pmpaddr3, CSR_PMPADDR3) +DECLARE_CSR(pmpaddr4, CSR_PMPADDR4) +DECLARE_CSR(pmpaddr5, CSR_PMPADDR5) +DECLARE_CSR(pmpaddr6, CSR_PMPADDR6) +DECLARE_CSR(pmpaddr7, CSR_PMPADDR7) +DECLARE_CSR(pmpaddr8, CSR_PMPADDR8) +DECLARE_CSR(pmpaddr9, CSR_PMPADDR9) +DECLARE_CSR(pmpaddr10, CSR_PMPADDR10) +DECLARE_CSR(pmpaddr11, CSR_PMPADDR11) +DECLARE_CSR(pmpaddr12, CSR_PMPADDR12) +DECLARE_CSR(pmpaddr13, CSR_PMPADDR13) +DECLARE_CSR(pmpaddr14, CSR_PMPADDR14) +DECLARE_CSR(pmpaddr15, CSR_PMPADDR15) +DECLARE_CSR(tselect, CSR_TSELECT) +DECLARE_CSR(tdata1, CSR_TDATA1) +DECLARE_CSR(tdata2, CSR_TDATA2) +DECLARE_CSR(tdata3, CSR_TDATA3) +DECLARE_CSR(dcsr, CSR_DCSR) +DECLARE_CSR(dpc, CSR_DPC) +DECLARE_CSR(dscratch0, CSR_DSCRATCH0) +DECLARE_CSR(dscratch1, CSR_DSCRATCH1) +DECLARE_CSR(mcycle, CSR_MCYCLE) +DECLARE_CSR(minstret, CSR_MINSTRET) +DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3) +DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4) +DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5) +DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6) +DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7) +DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8) +DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9) +DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10) +DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11) +DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12) +DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13) +DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14) +DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15) +DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16) +DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17) +DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18) +DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19) +DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20) +DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21) +DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22) +DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23) +DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24) +DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25) +DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26) +DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27) +DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28) +DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29) +DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30) +DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31) +DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3) +DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4) +DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5) +DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6) +DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7) +DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8) +DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9) +DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10) +DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11) +DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12) +DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13) +DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14) +DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15) +DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16) +DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17) +DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18) +DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19) +DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20) +DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21) +DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22) +DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23) +DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24) +DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25) +DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26) +DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27) +DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28) +DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29) +DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30) +DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31) +DECLARE_CSR(mvendorid, CSR_MVENDORID) +DECLARE_CSR(marchid, CSR_MARCHID) +DECLARE_CSR(mimpid, CSR_MIMPID) +DECLARE_CSR(mhartid, CSR_MHARTID) +DECLARE_CSR(htimedeltah, CSR_HTIMEDELTAH) +DECLARE_CSR(cycleh, CSR_CYCLEH) +DECLARE_CSR(timeh, CSR_TIMEH) +DECLARE_CSR(instreth, CSR_INSTRETH) +DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H) +DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H) +DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H) +DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H) +DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H) +DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H) +DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H) +DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H) +DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H) +DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H) +DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H) +DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H) +DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H) +DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H) +DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H) +DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H) +DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H) +DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H) +DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H) +DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H) +DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H) +DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H) +DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H) +DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H) +DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H) +DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H) +DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H) +DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H) +DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H) +DECLARE_CSR(mstatush, CSR_MSTATUSH) +DECLARE_CSR(mcycleh, CSR_MCYCLEH) +DECLARE_CSR(minstreth, CSR_MINSTRETH) +DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H) +DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H) +DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H) +DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H) +DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H) +DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H) +DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H) +DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H) +DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H) +DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H) +DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H) +DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H) +DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H) +DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H) +DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H) +DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H) +DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H) +DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H) +DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H) +DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H) +DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H) +DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H) +DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H) +DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H) +DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H) +DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H) +DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H) +DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H) +DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H) +#endif +#ifdef DECLARE_CAUSE +DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH) +DECLARE_CAUSE("fetch access", CAUSE_FETCH_ACCESS) +DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION) +DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT) +DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD) +DECLARE_CAUSE("load access", CAUSE_LOAD_ACCESS) +DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE) +DECLARE_CAUSE("store access", CAUSE_STORE_ACCESS) +DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL) +DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL) +DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL) +DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL) +DECLARE_CAUSE("fetch page fault", CAUSE_FETCH_PAGE_FAULT) +DECLARE_CAUSE("load page fault", CAUSE_LOAD_PAGE_FAULT) +DECLARE_CAUSE("store page fault", CAUSE_STORE_PAGE_FAULT) +#endif diff --git a/vfpu/inc/util.h b/vfpu/inc/util.h new file mode 100755 index 0000000000..081cfd6345 --- /dev/null +++ b/vfpu/inc/util.h @@ -0,0 +1,90 @@ +// See LICENSE for license details. + +#ifndef __UTIL_H +#define __UTIL_H + +extern void setStats(int enable); + +#include + +#define static_assert(cond) switch(0) { case 0: case !!(long)(cond): ; } + +static int verify(int n, const volatile int* test, const int* verify) +{ + int i; + // Unrolled for faster verification + for (i = 0; i < n/2*2; i+=2) + { + int t0 = test[i], t1 = test[i+1]; + int v0 = verify[i], v1 = verify[i+1]; + if (t0 != v0) return i+1; + if (t1 != v1) return i+2; + } + if (n % 2 != 0 && test[n-1] != verify[n-1]) + return n; + return 0; +} + +static int verifyDouble(int n, const volatile double* test, const double* verify) +{ + int i; + // Unrolled for faster verification + for (i = 0; i < n/2*2; i+=2) + { + double t0 = test[i], t1 = test[i+1]; + double v0 = verify[i], v1 = verify[i+1]; + int eq1 = t0 == v0, eq2 = t1 == v1; + if (!(eq1 & eq2)) return i+1+eq1; + } + if (n % 2 != 0 && test[n-1] != verify[n-1]) + return n; + return 0; +} + +static void __attribute__((noinline)) barrier(int ncores) +{ + static volatile int sense; + static volatile int count; + static __thread int threadsense; + + __sync_synchronize(); + + threadsense = !threadsense; + if (__sync_fetch_and_add(&count, 1) == ncores-1) + { + count = 0; + sense = threadsense; + } + else while(sense != threadsense) + ; + + __sync_synchronize(); +} + +static uint64_t lfsr(uint64_t x) +{ + uint64_t bit = (x ^ (x >> 1)) & 1; + return (x >> 1) | (bit << 62); +} + +static uintptr_t insn_len(uintptr_t pc) +{ + return (*(unsigned short*)pc & 3) ? 4 : 2; +} + +#ifdef __riscv +#include "encoding.h" +#endif + +#define stringify_1(s) #s +#define stringify(s) stringify_1(s) +#define stats(code, iter) do { \ + unsigned long _c = -read_csr(mcycle), _i = -read_csr(minstret); \ + code; \ + _c += read_csr(mcycle), _i += read_csr(minstret); \ + if (cid == 0) \ + printf("\n%s: %ld cycles, %ld.%ld cycles/iter, %ld.%ld CPI\n", \ + stringify(code), _c, _c/iter, 10*_c/iter%10, _c/_i, 10*_c/_i%10); \ + } while(0) + +#endif //__UTIL_H diff --git a/vfpu/inc/vdefs.h b/vfpu/inc/vdefs.h new file mode 100755 index 0000000000..bcddcf8aeb --- /dev/null +++ b/vfpu/inc/vdefs.h @@ -0,0 +1,52 @@ +#include + +typedef struct { uint8_t v; } float8_1_t; //1-4-3 + +typedef struct { uint8_t v; } float8_2_t; //1-5-2 + +#ifndef VLEN +#define VLEN 256 // number of elements +#endif + +#define CHAR_T 'C' +#define SHORT_T 'S' +#define INT_T 'I' +#define FLOAT_T 'F' +#define DOUBLE_T 'D' +#define MINI1_T 'P' +#define MINI2_T 'Q' + +#ifndef VTYPE +#define VTYPE 'C' // type of elements +#endif + +#if VTYPE == 'D' + #define TYPE double + #define TYPE2 long int +#elif VTYPE == 'F' + #define TYPE float + #define TYPE2 int +#elif VTYPE == 'I' + #define TYPE int + #define TYPE2 int +#elif VTYPE == 'S' + #define TYPE short + #define TYPE2 short +#elif VTYPE == 'C' + #define TYPE char + #define TYPE2 char +#elif VTYPE == MINI1_T + #define TYPE float8_1_t + #define TYPE2 char +#elif VTYPE == MINI2_T + #define TYPE float8_2_t + #define TYPE2 char +#endif + +typedef TYPE vtype; +typedef TYPE2 vtype2; + +typedef union{ + vtype f; + vtype2 i; +} vf; diff --git a/vfpu/print_vsnrl.c b/vfpu/print_vsnrl.c new file mode 100755 index 0000000000..f7d593945f --- /dev/null +++ b/vfpu/print_vsnrl.c @@ -0,0 +1,40 @@ +#include +#include +#include +#include "vdefs.h" + +const int bias = 1023; + +typedef struct{ + int exp: 11; + unsigned long int mnt: 52; + int sign: 1; +} dfloat; + +//int pow(int a, int b) { +// for (int i=0; i052; i--) + // arg1_params.mnt += 1/pow(2,i); + //printf("exponent_arg1 = %d\n", arg1_params.exp); + //printf("mantissa_arg1 = %lx\n", arg1_params.mnt); + + } +} + + + +//void print_res(const vtype arg1[], const vtype arg2[], vtype arg3[], int len) { +// for(int i=0; i +#include +#include +#include +#include +#include +#include "util.h" + +#define SYS_write 64 + +#undef strcmp + +extern volatile uint64_t tohost; +extern volatile uint64_t fromhost; + +static uintptr_t syscall(uintptr_t which, uint64_t arg0, uint64_t arg1, uint64_t arg2) +{ + volatile uint64_t magic_mem[8] __attribute__((aligned(64))); + magic_mem[0] = which; + magic_mem[1] = arg0; + magic_mem[2] = arg1; + magic_mem[3] = arg2; + __sync_synchronize(); + + tohost = (uintptr_t)magic_mem; + while (fromhost == 0) + ; + fromhost = 0; + + __sync_synchronize(); + return magic_mem[0]; +} + +#define NUM_COUNTERS 2 +static uintptr_t counters[NUM_COUNTERS]; +static char* counter_names[NUM_COUNTERS]; + +void setStats(int enable) +{ + int i = 0; +#define READ_CTR(name) do { \ + while (i >= NUM_COUNTERS) ; \ + uintptr_t csr = read_csr(name); \ + if (!enable) { csr -= counters[i]; counter_names[i] = #name; } \ + counters[i++] = csr; \ + } while (0) + + READ_CTR(mcycle); + READ_CTR(minstret); + +#undef READ_CTR +} + +void __attribute__((noreturn)) tohost_exit(uintptr_t code) +{ + tohost = (code << 1) | 1; + while (1); +} + +uintptr_t __attribute__((weak)) handle_trap(uintptr_t cause, uintptr_t epc, uintptr_t regs[32]) +{ + tohost_exit(1337); +} + +void exit(int code) +{ + tohost_exit(code); +} + +void abort() +{ + exit(128 + SIGABRT); +} + +void printstr(const char* s) +{ + syscall(SYS_write, 1, (uintptr_t)s, strlen(s)); +} + +void __attribute__((weak)) thread_entry(int cid, int nc) +{ + // multi-threaded programs override this function. + // for the case of single-threaded programs, only let core 0 proceed. + while (cid != 0); +} + +int __attribute__((weak)) main(int argc, char** argv) +{ + // single-threaded programs override this function. + printstr("Implement main(), foo!\n"); + return -1; +} + +static inline void *get_tp(void) +{ + void *tp; + __asm__ volatile ("mv %0, tp" : "=r"(tp)); + return tp; +} + +static void init_tls() +{ + //register void* thread_pointer asm("tp"); + void *thread_pointer = get_tp(); /* now really holds TP */ + extern char _tdata_begin, _tdata_end, _tbss_end; + //char _tdata_begin, _tdata_end, _tbss_end; + size_t tdata_size = &_tdata_end - &_tdata_begin; + memcpy(thread_pointer, &_tdata_begin, tdata_size); + size_t tbss_size = &_tbss_end - &_tdata_end; + memset(thread_pointer + tdata_size, 0, tbss_size); +} + +static inline void enable_fp_vector(void) +{ + /* FS = 11 (Dirty) | VS = 11 (Dirty) */ + const uintptr_t fp_vec_bits = (3ULL << 13) | (3ULL << 9); + + /* turn both states Dirty once and for all */ + __asm__ volatile ("csrs mstatus, %0" :: "r"(fp_vec_bits) : "memory"); + + /* configure vector unit (VL=64, e8, m1, TA, MA) */ + __asm__ volatile ( + "li t0, 64\n\t" + "vsetvli zero, t0, e8, m1, ta, ma\n\t" + "csrw fcsr, zero\n\t" /* clear FP flags, set RM=RNE */ + : + : + : "t0", "memory" + ); +} + + +void _init(int cid, int nc) +{ + int vl = 1024; + int mask = 0; + int temp = 0; + int* temp_ptr = &temp; + __asm__("li %[vl], 0x6200;" + "csrr %[temp], mstatus;" + "li %[mask], 0xFFFFFFFFFFFF99FF;" + "and %[temp], %[mask], %[temp];" + "or %[temp], %[vl], %[temp];" + "sw %[temp], (%[temp_ptr]);" + "csrw mstatus, %[temp];" + : // out + : [mask] "r" (mask), [temp_ptr] "r" (temp_ptr), [temp] "r" (temp), + [vl] "r" (vl) + : "memory" + ); + enable_fp_vector(); + __asm__ volatile ( + /* 1. mark scalar FP state Dirty (FS = 11) */ + "li %[tmp], (3 << 13)\n\t" + "csrs mstatus, %[tmp]\n\t" + + /* 2. mark vector state Dirty (VS = 11) */ + "li %[tmp], (3 << 9)\n\t" + "csrs mstatus, %[tmp]\n\t" +// +// /* 3. VL = 64, VTYPE = e8,m1, tail-agnostic, mask-agnostic */ +// "li %[tmp], 64\n\t" +// "vsetvli %[tmp], %[tmp], e8, m1, ta, ma\n\t" +// +// /* 4. Clear FP flags, set default rounding */ +// "csrw fcsr, zero\n\t" + : + : [tmp] "r" (0) + : "memory" + ); + uintptr_t tmp; // gives the compiler a scratch register + + tmp = (3 << 9); // VS = 11 (Dirty) + asm volatile ("csrs mstatus, %0" :: "r"(tmp) : "memory"); + + tmp = 64; + asm volatile ("vsetvli zero, %0, e8, m1, ta, ma" :: "r"(tmp)); + + asm volatile ("csrw fcsr, zero"); + + init_tls(); + thread_entry(cid, nc); + + // only single-threaded programs should ever get here. + int ret = main(0, 0); + + char buf[NUM_COUNTERS * 32] __attribute__((aligned(64))); + char* pbuf = buf; + for (int i = 0; i < NUM_COUNTERS; i++) + if (counters[i]) + pbuf += sprintf(pbuf, "%s = %lu\n", counter_names[i], counters[i]); + if (pbuf != buf) + printstr(buf); + + exit(ret); +} + +#undef putchar +int putchar(int ch) +{ + static __thread char buf[64] __attribute__((aligned(64))); + static __thread int buflen = 0; + + buf[buflen++] = ch; + + if (ch == '\n' || buflen == sizeof(buf)) + { + syscall(SYS_write, 1, (uintptr_t)buf, buflen); + buflen = 0; + } + + return 0; +} + +void printhex(uint64_t x) +{ + char str[17]; + int i; + for (i = 0; i < 16; i++) + { + str[15-i] = (x & 0xF) + ((x & 0xF) < 10 ? '0' : 'a'-10); + x >>= 4; + } + str[16] = 0; + + printstr(str); +} + +static inline void printnum(void (*putch)(int, void**), void **putdat, + unsigned long long num, unsigned base, int width, int padc) +{ + unsigned digs[sizeof(num)*CHAR_BIT]; + int pos = 0; + + while (1) + { + digs[pos++] = num % base; + if (num < base) + break; + num /= base; + } + + while (width-- > pos) + putch(padc, putdat); + + while (pos-- > 0) + putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat); +} + +static unsigned long long getuint(va_list *ap, int lflag) +{ + if (lflag >= 2) + return va_arg(*ap, unsigned long long); + else if (lflag) + return va_arg(*ap, unsigned long); + else + return va_arg(*ap, unsigned int); +} + +static long long getint(va_list *ap, int lflag) +{ + if (lflag >= 2) + return va_arg(*ap, long long); + else if (lflag) + return va_arg(*ap, long); + else + return va_arg(*ap, int); +} + +static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt, va_list ap) +{ + register const char* p; + const char* last_fmt; + register int ch, err; + unsigned long long num; + int base, lflag, width, precision, altflag; + char padc; + + while (1) { + while ((ch = *(unsigned char *) fmt) != '%') { + if (ch == '\0') + return; + fmt++; + putch(ch, putdat); + } + fmt++; + + // Process a %-escape sequence + last_fmt = fmt; + padc = ' '; + width = -1; + precision = -1; + lflag = 0; + altflag = 0; + reswitch: + switch (ch = *(unsigned char *) fmt++) { + + // flag to pad on the right + case '-': + padc = '-'; + goto reswitch; + + // flag to pad with 0's instead of spaces + case '0': + padc = '0'; + goto reswitch; + + // width field + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + for (precision = 0; ; ++fmt) { + precision = precision * 10 + ch - '0'; + ch = *fmt; + if (ch < '0' || ch > '9') + break; + } + goto process_precision; + + case '*': + precision = va_arg(ap, int); + goto process_precision; + + case '.': + if (width < 0) + width = 0; + goto reswitch; + + case '#': + altflag = 1; + goto reswitch; + + process_precision: + if (width < 0) + width = precision, precision = -1; + goto reswitch; + + // long flag (doubled for long long) + case 'l': + lflag++; + goto reswitch; + + // character + case 'c': + putch(va_arg(ap, int), putdat); + break; + + // string + case 's': + if ((p = va_arg(ap, char *)) == NULL) + p = "(null)"; + if (width > 0 && padc != '-') + for (width -= strnlen(p, precision); width > 0; width--) + putch(padc, putdat); + for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) { + putch(ch, putdat); + p++; + } + for (; width > 0; width--) + putch(' ', putdat); + break; + + // (signed) decimal + case 'd': + num = getint(&ap, lflag); + if ((long long) num < 0) { + putch('-', putdat); + num = -(long long) num; + } + base = 10; + goto signed_number; + + // unsigned decimal + case 'u': + base = 10; + goto unsigned_number; + + // (unsigned) octal + case 'o': + // should do something with padding so it's always 3 octits + base = 8; + goto unsigned_number; + + // pointer + case 'p': + static_assert(sizeof(long) == sizeof(void*)); + lflag = 1; + putch('0', putdat); + putch('x', putdat); + /* fall through to 'x' */ + + // (unsigned) hexadecimal + case 'x': + base = 16; + unsigned_number: + num = getuint(&ap, lflag); + signed_number: + printnum(putch, putdat, num, base, width, padc); + break; + + // escaped '%' character + case '%': + putch(ch, putdat); + break; + + // unrecognized escape sequence - just print it literally + default: + putch('%', putdat); + fmt = last_fmt; + break; + } + } +} + +int printf(const char* fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + + vprintfmt((void*)putchar, 0, fmt, ap); + + va_end(ap); + return 0; // incorrect return value, but who cares, anyway? +} + +void sprintf_putch(int ch, void** data) +{ + char** pstr = (char**)data; + **pstr = ch; + (*pstr)++; +} + +int sprintf(char* str, const char* fmt, ...) +{ + va_list ap; + char* str0 = str; + va_start(ap, fmt); + + void sprintf_putch(int ch, void** data); + //{ + // char** pstr = (char**)data; + // **pstr = ch; + // (*pstr)++; + //} + + vprintfmt(sprintf_putch, (void**)&str, fmt, ap); + *str = 0; + + va_end(ap); + return str - str0; +} + +void* memcpy(void* dest, const void* src, size_t len) +{ + if ((((uintptr_t)dest | (uintptr_t)src | len) & (sizeof(uintptr_t)-1)) == 0) { + const uintptr_t* s = src; + uintptr_t *d = dest; + while (d < (uintptr_t*)(dest + len)) + *d++ = *s++; + } else { + const char* s = src; + char *d = dest; + while (d < (char*)(dest + len)) + *d++ = *s++; + } + return dest; +} + +void* memset(void* dest, int byte, size_t len) +{ + if ((((uintptr_t)dest | len) & (sizeof(uintptr_t)-1)) == 0) { + uintptr_t word = byte & 0xFF; + word |= word << 8; + word |= word << 16; + word |= word << 16 << 16; + + uintptr_t *d = dest; + while (d < (uintptr_t*)(dest + len)) + *d++ = word; + } else { + char *d = dest; + while (d < (char*)(dest + len)) + *d++ = byte; + } + return dest; +} + +size_t strlen(const char *s) +{ + const char *p = s; + while (*p) + p++; + return p - s; +} + +size_t strnlen(const char *s, size_t n) +{ + const char *p = s; + while (n-- && *p) + p++; + return p - s; +} + +int strcmp(const char* s1, const char* s2) +{ + unsigned char c1, c2; + + do { + c1 = *s1++; + c2 = *s2++; + } while (c1 != 0 && c1 == c2); + + return c1 - c2; +} + +char* strcpy(char* dest, const char* src) +{ + char* d = dest; + while ((*d++ = *src++)) + ; + return dest; +} + +long atol(const char* str) +{ + long res = 0; + int sign = 0; + + while (*str == ' ') + str++; + + if (*str == '-' || *str == '+') { + sign = *str == '-'; + str++; + } + + while (*str) { + res *= 10; + res += *str++ - '0'; + } + + return sign ? -res : res; +} diff --git a/vfpu/src/test.ld b/vfpu/src/test.ld new file mode 100755 index 0000000000..a50b017e81 --- /dev/null +++ b/vfpu/src/test.ld @@ -0,0 +1,66 @@ +/*======================================================================*/ +/* Proxy kernel linker script */ +/*======================================================================*/ +/* This is the linker script used when building the proxy kernel. */ + +/*----------------------------------------------------------------------*/ +/* Setup */ +/*----------------------------------------------------------------------*/ + +/* The OUTPUT_ARCH command specifies the machine architecture where the + argument is one of the names used in the BFD library. More + specifically one of the entires in bfd/cpu-mips.c */ + +OUTPUT_ARCH( "riscv" ) +ENTRY(_start) + +/*----------------------------------------------------------------------*/ +/* Sections */ +/*----------------------------------------------------------------------*/ + +SECTIONS +{ + + /* text: test code section */ + . = 0x80000000; + .text.init : { *(.text.init) } + + . = ALIGN(0x1000); + .tohost : { *(.tohost) } + + . = ALIGN(0x1000); + .text : { *(.text) } + + /* data segment */ + .data : { *(.data) } + + .sdata : { + __global_pointer$ = . + 0x800; + *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata*) + *(.sdata .sdata.* .gnu.linkonce.s.*) + } + + /* bss segment */ + .sbss : { + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } + .bss : { *(.bss) } + + /* thread-local data segment */ + .tdata : + { + _tdata_begin = .; + *(.tdata) + _tdata_end = .; + } + .tbss : + { + *(.tbss) + _tbss_end = .; + } + + /* End of uninitalized data segement */ + _end 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zQli8o3i@+k$oMG~P~y5*O)~Hn#T7ziNmA%M$}8(v{K7BHk{BW(=g_3|Q!w(nO@b-? zl{nEz4d=IfxEY5h5?>Qc>953H%KI-T4i_KMpWKT>`zvv$(jNs6pRxb=g3_OEjB*bs z{b%`&Z}h8^c#e!fw|lTv>Hp(FL}rxPDAW!xtlj1(Hu#>>`@NS`ktcfmwn%C^IY*Y* zN*@ezzw00?>sR6`_+#v#?SUOkE1#6v8_Gm!i(eJ)l6&`GLJkI`N|_9n{{8 +#include +#include "vdefs.h" + +vf arr_d1[256] = {1, 0x40, 3.9, 1.4125, 5.7}; +vf arr_d2[256] = {1, 0x40, 6.78, 6.4532, 5.7}; +vf arr_dr[256*256] = {}; + +long int arr_d1_f[256] = {}; + +void print_res(vf arg1[], vf arg2[], vf arg3[], int len, int* temp_ptr, int operation); + +int vl = VLEN; + +int temp = 0; +int mask = 0; + +int* temp_ptr = &temp; + +int main() +{ + + uint64_t ms, vl, vt; + __asm__ volatile ("csrr %0, mstatus" : "=r"(ms)); + __asm__ volatile ("csrr %0, vl" : "=r"(vl)); + __asm__ volatile ("csrr %0, vtype" : "=r"(vt)); + printf("mstatus=0x%lx vl=%lu vtype=0x%lx\n", ms, vl, vt); + + for (int i=0;i<=255;i++) { + arr_d2[i].i = (long int) i; + arr_d1_f[i] = 0xFFFFFFFFFFFFFF00 + i; + } + + int operation_code; + float d1_fp = 0.0; + #pragma clang loop unroll(disable) + for (int operation=0; operation<=3; operation++) { + + char newline = '\n'; + printf("OP\tsrc1\tsrc2\tres\tFLAGS%c", newline); + for (int i=0;i<=255;i++) { + + for (int k=0;k<=255;k++) { + arr_d1[k].i = (long int) i; + } + + #pragma clang loop unroll(disable) + for (int j=0;j<=3;j++) { + + __asm__("li %[vl], 0x6200;" + "csrr %[temp], mstatus;" + "li %[mask], 0xFFFFFFFFFFFF99FF;" + "and %[temp], %[mask], %[temp];" + "or %[temp], %[vl], %[temp];" + "sw %[temp], (%[temp_ptr]);" + "csrw mstatus, %[temp];" + "li %[vl], 512;" + #if VTYPE == FLOAT_T + "vsetvli %[vl], %[vl], e32, m1, ta, ma;" + "vle32.v v1, (%[arr_d1]);" + "vle32.v v2, (%[arr_d2]);" + #elif VTYPE == DOUBLE_T + "vsetvli %[vl], %[vl], e64, m1, ta, ma;" + "vle64.v v1, (%[arr_d1]);" + "vle64.v v2, (%[arr_d2]);" + #elif VTYPE == SHORT_T + "vsetvli %[vl], %[vl], e16, m1, ta, ma;" + "vle16.v v1, (%[arr_d1]);" + "vle16.v v2, (%[arr_d2]);" + #elif VTYPE == CHAR_T || VTYPE == MINI1_T || VTYPE == MINI2_T + "vsetvli %[vl], %[vl], e8, m1, ta, ma;" + "vle8.v v1, (%[arr_d1]);" + "vle8.v v2, (%[arr_d2]);" + "fld %[d1_fp], (%[arr_d1_f]);" + "" + //"vlbu.v v1 (%[arr_d1]);" + //"vlbu.v v2 (%[arr_d1]);" + #endif + + "li %[operation_code], 0;" + "beq %[operation_code], %[operation], VFADD_VV;" + "li %[operation_code], 1;" + "beq %[operation_code], %[operation], VFSUB_VV;" + "li %[operation_code], 2;" + "beq %[operation_code], %[operation], VFMUL_VV;" + "li %[operation_code], 3;" + "beq %[operation_code], %[operation], VFDIV_VV;" + "li %[operation_code], 4;" + "beq %[operation_code], %[operation], VFADD_VF;" + "li %[operation_code], 5;" + "beq %[operation_code], %[operation], VFSUB_VF;" + "li %[operation_code], 6;" + "beq %[operation_code], %[operation], VFMUL_VF;" + "li %[operation_code], 7;" + "beq %[operation_code], %[operation], VFDIV_VF;" + + "VFADD_VV:;" + "vfadd.vv v3, v1, v2;" + "j STORE;" + "VFSUB_VV:;" + "vfsub.vv v3, v1, v2;" + "j STORE;" + "VFMUL_VV:;" + "vfmul.vv v3, v1, v2;" + "j STORE;" + "VFDIV_VV:;" + "vfdiv.vv v3, v1, v2;" + "j STORE;" + + "VFADD_VF:;" + "vfadd.vf v3, v2, %[d1_fp];" + "VFSUB_VF:;" + //"vfsub.vf v3, v2, %[d1_fp];" + "VFMUL_VF:;" + //"vfmul.vf v3, v2, %[d1_fp];" + "VFDIV_VF:;" + //"vfdiv.vf v3, v2, %[d1_fp];" + + "STORE:" + #if VTYPE == FLOAT_T + "vse32.v v3, (%[arr_dr]);" + #elif VTYPE == DOUBLE_T + "vse64.v v3, (%[arr_dr]);" + #elif VTYPE == SHORT_T + "vse16.v v3, (%[arr_dr]);" + #elif VTYPE == CHAR_T || VTYPE == MINI1_T || VTYPE == MINI2_T + "vse8.v v3, (%[arr_dr]);" + #endif + : // out + : [mask] "r" (mask), [temp_ptr] "r" (temp_ptr), [temp] "r" (temp), + [arr_dr] "r" (&arr_dr), [arr_d1] "r" (arr_d1) , [arr_d2] "r" (arr_d2+64*j), + [vl] "r" (vl), [operation_code] "r" (operation_code), [operation] "r" (operation), + [d1_fp] "f" (d1_fp), [arr_d1_f] "r" (&arr_d1_f[i]) + : "memory" + ); + print_res(arr_d1, arr_d2+64*j, arr_dr, 64, temp_ptr, operation); + + } + } + } + + return 0; +} + +void print_res(vf arg1[], vf arg2[], vf arg3[], int len, int* temp_ptr, int operation) { + char *op_name; + if (operation == 0) { + op_name = "vfadd: "; + } + else if (operation == 1) { + op_name = "vfsub: "; + } + else if (operation == 2) { + op_name = "vfmul: "; + } + else if (operation == 3) { + op_name = "vfdiv: "; + } + for(int i=0; i052; i--) + // arg1_params.mnt += 1/pow(2,i); + //printf("exponent_arg1 = %d\n", arg1_params.exp); + //printf("mantissa_arg1 = %lx\n", arg1_params.mnt); + } +} \ No newline at end of file diff --git a/vfpu/vfpu.dump b/vfpu/vfpu.dump new file mode 100644 index 0000000000..1f842bc2a7 --- /dev/null +++ b/vfpu/vfpu.dump @@ -0,0 +1,1567 @@ + +vfpu: file format elf64-littleriscv + + +Disassembly of section .text.init: + +0000000080000000 <_start>: + 80000000: 4081 li ra,0 + 80000002: 4101 li sp,0 + 80000004: 4181 li gp,0 + 80000006: 4201 li tp,0 + 80000008: 4281 li t0,0 + 8000000a: 4301 li t1,0 + 8000000c: 4381 li t2,0 + 8000000e: 4401 li s0,0 + 80000010: 4481 li s1,0 + 80000012: 4501 li a0,0 + 80000014: 4581 li a1,0 + 80000016: 4601 li a2,0 + 80000018: 4681 li a3,0 + 8000001a: 4701 li a4,0 + 8000001c: 4781 li a5,0 + 8000001e: 4801 li a6,0 + 80000020: 4881 li a7,0 + 80000022: 4901 li s2,0 + 80000024: 4981 li s3,0 + 80000026: 4a01 li s4,0 + 80000028: 4a81 li s5,0 + 8000002a: 4b01 li s6,0 + 8000002c: 4b81 li s7,0 + 8000002e: 4c01 li s8,0 + 80000030: 4c81 li s9,0 + 80000032: 4d01 li s10,0 + 80000034: 4d81 li s11,0 + 80000036: 4e01 li t3,0 + 80000038: 4e81 li t4,0 + 8000003a: 4f01 li t5,0 + 8000003c: 4f81 li t6,0 + 8000003e: 62f9 lui t0,0x1e + 80000040: 3002a073 csrs mstatus,t0 + 80000044: 4285 li t0,1 + 80000046: 02fe sll t0,t0,0x1f + 80000048: 0002d863 bgez t0,80000058 <_start+0x58> + 8000004c: 4505 li a0,1 + 8000004e: 00001297 auipc t0,0x1 + 80000052: faa2a923 sw a0,-78(t0) # 80001000 + 80000056: bfdd j 8000004c <_start+0x4c> + 80000058: 00000297 auipc t0,0x0 + 8000005c: 09028293 add t0,t0,144 # 800000e8 <_start+0xe8> + 80000060: 30529073 csrw mtvec,t0 + 80000064: 00301073 fscsr zero + 80000068: f0000053 fmv.w.x ft0,zero + 8000006c: f00000d3 fmv.w.x ft1,zero + 80000070: f0000153 fmv.w.x ft2,zero + 80000074: f00001d3 fmv.w.x ft3,zero + 80000078: f0000253 fmv.w.x ft4,zero + 8000007c: f00002d3 fmv.w.x ft5,zero + 80000080: f0000353 fmv.w.x ft6,zero + 80000084: f00003d3 fmv.w.x ft7,zero + 80000088: f0000453 fmv.w.x fs0,zero + 8000008c: f00004d3 fmv.w.x fs1,zero + 80000090: f0000553 fmv.w.x fa0,zero + 80000094: f00005d3 fmv.w.x fa1,zero + 80000098: f0000653 fmv.w.x fa2,zero + 8000009c: f00006d3 fmv.w.x fa3,zero + 800000a0: f0000753 fmv.w.x fa4,zero + 800000a4: f00007d3 fmv.w.x fa5,zero + 800000a8: f0000853 fmv.w.x fa6,zero + 800000ac: f00008d3 fmv.w.x fa7,zero + 800000b0: f0000953 fmv.w.x fs2,zero + 800000b4: f00009d3 fmv.w.x fs3,zero + 800000b8: f0000a53 fmv.w.x fs4,zero + 800000bc: f0000ad3 fmv.w.x fs5,zero + 800000c0: f0000b53 fmv.w.x fs6,zero + 800000c4: f0000bd3 fmv.w.x fs7,zero + 800000c8: f0000c53 fmv.w.x fs8,zero + 800000cc: f0000cd3 fmv.w.x fs9,zero + 800000d0: f0000d53 fmv.w.x fs10,zero + 800000d4: f0000dd3 fmv.w.x fs11,zero + 800000d8: f0000e53 fmv.w.x ft8,zero + 800000dc: f0000ed3 fmv.w.x ft9,zero + 800000e0: f0000f53 fmv.w.x ft10,zero + 800000e4: f0000fd3 fmv.w.x ft11,zero + 800000e8: 00000297 auipc t0,0x0 + 800000ec: 03c28293 add t0,t0,60 # 80000124 + 800000f0: 30529073 csrw mtvec,t0 + 800000f4: 00004197 auipc gp,0x4 + 800000f8: e4418193 add gp,gp,-444 # 80003f38 <__global_pointer$> + 800000fc: 00014217 auipc tp,0x14 + 80000100: ec320213 add tp,tp,-317 # 80013fbf <_end+0x3f> + 80000104: fc027213 and tp,tp,-64 + 80000108: f1402573 csrr a0,mhartid + 8000010c: 4585 li a1,1 + 8000010e: 00b57063 bgeu a0,a1,8000010e <_start+0x10e> + 80000112: 00150113 add sp,a0,1 + 80000116: 0146 sll sp,sp,0x11 + 80000118: 9112 add sp,sp,tp + 8000011a: 01151613 sll a2,a0,0x11 + 8000011e: 9232 add tp,tp,a2 + 80000120: 0520206f j 80002172 <_init> + +0000000080000124 : + 80000124: 716d add sp,sp,-272 + 80000126: e406 sd ra,8(sp) + 80000128: e80a sd sp,16(sp) + 8000012a: ec0e sd gp,24(sp) + 8000012c: f012 sd tp,32(sp) + 8000012e: f416 sd t0,40(sp) + 80000130: f81a sd t1,48(sp) + 80000132: fc1e sd t2,56(sp) + 80000134: e0a2 sd s0,64(sp) + 80000136: e4a6 sd s1,72(sp) + 80000138: e8aa sd a0,80(sp) + 8000013a: ecae sd a1,88(sp) + 8000013c: f0b2 sd a2,96(sp) + 8000013e: f4b6 sd a3,104(sp) + 80000140: f8ba sd a4,112(sp) + 80000142: fcbe sd a5,120(sp) + 80000144: e142 sd a6,128(sp) + 80000146: e546 sd a7,136(sp) + 80000148: e94a sd s2,144(sp) + 8000014a: ed4e sd s3,152(sp) + 8000014c: f152 sd s4,160(sp) + 8000014e: f556 sd s5,168(sp) + 80000150: f95a sd s6,176(sp) + 80000152: fd5e sd s7,184(sp) + 80000154: e1e2 sd s8,192(sp) + 80000156: e5e6 sd s9,200(sp) + 80000158: e9ea sd s10,208(sp) + 8000015a: edee sd s11,216(sp) + 8000015c: f1f2 sd t3,224(sp) + 8000015e: f5f6 sd t4,232(sp) + 80000160: f9fa sd t5,240(sp) + 80000162: fdfe sd t6,248(sp) + 80000164: 34202573 csrr a0,mcause + 80000168: 341025f3 csrr a1,mepc + 8000016c: 860a mv a2,sp + 8000016e: 703010ef jal 80002070 + 80000172: 34151073 csrw mepc,a0 + 80000176: 6289 lui t0,0x2 + 80000178: 8002829b addw t0,t0,-2048 # 1800 + 8000017c: 3002a073 csrs mstatus,t0 + 80000180: 60a2 ld ra,8(sp) + 80000182: 6142 ld sp,16(sp) + 80000184: 61e2 ld gp,24(sp) + 80000186: 7202 ld tp,32(sp) + 80000188: 72a2 ld t0,40(sp) + 8000018a: 7342 ld t1,48(sp) + 8000018c: 73e2 ld t2,56(sp) + 8000018e: 6406 ld s0,64(sp) + 80000190: 64a6 ld s1,72(sp) + 80000192: 6546 ld a0,80(sp) + 80000194: 65e6 ld a1,88(sp) + 80000196: 7606 ld a2,96(sp) + 80000198: 76a6 ld a3,104(sp) + 8000019a: 7746 ld a4,112(sp) + 8000019c: 77e6 ld a5,120(sp) + 8000019e: 680a ld a6,128(sp) + 800001a0: 68aa ld a7,136(sp) + 800001a2: 694a ld s2,144(sp) + 800001a4: 69ea ld s3,152(sp) + 800001a6: 7a0a ld s4,160(sp) + 800001a8: 7aaa ld s5,168(sp) + 800001aa: 7b4a ld s6,176(sp) + 800001ac: 7bea ld s7,184(sp) + 800001ae: 6c0e ld s8,192(sp) + 800001b0: 6cae ld s9,200(sp) + 800001b2: 6d4e ld s10,208(sp) + 800001b4: 6dee ld s11,216(sp) + 800001b6: 7e0e ld t3,224(sp) + 800001b8: 7eae ld t4,232(sp) + 800001ba: 7f4e ld t5,240(sp) + 800001bc: 7fee ld t6,248(sp) + 800001be: 6151 add sp,sp,272 + 800001c0: 30200073 mret + +Disassembly of section .text: + +0000000080002000 : + 80002000: b0002673 csrr a2,mcycle + 80002004: 00001597 auipc a1,0x1 + 80002008: 74c58593 add a1,a1,1868 # 80003750 + 8000200c: c911 beqz a0,80002020 + 8000200e: 00001517 auipc a0,0x1 + 80002012: 73a50513 add a0,a0,1850 # 80003748 + 80002016: e110 sd a2,0(a0) + 80002018: b0202573 csrr a0,minstret + 8000201c: e188 sd a0,0(a1) + 8000201e: 8082 ret + 80002020: 00001517 auipc a0,0x1 + 80002024: 72850513 add a0,a0,1832 # 80003748 + 80002028: 6114 ld a3,0(a0) + 8000202a: 8e15 sub a2,a2,a3 + 8000202c: 00001697 auipc a3,0x1 + 80002030: 72c68693 add a3,a3,1836 # 80003758 + 80002034: 00001717 auipc a4,0x1 + 80002038: 48470713 add a4,a4,1156 # 800034b8 + 8000203c: e298 sd a4,0(a3) + 8000203e: e110 sd a2,0(a0) + 80002040: b0202573 csrr a0,minstret + 80002044: 6190 ld a2,0(a1) + 80002046: 8d11 sub a0,a0,a2 + 80002048: 00001617 auipc a2,0x1 + 8000204c: 71860613 add a2,a2,1816 # 80003760 + 80002050: 00001697 auipc a3,0x1 + 80002054: 46f68693 add a3,a3,1135 # 800034bf + 80002058: e214 sd a3,0(a2) + 8000205a: e188 sd a0,0(a1) + 8000205c: 8082 ret + +000000008000205e : + 8000205e: 0506 sll a0,a0,0x1 + 80002060: 00156513 or a0,a0,1 + 80002064: fffff597 auipc a1,0xfffff + 80002068: f9c58593 add a1,a1,-100 # 80001000 + 8000206c: e188 sd a0,0(a1) + 8000206e: a001 j 8000206e + +0000000080002070 : + 80002070: fffff517 auipc a0,0xfffff + 80002074: f9050513 add a0,a0,-112 # 80001000 + 80002078: 6585 lui a1,0x1 + 8000207a: a735859b addw a1,a1,-1421 # a73 + 8000207e: e10c sd a1,0(a0) + 80002080: a001 j 80002080 + +0000000080002082 : + 80002082: 0506 sll a0,a0,0x1 + 80002084: 00156513 or a0,a0,1 + 80002088: fffff597 auipc a1,0xfffff + 8000208c: f7858593 add a1,a1,-136 # 80001000 + 80002090: e188 sd a0,0(a1) + 80002092: a001 j 80002092 + +0000000080002094 : + 80002094: fffff517 auipc a0,0xfffff + 80002098: f6c50513 add a0,a0,-148 # 80001000 + 8000209c: 10d00593 li a1,269 + 800020a0: e10c sd a1,0(a0) + 800020a2: a001 j 800020a2 + +00000000800020a4 : + 800020a4: 7119 add sp,sp,-128 + 800020a6: fc86 sd ra,120(sp) + 800020a8: f8a2 sd s0,112(sp) + 800020aa: 0100 add s0,sp,128 + 800020ac: fc017113 and sp,sp,-64 + 800020b0: 4581 li a1,0 + 800020b2: 00b50633 add a2,a0,a1 + 800020b6: 00064603 lbu a2,0(a2) + 800020ba: 0585 add a1,a1,1 + 800020bc: fa7d bnez a2,800020b2 + 800020be: 15fd add a1,a1,-1 + 800020c0: 04000613 li a2,64 + 800020c4: e032 sd a2,0(sp) + 800020c6: 4605 li a2,1 + 800020c8: e432 sd a2,8(sp) + 800020ca: e82a sd a0,16(sp) + 800020cc: ec2e sd a1,24(sp) + 800020ce: 0330000f fence rw,rw + 800020d2: fffff517 auipc a0,0xfffff + 800020d6: f2e50513 add a0,a0,-210 # 80001000 + 800020da: 858a mv a1,sp + 800020dc: e10c sd a1,0(a0) + 800020de: fffff517 auipc a0,0xfffff + 800020e2: f6250513 add a0,a0,-158 # 80001040 + 800020e6: 610c ld a1,0(a0) + 800020e8: ddfd beqz a1,800020e6 + 800020ea: 00053023 sd zero,0(a0) + 800020ee: 0330000f fence rw,rw + 800020f2: 6502 ld a0,0(sp) + 800020f4: f8040113 add sp,s0,-128 + 800020f8: 70e6 ld ra,120(sp) + 800020fa: 7446 ld s0,112(sp) + 800020fc: 6109 add sp,sp,128 + 800020fe: 8082 ret + +0000000080002100 : + 80002100: 4581 li a1,0 + 80002102: 00b50633 add a2,a0,a1 + 80002106: 00064603 lbu a2,0(a2) + 8000210a: 0585 add a1,a1,1 + 8000210c: fa7d bnez a2,80002102 + 8000210e: fff58513 add a0,a1,-1 + 80002112: 8082 ret + +0000000080002114 : + 80002114: c111 beqz a0,80002118 + 80002116: a001 j 80002116 + 80002118: 8082 ret + 8000211a: 7119 add sp,sp,-128 + 8000211c: fc86 sd ra,120(sp) + 8000211e: f8a2 sd s0,112(sp) + 80002120: 0100 add s0,sp,128 + 80002122: fc017113 and sp,sp,-64 + 80002126: 04000513 li a0,64 + 8000212a: e02a sd a0,0(sp) + 8000212c: 4505 li a0,1 + 8000212e: e42a sd a0,8(sp) + 80002130: 00001517 auipc a0,0x1 + 80002134: 39850513 add a0,a0,920 # 800034c8 + 80002138: e82a sd a0,16(sp) + 8000213a: 455d li a0,23 + 8000213c: ec2a sd a0,24(sp) + 8000213e: 0330000f fence rw,rw + 80002142: fffff517 auipc a0,0xfffff + 80002146: ebe50513 add a0,a0,-322 # 80001000 + 8000214a: 858a mv a1,sp + 8000214c: e10c sd a1,0(a0) + 8000214e: fffff517 auipc a0,0xfffff + 80002152: ef250513 add a0,a0,-270 # 80001040 + 80002156: 610c ld a1,0(a0) + 80002158: ddfd beqz a1,80002156 + 8000215a: 00053023 sd zero,0(a0) + 8000215e: 0330000f fence rw,rw + 80002162: 6502 ld a0,0(sp) + 80002164: 557d li a0,-1 + 80002166: f8040113 add sp,s0,-128 + 8000216a: 70e6 ld ra,120(sp) + 8000216c: 7446 ld s0,112(sp) + 8000216e: 6109 add sp,sp,128 + 80002170: 8082 ret + +0000000080002172 <_init>: + 80002172: 7111 add sp,sp,-256 + 80002174: fd86 sd ra,248(sp) + 80002176: f9a2 sd s0,240(sp) + 80002178: f5ca sd s2,232(sp) + 8000217a: f1ce sd s3,224(sp) + 8000217c: edd2 sd s4,216(sp) + 8000217e: 0200 add s0,sp,256 + 80002180: fc017113 and sp,sp,-64 + 80002184: 892e mv s2,a1 + 80002186: 89aa mv s3,a0 + 80002188: de82 sw zero,124(sp) + 8000218a: 18e8 add a0,sp,124 + 8000218c: 40000593 li a1,1024 + 80002190: 6599 lui a1,0x6 + 80002192: 2005859b addw a1,a1,512 # 6200 + 80002196: 30002073 csrr zero,mstatus + 8000219a: ffffa037 lui zero,0xffffa + 8000219e: 9ff0001b addw zero,zero,-1537 + 800021a2: 00007033 and zero,zero,zero + 800021a6: 0005e033 or zero,a1,zero + 800021aa: 00052023 sw zero,0(a0) + 800021ae: 30001073 csrw mstatus,zero + 800021b2: 00012597 auipc a1,0x12 + 800021b6: dbe58593 add a1,a1,-578 # 80013f70 <_tdata_begin> + 800021ba: 00012a17 auipc s4,0x12 + 800021be: db6a0a13 add s4,s4,-586 # 80013f70 <_tdata_begin> + 800021c2: 40ba0633 sub a2,s4,a1 + 800021c6: 00001097 auipc ra,0x1 + 800021ca: 9e0080e7 jalr -1568(ra) # 80002ba6 + 800021ce: 00012517 auipc a0,0x12 + 800021d2: df650513 add a0,a0,-522 # 80013fc4 <_tbss_end> + 800021d6: 41450633 sub a2,a0,s4 + 800021da: 4581 li a1,0 + 800021dc: 00001097 auipc ra,0x1 + 800021e0: a0e080e7 jalr -1522(ra) # 80002bea + 800021e4: 854e mv a0,s3 + 800021e6: 85ca mv a1,s2 + 800021e8: 00000097 auipc ra,0x0 + 800021ec: f2c080e7 jalr -212(ra) # 80002114 + 800021f0: 4501 li a0,0 + 800021f2: 4581 li a1,0 + 800021f4: 00001097 auipc ra,0x1 + 800021f8: b04080e7 jalr -1276(ra) # 80002cf8
+ 800021fc: 00001597 auipc a1,0x1 + 80002200: 54c58593 add a1,a1,1356 # 80003748 + 80002204: 6194 ld a3,0(a1) + 80002206: 892a mv s2,a0 + 80002208: c295 beqz a3,8000222c <_init+0xba> + 8000220a: 00001517 auipc a0,0x1 + 8000220e: 54e50513 add a0,a0,1358 # 80003758 + 80002212: 6110 ld a2,0(a0) + 80002214: 00001597 auipc a1,0x1 + 80002218: 2cc58593 add a1,a1,716 # 800034e0 + 8000221c: 850a mv a0,sp + 8000221e: 898a mv s3,sp + 80002220: 00000097 auipc ra,0x0 + 80002224: 092080e7 jalr 146(ra) # 800022b2 + 80002228: 99aa add s3,s3,a0 + 8000222a: a011 j 8000222e <_init+0xbc> + 8000222c: 898a mv s3,sp + 8000222e: 00001517 auipc a0,0x1 + 80002232: 52250513 add a0,a0,1314 # 80003750 + 80002236: 6114 ld a3,0(a0) + 80002238: c285 beqz a3,80002258 <_init+0xe6> + 8000223a: 00001517 auipc a0,0x1 + 8000223e: 52650513 add a0,a0,1318 # 80003760 + 80002242: 6110 ld a2,0(a0) + 80002244: 00001597 auipc a1,0x1 + 80002248: 29c58593 add a1,a1,668 # 800034e0 + 8000224c: 854e mv a0,s3 + 8000224e: 00000097 auipc ra,0x0 + 80002252: 064080e7 jalr 100(ra) # 800022b2 + 80002256: 99aa add s3,s3,a0 + 80002258: 858a mv a1,sp + 8000225a: fffff517 auipc a0,0xfffff + 8000225e: da650513 add a0,a0,-602 # 80001000 + 80002262: 04b98263 beq s3,a1,800022a6 <_init+0x134> + 80002266: 4601 li a2,0 + 80002268: 00c586b3 add a3,a1,a2 + 8000226c: 0006c683 lbu a3,0(a3) + 80002270: 0605 add a2,a2,1 + 80002272: fafd bnez a3,80002268 <_init+0xf6> + 80002274: fff60593 add a1,a2,-1 + 80002278: 04000613 li a2,64 + 8000227c: e132 sd a2,128(sp) + 8000227e: 4605 li a2,1 + 80002280: e532 sd a2,136(sp) + 80002282: 860a mv a2,sp + 80002284: e932 sd a2,144(sp) + 80002286: ed2e sd a1,152(sp) + 80002288: 0330000f fence rw,rw + 8000228c: 010c add a1,sp,128 + 8000228e: e10c sd a1,0(a0) + 80002290: fffff597 auipc a1,0xfffff + 80002294: db058593 add a1,a1,-592 # 80001040 + 80002298: 6190 ld a2,0(a1) + 8000229a: de7d beqz a2,80002298 <_init+0x126> + 8000229c: 0005b023 sd zero,0(a1) + 800022a0: 0330000f fence rw,rw + 800022a4: 658a ld a1,128(sp) + 800022a6: 00191593 sll a1,s2,0x1 + 800022aa: 0015e593 or a1,a1,1 + 800022ae: e10c sd a1,0(a0) + 800022b0: a001 j 800022b0 <_init+0x13e> + +00000000800022b2 : + 800022b2: 7161 add sp,sp,-432 + 800022b4: fe86 sd ra,376(sp) + 800022b6: faa2 sd s0,368(sp) + 800022b8: f6a6 sd s1,360(sp) + 800022ba: f2ca sd s2,352(sp) + 800022bc: eece sd s3,344(sp) + 800022be: ead2 sd s4,336(sp) + 800022c0: e6d6 sd s5,328(sp) + 800022c2: e2da sd s6,320(sp) + 800022c4: fe5e sd s7,312(sp) + 800022c6: fa62 sd s8,304(sp) + 800022c8: f666 sd s9,296(sp) + 800022ca: f26a sd s10,288(sp) + 800022cc: ee6e sd s11,280(sp) + 800022ce: 89ae mv s3,a1 + 800022d0: 82aa mv t0,a0 + 800022d2: f746 sd a7,424(sp) + 800022d4: f342 sd a6,416(sp) + 800022d6: ef3e sd a5,408(sp) + 800022d8: eb3a sd a4,400(sp) + 800022da: e736 sd a3,392(sp) + 800022dc: e332 sd a2,384(sp) + 800022de: 18010393 add t2,sp,384 + 800022e2: e81e sd t2,16(sp) + 800022e4: 01c10893 add a7,sp,28 + 800022e8: 02500a93 li s5,37 + 800022ec: 05500313 li t1,85 + 800022f0: 4c29 li s8,10 + 800022f2: 0f600c93 li s9,246 + 800022f6: 4e09 li t3,2 + 800022f8: 02d00e93 li t4,45 + 800022fc: 01810f13 add t5,sp,24 + 80002300: 4a25 li s4,9 + 80002302: 4d05 li s10,1 + 80002304: 03000f93 li t6,48 + 80002308: 07800093 li ra,120 + 8000230c: 842a mv s0,a0 + 8000230e: 4b01 li s6,0 + 80002310: 01698533 add a0,s3,s6 + 80002314: 00054583 lbu a1,0(a0) + 80002318: 2c058c63 beqz a1,800025f0 + 8000231c: 01640db3 add s11,s0,s6 + 80002320: 01558663 beq a1,s5,8000232c + 80002324: 00bd8023 sb a1,0(s11) + 80002328: 0b05 add s6,s6,1 + 8000232a: b7dd j 80002310 + 8000232c: 4801 li a6,0 + 8000232e: 00150693 add a3,a0,1 + 80002332: 02000593 li a1,32 + 80002336: 597d li s2,-1 + 80002338: 557d li a0,-1 + 8000233a: 89b6 mv s3,a3 + 8000233c: 0009c703 lbu a4,0(s3) + 80002340: fdd70493 add s1,a4,-35 + 80002344: 06936163 bltu t1,s1,800023a6 + 80002348: 87ce mv a5,s3 + 8000234a: 048e sll s1,s1,0x3 + 8000234c: 00001617 auipc a2,0x1 + 80002350: bf460613 add a2,a2,-1036 # 80002f40 + 80002354: 9626 add a2,a2,s1 + 80002356: 6210 ld a2,0(a2) + 80002358: 0985 add s3,s3,1 + 8000235a: 8602 jr a2 + 8000235c: 4901 li s2,0 + 8000235e: 0ff77613 zext.b a2,a4 + 80002362: 0017c703 lbu a4,1(a5) + 80002366: 0785 add a5,a5,1 + 80002368: 038904bb mulw s1,s2,s8 + 8000236c: 9e25 addw a2,a2,s1 + 8000236e: fc67049b addw s1,a4,-58 + 80002372: 0ff4f493 zext.b s1,s1 + 80002376: fd06091b addw s2,a2,-48 + 8000237a: ff94f2e3 bgeu s1,s9,8000235e + 8000237e: 89be mv s3,a5 + 80002380: fa055ee3 bgez a0,8000233c + 80002384: 854a mv a0,s2 + 80002386: 597d li s2,-1 + 80002388: bf55 j 8000233c + 8000238a: 85ba mv a1,a4 + 8000238c: bf45 j 8000233c + 8000238e: 0003a903 lw s2,0(t2) + 80002392: 03a1 add t2,t2,8 + 80002394: fa0554e3 bgez a0,8000233c + 80002398: b7f5 j 80002384 + 8000239a: faa041e3 bgtz a0,8000233c + 8000239e: 4501 li a0,0 + 800023a0: bf71 j 8000233c + 800023a2: 2805 addw a6,a6,1 + 800023a4: bf61 j 8000233c + 800023a6: 015d8023 sb s5,0(s11) + 800023aa: 001d8413 add s0,s11,1 + 800023ae: 89b6 mv s3,a3 + 800023b0: bfb9 j 8000230e + 800023b2: 015d8023 sb s5,0(s11) + 800023b6: 001d8413 add s0,s11,1 + 800023ba: bf91 j 8000230e + 800023bc: 00038503 lb a0,0(t2) + 800023c0: 03a1 add t2,t2,8 + 800023c2: 00ad8023 sb a0,0(s11) + 800023c6: 001d8413 add s0,s11,1 + 800023ca: b791 j 8000230e + 800023cc: 01c85463 bge a6,t3,800023d4 + 800023d0: 18080e63 beqz a6,8000256c + 800023d4: 0003b603 ld a2,0(t2) + 800023d8: 46a9 li a3,10 + 800023da: 0c065d63 bgez a2,800024b4 + 800023de: 01dd8023 sb t4,0(s11) + 800023e2: 0d85 add s11,s11,1 + 800023e4: 40c00633 neg a2,a2 + 800023e8: a0f1 j 800024b4 + 800023ea: 46a1 li a3,8 + 800023ec: 0dc84063 blt a6,t3,800024ac + 800023f0: a0c1 j 800024b0 + 800023f2: 01fd8023 sb t6,0(s11) + 800023f6: 001d80a3 sb ra,1(s11) + 800023fa: 0d89 add s11,s11,2 + 800023fc: 46c1 li a3,16 + 800023fe: a84d j 800024b0 + 80002400: 0003b483 ld s1,0(t2) + 80002404: e489 bnez s1,8000240e + 80002406: 00001497 auipc s1,0x1 + 8000240a: 0e448493 add s1,s1,228 # 800034ea + 8000240e: 00a02633 sgtz a2,a0 + 80002412: 0ff5f693 zext.b a3,a1 + 80002416: fd368693 add a3,a3,-45 + 8000241a: 00d036b3 snez a3,a3 + 8000241e: 8e75 and a2,a2,a3 + 80002420: 14060063 beqz a2,80002560 + 80002424: 8626 mv a2,s1 + 80002426: 00090d63 beqz s2,80002440 + 8000242a: 012486b3 add a3,s1,s2 + 8000242e: 874a mv a4,s2 + 80002430: 8626 mv a2,s1 + 80002432: 00064783 lbu a5,0(a2) + 80002436: c789 beqz a5,80002440 + 80002438: 177d add a4,a4,-1 + 8000243a: 0605 add a2,a2,1 + 8000243c: fb7d bnez a4,80002432 + 8000243e: 8636 mv a2,a3 + 80002440: 40c486bb subw a3,s1,a2 + 80002444: 00d50bbb addw s7,a0,a3 + 80002448: 13705863 blez s7,80002578 + 8000244c: 9d25 addw a0,a0,s1 + 8000244e: fff64613 not a2,a2 + 80002452: 9d31 addw a0,a0,a2 + 80002454: 1502 sll a0,a0,0x20 + 80002456: 9101 srl a0,a0,0x20 + 80002458: e02a sd a0,0(sp) + 8000245a: 00150613 add a2,a0,1 + 8000245e: 856e mv a0,s11 + 80002460: e416 sd t0,8(sp) + 80002462: 8bc6 mv s7,a7 + 80002464: 8d9e mv s11,t2 + 80002466: 00000097 auipc ra,0x0 + 8000246a: 784080e7 jalr 1924(ra) # 80002bea + 8000246e: 07800093 li ra,120 + 80002472: 03000f93 li t6,48 + 80002476: 01810f13 add t5,sp,24 + 8000247a: 02d00e93 li t4,45 + 8000247e: 4e09 li t3,2 + 80002480: 83ee mv t2,s11 + 80002482: 05500313 li t1,85 + 80002486: 88de mv a7,s7 + 80002488: 62a2 ld t0,8(sp) + 8000248a: 4b81 li s7,0 + 8000248c: 6502 ld a0,0(sp) + 8000248e: 9522 add a0,a0,s0 + 80002490: 955a add a0,a0,s6 + 80002492: 00150413 add s0,a0,1 + 80002496: 0004c503 lbu a0,0(s1) + 8000249a: e17d bnez a0,80002580 + 8000249c: a219 j 800025a2 + 8000249e: 46a9 li a3,10 + 800024a0: 01c85863 bge a6,t3,800024b0 + 800024a4: a021 j 800024ac + 800024a6: 46c1 li a3,16 + 800024a8: 01c85463 bge a6,t3,800024b0 + 800024ac: 0a080763 beqz a6,8000255a + 800024b0: 0003b603 ld a2,0(t2) + 800024b4: 02d67733 remu a4,a2,a3 + 800024b8: cc3a sw a4,24(sp) + 800024ba: 4485 li s1,1 + 800024bc: 00d66d63 bltu a2,a3,800024d6 + 800024c0: 4485 li s1,1 + 800024c2: 8746 mv a4,a7 + 800024c4: 02d65633 divu a2,a2,a3 + 800024c8: 02d677b3 remu a5,a2,a3 + 800024cc: 0485 add s1,s1,1 + 800024ce: c31c sw a5,0(a4) + 800024d0: 0711 add a4,a4,4 + 800024d2: fed679e3 bgeu a2,a3,800024c4 + 800024d6: 0004861b sext.w a2,s1 + 800024da: 04a65463 bge a2,a0,80002522 + 800024de: fff4c613 not a2,s1 + 800024e2: 9d31 addw a0,a0,a2 + 800024e4: 1502 sll a0,a0,0x20 + 800024e6: 02055413 srl s0,a0,0x20 + 800024ea: 00140613 add a2,s0,1 + 800024ee: 856e mv a0,s11 + 800024f0: 8916 mv s2,t0 + 800024f2: 8b46 mv s6,a7 + 800024f4: 8b9e mv s7,t2 + 800024f6: 00000097 auipc ra,0x0 + 800024fa: 6f4080e7 jalr 1780(ra) # 80002bea + 800024fe: 07800093 li ra,120 + 80002502: 03000f93 li t6,48 + 80002506: 01810f13 add t5,sp,24 + 8000250a: 02d00e93 li t4,45 + 8000250e: 4e09 li t3,2 + 80002510: 83de mv t2,s7 + 80002512: 05500313 li t1,85 + 80002516: 88da mv a7,s6 + 80002518: 82ca mv t0,s2 + 8000251a: 008d8533 add a0,s11,s0 + 8000251e: 00150d93 add s11,a0,1 + 80002522: 03a1 add t2,t2,8 + 80002524: 02049513 sll a0,s1,0x20 + 80002528: 9101 srl a0,a0,0x20 + 8000252a: 846e mv s0,s11 + 8000252c: a811 j 80002540 + 8000252e: 9db1 addw a1,a1,a2 + 80002530: 00b40023 sb a1,0(s0) + 80002534: 0405 add s0,s0,1 + 80002536: 0005059b sext.w a1,a0 + 8000253a: 157d add a0,a0,-1 + 8000253c: dcbd59e3 bge s10,a1,8000230e + 80002540: 34fd addw s1,s1,-1 + 80002542: 02049593 sll a1,s1,0x20 + 80002546: 81f9 srl a1,a1,0x1e + 80002548: 95fa add a1,a1,t5 + 8000254a: 418c lw a1,0(a1) + 8000254c: 05700613 li a2,87 + 80002550: fcba6fe3 bltu s4,a1,8000252e + 80002554: 03000613 li a2,48 + 80002558: bfd9 j 8000252e + 8000255a: 0003e603 lwu a2,0(t2) + 8000255e: bf99 j 800024b4 + 80002560: 846e mv s0,s11 + 80002562: 8baa mv s7,a0 + 80002564: 0004c503 lbu a0,0(s1) + 80002568: ed01 bnez a0,80002580 + 8000256a: a825 j 800025a2 + 8000256c: 0003a603 lw a2,0(t2) + 80002570: 46a9 li a3,10 + 80002572: f40651e3 bgez a2,800024b4 + 80002576: b5a5 j 800023de + 80002578: 846e mv s0,s11 + 8000257a: 0004c503 lbu a0,0(s1) + 8000257e: c115 beqz a0,800025a2 + 80002580: 00148593 add a1,s1,1 + 80002584: a809 j 80002596 + 80002586: 00a40023 sb a0,0(s0) + 8000258a: 0005c503 lbu a0,0(a1) + 8000258e: 0405 add s0,s0,1 + 80002590: 3bfd addw s7,s7,-1 + 80002592: 0585 add a1,a1,1 + 80002594: c519 beqz a0,800025a2 + 80002596: fe0948e3 bltz s2,80002586 + 8000259a: 00090463 beqz s2,800025a2 + 8000259e: 397d addw s2,s2,-1 + 800025a0: b7dd j 80002586 + 800025a2: 03a1 add t2,t2,8 + 800025a4: d77055e3 blez s7,8000230e + 800025a8: 020b9513 sll a0,s7,0x20 + 800025ac: 02055613 srl a2,a0,0x20 + 800025b0: 02000593 li a1,32 + 800025b4: 8522 mv a0,s0 + 800025b6: 8916 mv s2,t0 + 800025b8: 84c6 mv s1,a7 + 800025ba: 8b1e mv s6,t2 + 800025bc: 00000097 auipc ra,0x0 + 800025c0: 62e080e7 jalr 1582(ra) # 80002bea + 800025c4: 07800093 li ra,120 + 800025c8: 03000f93 li t6,48 + 800025cc: 01810f13 add t5,sp,24 + 800025d0: 02d00e93 li t4,45 + 800025d4: 4e09 li t3,2 + 800025d6: 83da mv t2,s6 + 800025d8: 05500313 li t1,85 + 800025dc: 88a6 mv a7,s1 + 800025de: 82ca mv t0,s2 + 800025e0: fffb851b addw a0,s7,-1 + 800025e4: 1502 sll a0,a0,0x20 + 800025e6: 9101 srl a0,a0,0x20 + 800025e8: 9522 add a0,a0,s0 + 800025ea: 00150413 add s0,a0,1 + 800025ee: b305 j 8000230e + 800025f0: 016405b3 add a1,s0,s6 + 800025f4: 4054053b subw a0,s0,t0 + 800025f8: 0165053b addw a0,a0,s6 + 800025fc: 00058023 sb zero,0(a1) + 80002600: 70f6 ld ra,376(sp) + 80002602: 7456 ld s0,368(sp) + 80002604: 74b6 ld s1,360(sp) + 80002606: 7916 ld s2,352(sp) + 80002608: 69f6 ld s3,344(sp) + 8000260a: 6a56 ld s4,336(sp) + 8000260c: 6ab6 ld s5,328(sp) + 8000260e: 6b16 ld s6,320(sp) + 80002610: 7bf2 ld s7,312(sp) + 80002612: 7c52 ld s8,304(sp) + 80002614: 7cb2 ld s9,296(sp) + 80002616: 7d12 ld s10,288(sp) + 80002618: 6df2 ld s11,280(sp) + 8000261a: 615d add sp,sp,432 + 8000261c: 8082 ret + +000000008000261e : + 8000261e: 7119 add sp,sp,-128 + 80002620: fc86 sd ra,120(sp) + 80002622: f8a2 sd s0,112(sp) + 80002624: 0100 add s0,sp,128 + 80002626: fc017113 and sp,sp,-64 + 8000262a: 000005b7 lui a1,0x0 + 8000262e: 00458633 add a2,a1,tp + 80002632: 04062683 lw a3,64(a2) + 80002636: 0016859b addw a1,a3,1 + 8000263a: fc058713 add a4,a1,-64 # ffffffffffffffc0 <_tbss_end+0xffffffff7ffebffc> + 8000263e: 00173713 seqz a4,a4 + 80002642: 04b62023 sw a1,64(a2) + 80002646: ff650613 add a2,a0,-10 + 8000264a: 00163613 seqz a2,a2 + 8000264e: 8f51 or a4,a4,a2 + 80002650: 00000637 lui a2,0x0 + 80002654: 00460633 add a2,a2,tp + 80002658: 00060613 mv a2,a2 + 8000265c: 96b2 add a3,a3,a2 + 8000265e: 00a68023 sb a0,0(a3) + 80002662: c329 beqz a4,800026a4 + 80002664: 04000513 li a0,64 + 80002668: e02a sd a0,0(sp) + 8000266a: 4505 li a0,1 + 8000266c: e42a sd a0,8(sp) + 8000266e: e832 sd a2,16(sp) + 80002670: ec2e sd a1,24(sp) + 80002672: 0330000f fence rw,rw + 80002676: fffff517 auipc a0,0xfffff + 8000267a: 98a50513 add a0,a0,-1654 # 80001000 + 8000267e: 858a mv a1,sp + 80002680: e10c sd a1,0(a0) + 80002682: fffff517 auipc a0,0xfffff + 80002686: 9be50513 add a0,a0,-1602 # 80001040 + 8000268a: 610c ld a1,0(a0) + 8000268c: ddfd beqz a1,8000268a + 8000268e: 00053023 sd zero,0(a0) + 80002692: 0330000f fence rw,rw + 80002696: 6502 ld a0,0(sp) + 80002698: 00000537 lui a0,0x0 + 8000269c: 00450533 add a0,a0,tp + 800026a0: 04052023 sw zero,64(a0) # 40 + 800026a4: 4501 li a0,0 + 800026a6: f8040113 add sp,s0,-128 + 800026aa: 70e6 ld ra,120(sp) + 800026ac: 7446 ld s0,112(sp) + 800026ae: 6109 add sp,sp,128 + 800026b0: 8082 ret + +00000000800026b2 : + 800026b2: 7131 add sp,sp,-192 + 800026b4: fd06 sd ra,184(sp) + 800026b6: f922 sd s0,176(sp) + 800026b8: 0180 add s0,sp,192 + 800026ba: fc017113 and sp,sp,-64 + 800026be: 00f57693 and a3,a0,15 + 800026c2: 03000593 li a1,48 + 800026c6: 4629 li a2,10 + 800026c8: 03000713 li a4,48 + 800026cc: 00c6e463 bltu a3,a2,800026d4 + 800026d0: 05700713 li a4,87 + 800026d4: 9eb9 addw a3,a3,a4 + 800026d6: 02d10f23 sb a3,62(sp) + 800026da: 00455693 srl a3,a0,0x4 + 800026de: 8abd and a3,a3,15 + 800026e0: 03000713 li a4,48 + 800026e4: 00c6e463 bltu a3,a2,800026ec + 800026e8: 05700713 li a4,87 + 800026ec: 9eb9 addw a3,a3,a4 + 800026ee: 02d10ea3 sb a3,61(sp) + 800026f2: 00855693 srl a3,a0,0x8 + 800026f6: 8abd and a3,a3,15 + 800026f8: 03000713 li a4,48 + 800026fc: 00c6e463 bltu a3,a2,80002704 + 80002700: 05700713 li a4,87 + 80002704: 9eb9 addw a3,a3,a4 + 80002706: 02d10e23 sb a3,60(sp) + 8000270a: 00c55693 srl a3,a0,0xc + 8000270e: 8abd and a3,a3,15 + 80002710: 03000713 li a4,48 + 80002714: 00c6e463 bltu a3,a2,8000271c + 80002718: 05700713 li a4,87 + 8000271c: 9eb9 addw a3,a3,a4 + 8000271e: 02d10da3 sb a3,59(sp) + 80002722: 01055693 srl a3,a0,0x10 + 80002726: 8abd and a3,a3,15 + 80002728: 03000713 li a4,48 + 8000272c: 00c6e463 bltu a3,a2,80002734 + 80002730: 05700713 li a4,87 + 80002734: 9eb9 addw a3,a3,a4 + 80002736: 02d10d23 sb a3,58(sp) + 8000273a: 01455693 srl a3,a0,0x14 + 8000273e: 8abd and a3,a3,15 + 80002740: 03000713 li a4,48 + 80002744: 00c6e463 bltu a3,a2,8000274c + 80002748: 05700713 li a4,87 + 8000274c: 9eb9 addw a3,a3,a4 + 8000274e: 02d10ca3 sb a3,57(sp) + 80002752: 01855693 srl a3,a0,0x18 + 80002756: 8abd and a3,a3,15 + 80002758: 03000713 li a4,48 + 8000275c: 00c6e463 bltu a3,a2,80002764 + 80002760: 05700713 li a4,87 + 80002764: 9eb9 addw a3,a3,a4 + 80002766: 02d10c23 sb a3,56(sp) + 8000276a: 01c5569b srlw a3,a0,0x1c + 8000276e: 03000713 li a4,48 + 80002772: 00c6e463 bltu a3,a2,8000277a + 80002776: 05700713 li a4,87 + 8000277a: 9eb9 addw a3,a3,a4 + 8000277c: 02d10ba3 sb a3,55(sp) + 80002780: 02055693 srl a3,a0,0x20 + 80002784: 8abd and a3,a3,15 + 80002786: 03000713 li a4,48 + 8000278a: 00c6e463 bltu a3,a2,80002792 + 8000278e: 05700713 li a4,87 + 80002792: 9eb9 addw a3,a3,a4 + 80002794: 02d10b23 sb a3,54(sp) + 80002798: 02455693 srl a3,a0,0x24 + 8000279c: 8abd and a3,a3,15 + 8000279e: 03000713 li a4,48 + 800027a2: 00c6e463 bltu a3,a2,800027aa + 800027a6: 05700713 li a4,87 + 800027aa: 9eb9 addw a3,a3,a4 + 800027ac: 02d10aa3 sb a3,53(sp) + 800027b0: 02855693 srl a3,a0,0x28 + 800027b4: 8abd and a3,a3,15 + 800027b6: 03000713 li a4,48 + 800027ba: 00c6e463 bltu a3,a2,800027c2 + 800027be: 05700713 li a4,87 + 800027c2: 9eb9 addw a3,a3,a4 + 800027c4: 02d10a23 sb a3,52(sp) + 800027c8: 02c55693 srl a3,a0,0x2c + 800027cc: 8abd and a3,a3,15 + 800027ce: 03000713 li a4,48 + 800027d2: 00c6e463 bltu a3,a2,800027da + 800027d6: 05700713 li a4,87 + 800027da: 9eb9 addw a3,a3,a4 + 800027dc: 02d109a3 sb a3,51(sp) + 800027e0: 03055693 srl a3,a0,0x30 + 800027e4: 8abd and a3,a3,15 + 800027e6: 03000713 li a4,48 + 800027ea: 00c6e463 bltu a3,a2,800027f2 + 800027ee: 05700713 li a4,87 + 800027f2: 9eb9 addw a3,a3,a4 + 800027f4: 02d10923 sb a3,50(sp) + 800027f8: 03455693 srl a3,a0,0x34 + 800027fc: 8abd and a3,a3,15 + 800027fe: 03000713 li a4,48 + 80002802: 00c6e463 bltu a3,a2,8000280a + 80002806: 05700713 li a4,87 + 8000280a: 9eb9 addw a3,a3,a4 + 8000280c: 02d108a3 sb a3,49(sp) + 80002810: 03855693 srl a3,a0,0x38 + 80002814: 8abd and a3,a3,15 + 80002816: 03000713 li a4,48 + 8000281a: 00c6e463 bltu a3,a2,80002822 + 8000281e: 05700713 li a4,87 + 80002822: 00d7063b addw a2,a4,a3 + 80002826: 02c10823 sb a2,48(sp) + 8000282a: 03d55613 srl a2,a0,0x3d + 8000282e: 4695 li a3,5 + 80002830: 9171 srl a0,a0,0x3c + 80002832: 00d66463 bltu a2,a3,8000283a + 80002836: 05700593 li a1,87 + 8000283a: 952e add a0,a0,a1 + 8000283c: 02a107a3 sb a0,47(sp) + 80002840: 02010fa3 sb zero,63(sp) + 80002844: c901 beqz a0,80002854 + 80002846: 02f10513 add a0,sp,47 + 8000284a: 00154583 lbu a1,1(a0) + 8000284e: 0505 add a0,a0,1 + 80002850: fded bnez a1,8000284a + 80002852: a019 j 80002858 + 80002854: 02f10513 add a0,sp,47 + 80002858: 02f10593 add a1,sp,47 + 8000285c: 8d0d sub a0,a0,a1 + 8000285e: 04000613 li a2,64 + 80002862: e0b2 sd a2,64(sp) + 80002864: 4605 li a2,1 + 80002866: e4b2 sd a2,72(sp) + 80002868: e8ae sd a1,80(sp) + 8000286a: ecaa sd a0,88(sp) + 8000286c: 0330000f fence rw,rw + 80002870: ffffe517 auipc a0,0xffffe + 80002874: 79050513 add a0,a0,1936 # 80001000 + 80002878: 008c add a1,sp,64 + 8000287a: e10c sd a1,0(a0) + 8000287c: ffffe517 auipc a0,0xffffe + 80002880: 7c450513 add a0,a0,1988 # 80001040 + 80002884: 610c ld a1,0(a0) + 80002886: ddfd beqz a1,80002884 + 80002888: 00053023 sd zero,0(a0) + 8000288c: 0330000f fence rw,rw + 80002890: 6506 ld a0,64(sp) + 80002892: f4040113 add sp,s0,-192 + 80002896: 70ea ld ra,184(sp) + 80002898: 744a ld s0,176(sp) + 8000289a: 6129 add sp,sp,192 + 8000289c: 8082 ret + +000000008000289e : + 8000289e: 7121 add sp,sp,-448 + 800028a0: fe86 sd ra,376(sp) + 800028a2: faa2 sd s0,368(sp) + 800028a4: f6a6 sd s1,360(sp) + 800028a6: f2ca sd s2,352(sp) + 800028a8: eece sd s3,344(sp) + 800028aa: ead2 sd s4,336(sp) + 800028ac: e6d6 sd s5,328(sp) + 800028ae: e2da sd s6,320(sp) + 800028b0: fe5e sd s7,312(sp) + 800028b2: fa62 sd s8,304(sp) + 800028b4: f666 sd s9,296(sp) + 800028b6: f26a sd s10,288(sp) + 800028b8: ee6e sd s11,280(sp) + 800028ba: 8b2a mv s6,a0 + 800028bc: ff46 sd a7,440(sp) + 800028be: fb42 sd a6,432(sp) + 800028c0: f73e sd a5,424(sp) + 800028c2: f33a sd a4,416(sp) + 800028c4: ef36 sd a3,408(sp) + 800028c6: eb32 sd a2,400(sp) + 800028c8: e72e sd a1,392(sp) + 800028ca: 032c add a1,sp,392 + 800028cc: 0328 add a0,sp,392 + 800028ce: e42a sd a0,8(sp) + 800028d0: e82e sd a1,16(sp) + 800028d2: 02500993 li s3,37 + 800028d6: 05500493 li s1,85 + 800028da: 00001a97 auipc s5,0x1 + 800028de: 916a8a93 add s5,s5,-1770 # 800031f0 + 800028e2: 4ba9 li s7,10 + 800028e4: 0f600c13 li s8,246 + 800028e8: 01810d13 add s10,sp,24 + 800028ec: 4da5 li s11,9 + 800028ee: 4905 li s2,1 + 800028f0: 001b0413 add s0,s6,1 + 800028f4: fff44503 lbu a0,-1(s0) + 800028f8: 28050063 beqz a0,80002b78 + 800028fc: 01350b63 beq a0,s3,80002912 + 80002900: 00000097 auipc ra,0x0 + 80002904: d1e080e7 jalr -738(ra) # 8000261e + 80002908: 0405 add s0,s0,1 + 8000290a: fff44503 lbu a0,-1(s0) + 8000290e: f57d bnez a0,800028fc + 80002910: a4a5 j 80002b78 + 80002912: 4501 li a0,0 + 80002914: 02000793 li a5,32 + 80002918: 5cfd li s9,-1 + 8000291a: 5a7d li s4,-1 + 8000291c: 8b22 mv s6,s0 + 8000291e: 000b4583 lbu a1,0(s6) + 80002922: fdd58693 add a3,a1,-35 + 80002926: 04d4ef63 bltu s1,a3,80002984 + 8000292a: 865a mv a2,s6 + 8000292c: 068e sll a3,a3,0x3 + 8000292e: 96d6 add a3,a3,s5 + 80002930: 6294 ld a3,0(a3) + 80002932: 0b05 add s6,s6,1 + 80002934: 8682 jr a3 + 80002936: 4c81 li s9,0 + 80002938: 0ff5f693 zext.b a3,a1 + 8000293c: 00164583 lbu a1,1(a2) # 1 + 80002940: 0605 add a2,a2,1 + 80002942: 037c873b mulw a4,s9,s7 + 80002946: 9eb9 addw a3,a3,a4 + 80002948: fc65871b addw a4,a1,-58 + 8000294c: 0ff77713 zext.b a4,a4 + 80002950: fd068c9b addw s9,a3,-48 + 80002954: ff8772e3 bgeu a4,s8,80002938 + 80002958: 8b32 mv s6,a2 + 8000295a: fc0a52e3 bgez s4,8000291e + 8000295e: 8a66 mv s4,s9 + 80002960: 5cfd li s9,-1 + 80002962: bf75 j 8000291e + 80002964: 87ae mv a5,a1 + 80002966: bf65 j 8000291e + 80002968: 65a2 ld a1,8(sp) + 8000296a: 0005ac83 lw s9,0(a1) + 8000296e: 05a1 add a1,a1,8 + 80002970: e42e sd a1,8(sp) + 80002972: fa0a56e3 bgez s4,8000291e + 80002976: b7e5 j 8000295e + 80002978: fb4043e3 bgtz s4,8000291e + 8000297c: 4a01 li s4,0 + 8000297e: b745 j 8000291e + 80002980: 2505 addw a0,a0,1 + 80002982: bf71 j 8000291e + 80002984: 02500513 li a0,37 + 80002988: 00000097 auipc ra,0x0 + 8000298c: c96080e7 jalr -874(ra) # 8000261e + 80002990: 8b22 mv s6,s0 + 80002992: bfb9 j 800028f0 + 80002994: 02500513 li a0,37 + 80002998: 00000097 auipc ra,0x0 + 8000299c: c86080e7 jalr -890(ra) # 8000261e + 800029a0: bf81 j 800028f0 + 800029a2: 65a2 ld a1,8(sp) + 800029a4: 4188 lw a0,0(a1) + 800029a6: 00858413 add s0,a1,8 + 800029aa: 00000097 auipc ra,0x0 + 800029ae: c74080e7 jalr -908(ra) # 8000261e + 800029b2: e422 sd s0,8(sp) + 800029b4: bf35 j 800028f0 + 800029b6: 4589 li a1,2 + 800029b8: 00b55463 bge a0,a1,800029c0 + 800029bc: 1a050863 beqz a0,80002b6c + 800029c0: 6522 ld a0,8(sp) + 800029c2: 6100 ld s0,0(a0) + 800029c4: 4ca9 li s9,10 + 800029c6: 0c045563 bgez s0,80002a90 + 800029ca: 02d00513 li a0,45 + 800029ce: 84be mv s1,a5 + 800029d0: 00000097 auipc ra,0x0 + 800029d4: c4e080e7 jalr -946(ra) # 8000261e + 800029d8: 87a6 mv a5,s1 + 800029da: 40800433 neg s0,s0 + 800029de: a84d j 80002a90 + 800029e0: 4ca1 li s9,8 + 800029e2: 4589 li a1,2 + 800029e4: 0ab54363 blt a0,a1,80002a8a + 800029e8: a055 j 80002a8c + 800029ea: 03000513 li a0,48 + 800029ee: 843e mv s0,a5 + 800029f0: 00000097 auipc ra,0x0 + 800029f4: c2e080e7 jalr -978(ra) # 8000261e + 800029f8: 07800513 li a0,120 + 800029fc: 00000097 auipc ra,0x0 + 80002a00: c22080e7 jalr -990(ra) # 8000261e + 80002a04: 87a2 mv a5,s0 + 80002a06: 4cc1 li s9,16 + 80002a08: a051 j 80002a8c + 80002a0a: 6522 ld a0,8(sp) + 80002a0c: 6118 ld a4,0(a0) + 80002a0e: e709 bnez a4,80002a18 + 80002a10: 00001717 auipc a4,0x1 + 80002a14: ada70713 add a4,a4,-1318 # 800034ea + 80002a18: 01402533 sgtz a0,s4 + 80002a1c: 0ff7f493 zext.b s1,a5 + 80002a20: fd348593 add a1,s1,-45 + 80002a24: 00b035b3 snez a1,a1 + 80002a28: 8d6d and a0,a0,a1 + 80002a2a: c565 beqz a0,80002b12 + 80002a2c: 853a mv a0,a4 + 80002a2e: 000c8d63 beqz s9,80002a48 + 80002a32: 019705b3 add a1,a4,s9 + 80002a36: 8666 mv a2,s9 + 80002a38: 853a mv a0,a4 + 80002a3a: 00054683 lbu a3,0(a0) + 80002a3e: c689 beqz a3,80002a48 + 80002a40: 167d add a2,a2,-1 + 80002a42: 0505 add a0,a0,1 + 80002a44: fa7d bnez a2,80002a3a + 80002a46: 852e mv a0,a1 + 80002a48: 40a7053b subw a0,a4,a0 + 80002a4c: 00aa0a3b addw s4,s4,a0 + 80002a50: 0d405163 blez s4,80002b12 + 80002a54: e03a sd a4,0(sp) + 80002a56: 8452 mv s0,s4 + 80002a58: 8526 mv a0,s1 + 80002a5a: 00000097 auipc ra,0x0 + 80002a5e: bc4080e7 jalr -1084(ra) # 8000261e + 80002a62: 3a7d addw s4,s4,-1 + 80002a64: fe8969e3 bltu s2,s0,80002a56 + 80002a68: 4a01 li s4,0 + 80002a6a: 05500493 li s1,85 + 80002a6e: 6702 ld a4,0(sp) + 80002a70: 00074503 lbu a0,0(a4) + 80002a74: e545 bnez a0,80002b1c + 80002a76: a0f9 j 80002b44 + 80002a78: 4ca9 li s9,10 + 80002a7a: 4589 li a1,2 + 80002a7c: 00b54763 blt a0,a1,80002a8a + 80002a80: a031 j 80002a8c + 80002a82: 4cc1 li s9,16 + 80002a84: 4589 li a1,2 + 80002a86: 00b55363 bge a0,a1,80002a8c + 80002a8a: cd69 beqz a0,80002b64 + 80002a8c: 6522 ld a0,8(sp) + 80002a8e: 6100 ld s0,0(a0) + 80002a90: 03947533 remu a0,s0,s9 + 80002a94: cc2a sw a0,24(sp) + 80002a96: 4485 li s1,1 + 80002a98: 01946d63 bltu s0,s9,80002ab2 + 80002a9c: 4485 li s1,1 + 80002a9e: 0868 add a0,sp,28 + 80002aa0: 03945433 divu s0,s0,s9 + 80002aa4: 039475b3 remu a1,s0,s9 + 80002aa8: 0485 add s1,s1,1 + 80002aaa: c10c sw a1,0(a0) + 80002aac: 0511 add a0,a0,4 + 80002aae: ff9479e3 bgeu s0,s9,80002aa0 + 80002ab2: 0004841b sext.w s0,s1 + 80002ab6: 01445c63 bge s0,s4,80002ace + 80002aba: 0ff7fc93 zext.b s9,a5 + 80002abe: 3a7d addw s4,s4,-1 + 80002ac0: 8566 mv a0,s9 + 80002ac2: 00000097 auipc ra,0x0 + 80002ac6: b5c080e7 jalr -1188(ra) # 8000261e + 80002aca: ff444ae3 blt s0,s4,80002abe + 80002ace: 6522 ld a0,8(sp) + 80002ad0: 0521 add a0,a0,8 + 80002ad2: e42a sd a0,8(sp) + 80002ad4: 02049513 sll a0,s1,0x20 + 80002ad8: 02055413 srl s0,a0,0x20 + 80002adc: a819 j 80002af2 + 80002ade: 9d2d addw a0,a0,a1 + 80002ae0: 00000097 auipc ra,0x0 + 80002ae4: b3e080e7 jalr -1218(ra) # 8000261e + 80002ae8: 0004051b sext.w a0,s0 + 80002aec: 147d add s0,s0,-1 + 80002aee: 00a95f63 bge s2,a0,80002b0c + 80002af2: 34fd addw s1,s1,-1 + 80002af4: 02049513 sll a0,s1,0x20 + 80002af8: 8179 srl a0,a0,0x1e + 80002afa: 956a add a0,a0,s10 + 80002afc: 4108 lw a0,0(a0) + 80002afe: 05700593 li a1,87 + 80002b02: fcadeee3 bltu s11,a0,80002ade + 80002b06: 03000593 li a1,48 + 80002b0a: bfd1 j 80002ade + 80002b0c: 05500493 li s1,85 + 80002b10: b3c5 j 800028f0 + 80002b12: 05500493 li s1,85 + 80002b16: 00074503 lbu a0,0(a4) + 80002b1a: c50d beqz a0,80002b44 + 80002b1c: 00170413 add s0,a4,1 + 80002b20: a821 j 80002b38 + 80002b22: 0ff57513 zext.b a0,a0 + 80002b26: 00000097 auipc ra,0x0 + 80002b2a: af8080e7 jalr -1288(ra) # 8000261e + 80002b2e: 00044503 lbu a0,0(s0) + 80002b32: 3a7d addw s4,s4,-1 + 80002b34: 0405 add s0,s0,1 + 80002b36: c519 beqz a0,80002b44 + 80002b38: fe0cc5e3 bltz s9,80002b22 + 80002b3c: 000c8463 beqz s9,80002b44 + 80002b40: 3cfd addw s9,s9,-1 + 80002b42: b7c5 j 80002b22 + 80002b44: 6522 ld a0,8(sp) + 80002b46: 0521 add a0,a0,8 + 80002b48: e42a sd a0,8(sp) + 80002b4a: db4053e3 blez s4,800028f0 + 80002b4e: 8452 mv s0,s4 + 80002b50: 02000513 li a0,32 + 80002b54: 00000097 auipc ra,0x0 + 80002b58: aca080e7 jalr -1334(ra) # 8000261e + 80002b5c: 3a7d addw s4,s4,-1 + 80002b5e: fe8968e3 bltu s2,s0,80002b4e + 80002b62: b379 j 800028f0 + 80002b64: 6522 ld a0,8(sp) + 80002b66: 00056403 lwu s0,0(a0) + 80002b6a: b71d j 80002a90 + 80002b6c: 6522 ld a0,8(sp) + 80002b6e: 4100 lw s0,0(a0) + 80002b70: 4ca9 li s9,10 + 80002b72: f0045fe3 bgez s0,80002a90 + 80002b76: bd91 j 800029ca + 80002b78: 4501 li a0,0 + 80002b7a: 70f6 ld ra,376(sp) + 80002b7c: 7456 ld s0,368(sp) + 80002b7e: 74b6 ld s1,360(sp) + 80002b80: 7916 ld s2,352(sp) + 80002b82: 69f6 ld s3,344(sp) + 80002b84: 6a56 ld s4,336(sp) + 80002b86: 6ab6 ld s5,328(sp) + 80002b88: 6b16 ld s6,320(sp) + 80002b8a: 7bf2 ld s7,312(sp) + 80002b8c: 7c52 ld s8,304(sp) + 80002b8e: 7cb2 ld s9,296(sp) + 80002b90: 7d12 ld s10,288(sp) + 80002b92: 6df2 ld s11,280(sp) + 80002b94: 6139 add sp,sp,448 + 80002b96: 8082 ret + +0000000080002b98 : + 80002b98: 6190 ld a2,0(a1) + 80002b9a: 00a60023 sb a0,0(a2) + 80002b9e: 6188 ld a0,0(a1) + 80002ba0: 0505 add a0,a0,1 + 80002ba2: e188 sd a0,0(a1) + 80002ba4: 8082 ret + +0000000080002ba6 : + 80002ba6: 00a5e6b3 or a3,a1,a0 + 80002baa: 8ed1 or a3,a3,a2 + 80002bac: 0076f713 and a4,a3,7 + 80002bb0: 00c506b3 add a3,a0,a2 + 80002bb4: cf19 beqz a4,80002bd2 + 80002bb6: 02d57963 bgeu a0,a3,80002be8 + 80002bba: 86aa mv a3,a0 + 80002bbc: 00058703 lb a4,0(a1) + 80002bc0: 0585 add a1,a1,1 + 80002bc2: 00168793 add a5,a3,1 + 80002bc6: 167d add a2,a2,-1 + 80002bc8: 00e68023 sb a4,0(a3) + 80002bcc: 86be mv a3,a5 + 80002bce: f67d bnez a2,80002bbc + 80002bd0: a821 j 80002be8 + 80002bd2: 00d57b63 bgeu a0,a3,80002be8 + 80002bd6: 862a mv a2,a0 + 80002bd8: 6198 ld a4,0(a1) + 80002bda: 05a1 add a1,a1,8 + 80002bdc: 00860793 add a5,a2,8 + 80002be0: e218 sd a4,0(a2) + 80002be2: 863e mv a2,a5 + 80002be4: fed7eae3 bltu a5,a3,80002bd8 + 80002be8: 8082 ret + +0000000080002bea : + 80002bea: 00c566b3 or a3,a0,a2 + 80002bee: 8a9d and a3,a3,7 + 80002bf0: ce91 beqz a3,80002c0c + 80002bf2: 00c506b3 add a3,a0,a2 + 80002bf6: 04d57063 bgeu a0,a3,80002c36 + 80002bfa: 86aa mv a3,a0 + 80002bfc: 00168713 add a4,a3,1 + 80002c00: 167d add a2,a2,-1 + 80002c02: 00b68023 sb a1,0(a3) + 80002c06: 86ba mv a3,a4 + 80002c08: fa75 bnez a2,80002bfc + 80002c0a: a035 j 80002c36 + 80002c0c: 962a add a2,a2,a0 + 80002c0e: 02c57463 bgeu a0,a2,80002c36 + 80002c12: 0ff5f593 zext.b a1,a1 + 80002c16: 010106b7 lui a3,0x1010 + 80002c1a: 1016869b addw a3,a3,257 # 1010101 + 80002c1e: 02d585b3 mul a1,a1,a3 + 80002c22: 02059693 sll a3,a1,0x20 + 80002c26: 8dd5 or a1,a1,a3 + 80002c28: 86aa mv a3,a0 + 80002c2a: 00868713 add a4,a3,8 + 80002c2e: e28c sd a1,0(a3) + 80002c30: 86ba mv a3,a4 + 80002c32: fec76ce3 bltu a4,a2,80002c2a + 80002c36: 8082 ret + +0000000080002c38 : + 80002c38: 862a mv a2,a0 + 80002c3a: c999 beqz a1,80002c50 + 80002c3c: 00b506b3 add a3,a0,a1 + 80002c40: 862a mv a2,a0 + 80002c42: 00064703 lbu a4,0(a2) + 80002c46: c709 beqz a4,80002c50 + 80002c48: 15fd add a1,a1,-1 + 80002c4a: 0605 add a2,a2,1 + 80002c4c: f9fd bnez a1,80002c42 + 80002c4e: 8636 mv a2,a3 + 80002c50: 40a60533 sub a0,a2,a0 + 80002c54: 8082 ret + +0000000080002c56 : + 80002c56: 00054603 lbu a2,0(a0) + 80002c5a: 0005c683 lbu a3,0(a1) + 80002c5e: 0505 add a0,a0,1 + 80002c60: 0585 add a1,a1,1 + 80002c62: 00c03733 snez a4,a2 + 80002c66: 00d647b3 xor a5,a2,a3 + 80002c6a: 0017b793 seqz a5,a5 + 80002c6e: 8f7d and a4,a4,a5 + 80002c70: f37d bnez a4,80002c56 + 80002c72: 40d60533 sub a0,a2,a3 + 80002c76: 8082 ret + +0000000080002c78 : + 80002c78: 4601 li a2,0 + 80002c7a: 00c586b3 add a3,a1,a2 + 80002c7e: 0006c683 lbu a3,0(a3) + 80002c82: 00c50733 add a4,a0,a2 + 80002c86: 00d70023 sb a3,0(a4) + 80002c8a: 0605 add a2,a2,1 + 80002c8c: f6fd bnez a3,80002c7a + 80002c8e: 8082 ret + +0000000080002c90 : + 80002c90: 00150613 add a2,a0,1 + 80002c94: 02000513 li a0,32 + 80002c98: fff64583 lbu a1,-1(a2) + 80002c9c: 00a59763 bne a1,a0,80002caa + 80002ca0: 0605 add a2,a2,1 + 80002ca2: fff64583 lbu a1,-1(a2) + 80002ca6: fea58de3 beq a1,a0,80002ca0 + 80002caa: 02b00513 li a0,43 + 80002cae: 00a58663 beq a1,a0,80002cba + 80002cb2: 02d00513 li a0,45 + 80002cb6: 00a59b63 bne a1,a0,80002ccc + 80002cba: fd358513 add a0,a1,-45 + 80002cbe: 00064583 lbu a1,0(a2) + 80002cc2: 00153693 seqz a3,a0 + 80002cc6: 4501 li a0,0 + 80002cc8: e591 bnez a1,80002cd4 + 80002cca: a015 j 80002cee + 80002ccc: 4681 li a3,0 + 80002cce: 167d add a2,a2,-1 + 80002cd0: 4501 li a0,0 + 80002cd2: cd91 beqz a1,80002cee + 80002cd4: 0605 add a2,a2,1 + 80002cd6: 4729 li a4,10 + 80002cd8: 0ff5f793 zext.b a5,a1 + 80002cdc: 00064583 lbu a1,0(a2) + 80002ce0: 02e50533 mul a0,a0,a4 + 80002ce4: 953e add a0,a0,a5 + 80002ce6: fd050513 add a0,a0,-48 + 80002cea: 0605 add a2,a2,1 + 80002cec: f5f5 bnez a1,80002cd8 + 80002cee: c299 beqz a3,80002cf4 + 80002cf0: 40a00533 neg a0,a0 + 80002cf4: 8082 ret + ... + +0000000080002cf8
: + 80002cf8: 7135 add sp,sp,-160 + 80002cfa: ed06 sd ra,152(sp) + 80002cfc: e922 sd s0,144(sp) + 80002cfe: e526 sd s1,136(sp) + 80002d00: e14a sd s2,128(sp) + 80002d02: fcce sd s3,120(sp) + 80002d04: f8d2 sd s4,112(sp) + 80002d06: f4d6 sd s5,104(sp) + 80002d08: f0da sd s6,96(sp) + 80002d0a: ecde sd s7,88(sp) + 80002d0c: e8e2 sd s8,80(sp) + 80002d0e: e4e6 sd s9,72(sp) + 80002d10: e0ea sd s10,64(sp) + 80002d12: fc6e sd s11,56(sp) + 80002d14: b822 fsd fs0,48(sp) + 80002d16: 4501 li a0,0 + 80002d18: 4581 li a1,0 + 80002d1a: 6299 lui t0,0x6 + 80002d1c: 3002a073 csrs mstatus,t0 + 80002d20: 00001c17 auipc s8,0x1 + 80002d24: 918c0c13 add s8,s8,-1768 # 80003638 + 80002d28: 10000613 li a2,256 + 80002d2c: 018506b3 add a3,a0,s8 + 80002d30: 00b68023 sb a1,0(a3) + 80002d34: 0505 add a0,a0,1 + 80002d36: 2585 addw a1,a1,1 + 80002d38: fec51ae3 bne a0,a2,80002d2c + 80002d3c: 00000517 auipc a0,0x0 + 80002d40: 7b550513 add a0,a0,1973 # 800034f1 + 80002d44: 45a9 li a1,10 + 80002d46: 00000097 auipc ra,0x0 + 80002d4a: b58080e7 jalr -1192(ra) # 8000289e + 80002d4e: 4901 li s2,0 + 80002d50: 4581 li a1,0 + 80002d52: 00000997 auipc s3,0x0 + 80002d56: 7e698993 add s3,s3,2022 # 80003538 + 80002d5a: 00011517 auipc a0,0x11 + 80002d5e: a1650513 add a0,a0,-1514 # 80013770 + 80002d62: e42a sd a0,8(sp) + 80002d64: 00001517 auipc a0,0x1 + 80002d68: a0850513 add a0,a0,-1528 # 8000376c + 80002d6c: f42a sd a0,40(sp) + 80002d6e: 00001517 auipc a0,0x1 + 80002d72: 9d250513 add a0,a0,-1582 # 80003740 + 80002d76: f02a sd a0,32(sp) + 80002d78: 00001d17 auipc s10,0x1 + 80002d7c: 9f0d0d13 add s10,s10,-1552 # 80003768 + 80002d80: 00001d97 auipc s11,0x1 + 80002d84: 9b8d8d93 add s11,s11,-1608 # 80003738 + 80002d88: 00001b17 auipc s6,0x1 + 80002d8c: 9e8b0b13 add s6,s6,-1560 # 80003770 + 80002d90: f0000453 fmv.w.x fs0,zero + 80002d94: 00000417 auipc s0,0x0 + 80002d98: 79340413 add s0,s0,1939 # 80003527 + 80002d9c: 00000497 auipc s1,0x0 + 80002da0: 76b48493 add s1,s1,1899 # 80003507 + 80002da4: 04000b93 li s7,64 + 80002da8: 10000613 li a2,256 + 80002dac: 854e mv a0,s3 + 80002dae: e82e sd a1,16(sp) + 80002db0: 00000097 auipc ra,0x0 + 80002db4: e3a080e7 jalr -454(ra) # 80002bea + 80002db8: 4a81 li s5,0 + 80002dba: ec4a sd s2,24(sp) + 80002dbc: 00391513 sll a0,s2,0x3 + 80002dc0: 65a2 ld a1,8(sp) + 80002dc2: 00b50933 add s2,a0,a1 + 80002dc6: 8a62 mv s4,s8 + 80002dc8: 7502 ld a0,32(sp) + 80002dca: 6108 ld a0,0(a0) + 80002dcc: 000da583 lw a1,0(s11) + 80002dd0: 000d2603 lw a2,0(s10) + 80002dd4: 76a2 ld a3,40(sp) + 80002dd6: 4294 lw a3,0(a3) + 80002dd8: 006a9713 sll a4,s5,0x6 + 80002ddc: 8ce2 mv s9,s8 + 80002dde: 9762 add a4,a4,s8 + 80002de0: 6599 lui a1,0x6 + 80002de2: 2005859b addw a1,a1,512 # 6200 + 80002de6: 30002673 csrr a2,mstatus + 80002dea: 76e9 lui a3,0xffffa + 80002dec: 9ff6869b addw a3,a3,-1537 # ffffffffffff99ff <_tbss_end+0xffffffff7ffe5a3b> + 80002df0: 8e75 and a2,a2,a3 + 80002df2: 8e4d or a2,a2,a1 + 80002df4: c110 sw a2,0(a0) + 80002df6: 30061073 csrw mstatus,a2 + 80002dfa: 20000593 li a1,512 + 80002dfe: 0c05f5d7 vsetvli a1,a1,e8,m1,ta,ma + 80002e02: 02098087 vle8.v v1,(s3) + 80002e06: 02070107 vle8.v v2,(a4) + 80002e0a: 00093407 fld fs0,0(s2) + 80002e0e: 4501 li a0,0 + 80002e10: cd19 beqz a0,80002e2e + 80002e12: 4505 li a0,1 + 80002e14: cd19 beqz a0,80002e32 + 80002e16: 4509 li a0,2 + 80002e18: cd19 beqz a0,80002e36 + 80002e1a: 450d li a0,3 + 80002e1c: cd19 beqz a0,80002e3a + 80002e1e: 4511 li a0,4 + 80002e20: cd19 beqz a0,80002e3e + 80002e22: 4515 li a0,5 + 80002e24: cd19 beqz a0,80002e42 + 80002e26: 4519 li a0,6 + 80002e28: cd09 beqz a0,80002e42 + 80002e2a: 451d li a0,7 + 80002e2c: c919 beqz a0,80002e42 + +0000000080002e2e : + 80002e2e: 021111d7 vfadd.vv v3,v1,v2 + +0000000080002e32 : + 80002e32: 0a1111d7 vfsub.vv v3,v1,v2 + +0000000080002e36 : + 80002e36: 921111d7 vfmul.vv v3,v1,v2 + +0000000080002e3a : + 80002e3a: 821111d7 vfdiv.vv v3,v1,v2 + +0000000080002e3e : + 80002e3e: 022451d7 vfadd.vf v3,v2,fs0 + +0000000080002e42 : + 80002e42: 020b01a7 vse8.v v3,(s6) + 80002e46: 4c01 li s8,0 + 80002e48: 013c0533 add a0,s8,s3 + 80002e4c: 00054603 lbu a2,0(a0) + 80002e50: 018a0533 add a0,s4,s8 + 80002e54: 00054683 lbu a3,0(a0) + 80002e58: 016c0533 add a0,s8,s6 + 80002e5c: 00054703 lbu a4,0(a0) + 80002e60: 8522 mv a0,s0 + 80002e62: 85a6 mv a1,s1 + 80002e64: 00000097 auipc ra,0x0 + 80002e68: a3a080e7 jalr -1478(ra) # 8000289e + 80002e6c: 0c05 add s8,s8,1 + 80002e6e: fd7c1de3 bne s8,s7,80002e48 + 80002e72: 0a85 add s5,s5,1 + 80002e74: 040a0a13 add s4,s4,64 + 80002e78: 8c66 mv s8,s9 + 80002e7a: 4511 li a0,4 + 80002e7c: f4aa96e3 bne s5,a0,80002dc8 + 80002e80: 6962 ld s2,24(sp) + 80002e82: 0905 add s2,s2,1 + 80002e84: 65c2 ld a1,16(sp) + 80002e86: 2585 addw a1,a1,1 + 80002e88: 10000513 li a0,256 + 80002e8c: f0a91ee3 bne s2,a0,80002da8 + 80002e90: 4501 li a0,0 + 80002e92: 60ea ld ra,152(sp) + 80002e94: 644a ld s0,144(sp) + 80002e96: 64aa ld s1,136(sp) + 80002e98: 690a ld s2,128(sp) + 80002e9a: 79e6 ld s3,120(sp) + 80002e9c: 7a46 ld s4,112(sp) + 80002e9e: 7aa6 ld s5,104(sp) + 80002ea0: 7b06 ld s6,96(sp) + 80002ea2: 6be6 ld s7,88(sp) + 80002ea4: 6c46 ld s8,80(sp) + 80002ea6: 6ca6 ld s9,72(sp) + 80002ea8: 6d06 ld s10,64(sp) + 80002eaa: 7de2 ld s11,56(sp) + 80002eac: 3442 fld fs0,48(sp) + 80002eae: 610d add sp,sp,160 + 80002eb0: 8082 ret + +0000000080002eb2 : + 80002eb2: 7139 add sp,sp,-64 + 80002eb4: fc06 sd ra,56(sp) + 80002eb6: f822 sd s0,48(sp) + 80002eb8: f426 sd s1,40(sp) + 80002eba: f04a sd s2,32(sp) + 80002ebc: ec4e sd s3,24(sp) + 80002ebe: e852 sd s4,16(sp) + 80002ec0: e456 sd s5,8(sp) + 80002ec2: fff7871b addw a4,a5,-1 + 80002ec6: 4789 li a5,2 + 80002ec8: 8932 mv s2,a2 + 80002eca: 8aae mv s5,a1 + 80002ecc: 842a mv s0,a0 + 80002ece: 00e7ee63 bltu a5,a4,80002eea + 80002ed2: 00371513 sll a0,a4,0x3 + 80002ed6: 00000597 auipc a1,0x0 + 80002eda: 5ca58593 add a1,a1,1482 # 800034a0 + 80002ede: 952e add a0,a0,a1 + 80002ee0: 00053983 ld s3,0(a0) + 80002ee4: 00d04963 bgtz a3,80002ef6 + 80002ee8: a081 j 80002f28 + 80002eea: 00000997 auipc s3,0x0 + 80002eee: 61d98993 add s3,s3,1565 # 80003507 + 80002ef2: 02d05b63 blez a3,80002f28 + 80002ef6: 02069513 sll a0,a3,0x20 + 80002efa: 02055493 srl s1,a0,0x20 + 80002efe: 00000a17 auipc s4,0x0 + 80002f02: 629a0a13 add s4,s4,1577 # 80003527 + 80002f06: 00044603 lbu a2,0(s0) + 80002f0a: 000ac683 lbu a3,0(s5) + 80002f0e: 00094703 lbu a4,0(s2) + 80002f12: 8552 mv a0,s4 + 80002f14: 85ce mv a1,s3 + 80002f16: 00000097 auipc ra,0x0 + 80002f1a: 988080e7 jalr -1656(ra) # 8000289e + 80002f1e: 0405 add s0,s0,1 + 80002f20: 0a85 add s5,s5,1 + 80002f22: 14fd add s1,s1,-1 + 80002f24: 0905 add s2,s2,1 + 80002f26: f0e5 bnez s1,80002f06 + 80002f28: 70e2 ld ra,56(sp) + 80002f2a: 7442 ld s0,48(sp) + 80002f2c: 74a2 ld s1,40(sp) + 80002f2e: 7902 ld s2,32(sp) + 80002f30: 69e2 ld s3,24(sp) + 80002f32: 6a42 ld s4,16(sp) + 80002f34: 6aa2 ld s5,8(sp) + 80002f36: 6121 add sp,sp,64 + 80002f38: 8082 ret diff --git a/vfpu/vfpu_old b/vfpu/vfpu_old new file mode 100755 index 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zq1lun3_ssmgtV5mxmHs;NNXW4v&5LyTw>L7UDOJ-XfcGeh55KqqQoVmV8Uq4S!tPt zFh!7-&$b8xnt`-jfLjE`@GA*kY#=WQX0!Xbjo!;a27@%azolk){w6nZftNG-@=^$Y7g>_ePeCvGf)K0Lm| zTnwaec@eh>=LegfS1a*&=_TG<`CNpah6pYnEdb*Ch`Rn`*OfU m?)egYI0L^x0f*n24|QU_A{Gddk;<>Y69e29UJQnw<^K<)*=6AX literal 0 HcmV?d00001 diff --git a/vfpu/vsnrl.c b/vfpu/vsnrl.c new file mode 100755 index 0000000000..ab715e466e --- /dev/null +++ b/vfpu/vsnrl.c @@ -0,0 +1,57 @@ +#include "vdefs.h" + +//vf arr_d1[VLEN] = {4, 0x3f80, 3.9, 1.4125, 5.7}; +//vf arr_d2[VLEN] = {0, 0x3f80, 6.78, 6.4532, 5.7}; +vf arr_d1[VLEN] = {0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff,0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff}; +vf arr_d2[VLEN] = {0, 1, 2, 3, 4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19}; +vf arr_dr[VLEN] = {}; + +void print_res(vf arg1[], vf arg2[], vf arg3[], int len, int* temp_ptr); + +int vl = VLEN; + +int temp = 0; +int mask = 0; + +int* temp_ptr = &temp; + +int main(){ + __asm__("li %[vl], 0x6200;" + "csrr %[temp], mstatus;" + "li %[mask], 0xFFFFFFFFFFFF99FF;" + "and %[temp], %[mask], %[temp];" + "or %[temp], %[vl], %[temp];" + "sw %[temp], (%[temp_ptr]);" + "csrw mstatus, %[temp];" + "li %[vl], 128;" + #if VTYPE == FLOAT_T || VTYPE == INT_T + "vsetvli %[vl], %[vl], e32, m1, ta, ma;" + "vle32.v v0, (%[arr_d1]);" + "vle32.v v2, (%[arr_d2]);" + #elif VTYPE == DOUBLE_T + "vsetvli %[vl], %[vl], e64, m1, ta, ma;" + "vle64.v v0, (%[arr_d1]);" + "vle64.v v2, (%[arr_d2]);" + #elif VTYPE == SHORT_T + "vsetvli %[vl], %[vl], e16, m1, ta, ma;" + "vle16.v v1, (%[arr_d1]);" + "vle16.v v2, (%[arr_d2]);" + #endif + //"vsetvli %[vl], %[vl], e32, m1, ta, ma;" + "vnsra.wv v3, v0, v2;" + + #if VTYPE == FLOAT_T || VTYPE == INT_T + "vse32.v v3, (%[arr_dr]);" + #elif VTYPE == DOUBLE_T + "vse64.v v3, (%[arr_dr]);" + #elif VTYPE == SHORT_T + "vse16.v v3, (%[arr_dr]);" + #endif + : // out + : [mask] "r" (mask), [temp_ptr] "r" (temp_ptr), [temp] "r" (temp), [arr_dr] "r" (&arr_dr), [arr_d1] "r" (arr_d1) , [arr_d2] "r" (arr_d2), [vl] "r" (vl) + : "memory" + ); + print_res(arr_d1, arr_d2, arr_dr, vl, temp_ptr); + + return 0; +} From 1da66855075b7ba458749c01c4eca256fd2b7648 Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 1 Jul 2025 13:11:01 +0200 Subject: [PATCH 10/31] fixed altfp bugs --- riscv/insns/vfmv_s_f.h | 2 +- riscv/processor.cc | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h index 4088afc794..f431208781 100644 --- a/riscv/insns/vfmv_s_f.h +++ b/riscv/insns/vfmv_s_f.h @@ -14,7 +14,7 @@ if (vl > 0 && P.VU.vstart->read() < vl) { switch (P.VU.vsew) { case e8: - if (P.VU.altfp) { + if (!P.VU.altfp) { P.VU.elt(rd_num, 0, true) = f8_1(FRS1).v; break; } else { diff --git a/riscv/processor.cc b/riscv/processor.cc index 454f0f8ba2..79dfc4e04f 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -190,6 +190,10 @@ void processor_t::parse_vfp8_string(const char* s) { else if (strcmp(s, "2") == 0) { VU.altfp = 1; } + else { + fprintf(stderr, "Error: unrecognized FP8 type, only types \"1\" (E4M3) and \"2\" (E5M2) are supported\n"); + exit(1); + } } From 901002095836a680b0e707e183e8909b981e16ec Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 1 Jul 2025 13:12:26 +0200 Subject: [PATCH 11/31] fixed additional altfp bugs --- riscv/v_ext_macros.h | 2 +- riscv/vector_unit.cc | 6 +++++- spike_main/spike.cc | 2 +- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/riscv/v_ext_macros.h b/riscv/v_ext_macros.h index 59ca1d9261..3987c07e69 100644 --- a/riscv/v_ext_macros.h +++ b/riscv/v_ext_macros.h @@ -1598,7 +1598,7 @@ reg_t index[P.VU.vlmax]; \ set_fp_exceptions; \ break; \ } \ - case e8_2: {\ + case e8_2: {\ VFP_VV_PARAMS(8_2); \ BODY8_2; \ set_fp_exceptions; \ diff --git a/riscv/vector_unit.cc b/riscv/vector_unit.cc index d2ef5d3887..e7fd3e29e5 100644 --- a/riscv/vector_unit.cc +++ b/riscv/vector_unit.cc @@ -12,7 +12,7 @@ void vectorUnit_t::vectorUnit_t::reset() ELEN = get_elen(); reg_file = malloc(NVPR * vlenb); memset(reg_file, 0, NVPR * vlenb); - altfp = 0; + int current_altfp = altfp; auto& csrmap = p->get_state()->csrmap; csrmap[CSR_VXSAT] = vxsat = std::make_shared(p, CSR_VXSAT); @@ -25,6 +25,10 @@ void vectorUnit_t::vectorUnit_t::reset() assert(VCSR_VXSAT_SHIFT == 0); // composite_csr_t assumes vxsat begins at bit 0 csrmap[CSR_VCSR] = std::make_shared(p, CSR_VCSR, vxrm, vxsat, VCSR_VXRM_SHIFT); + // Restore altfp CSR state + altfp = current_altfp; + vfp8->write_raw(altfp); + vtype->write_raw(0); set_vl(0, 0, 0, -1); // default to illegal configuration } diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 1ca4e700bb..c99169ccc4 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -46,7 +46,7 @@ static void help(int exit_code = 1) fprintf(stderr, " --pmpgranularity= PMP Granularity in bytes [default 4]\n"); fprintf(stderr, " --priv= RISC-V privilege modes supported [default %s]\n", DEFAULT_PRIV); fprintf(stderr, " --varch= RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH); - fprintf(stderr, " --vfp8=<1|2> Select FP8 format [default %s]\n", DEFAULT_VFP8); + fprintf(stderr, " --vfp8=<1|2> Select FP8 format [default %s]\n", DEFAULT_VFP8); fprintf(stderr, " --pc=
Override ELF entry point\n"); fprintf(stderr, " --hartids= Explicitly specify hartids, default is 0,1,...\n"); fprintf(stderr, " --ic=:: Instantiate a cache model with S sets,\n"); From 9542009a5acc6375d2e4420ae2fc56bf41952d18 Mon Sep 17 00:00:00 2001 From: aesash Date: Thu, 3 Jul 2025 00:14:50 +0200 Subject: [PATCH 12/31] fixed post-merge errors that prevented compilation --- config.h.in | 6 - configure | 1226 ++++++++++++++------------------- riscv/platform.h | 4 +- riscv/riscv.ac | 12 - softfloat_8/softfloat.h | 4 +- softfloat_8/softfloat_8.mk.in | 2 - spike_main/spike.cc | 3 - vfpu/kless_platform.h | 23 + 8 files changed, 553 insertions(+), 727 deletions(-) create mode 100644 vfpu/kless_platform.h diff --git a/config.h.in b/config.h.in index 34ccdbdc8b..922f1cf396 100644 --- a/config.h.in +++ b/config.h.in @@ -6,12 +6,6 @@ /* Define if subproject MCPPBS_SPROJ_NORM is enabled */ #undef CUSTOMEXT_ENABLED -/* Default value for --isa switch */ -#undef DEFAULT_ISA - -/* Default value for --priv switch */ -#undef DEFAULT_PRIV - /* Default value for --varch switch */ #undef DEFAULT_VARCH diff --git a/configure b/configure index 53b1657c7d..02bcecf4f3 100755 --- a/configure +++ b/configure @@ -1,11 +1,11 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.72 for RISC-V ISA Simulator ?. +# Generated by GNU Autoconf 2.71 for RISC-V ISA Simulator ?. # # Report bugs to . # # -# Copyright (C) 1992-1996, 1998-2017, 2020-2023 Free Software Foundation, +# Copyright (C) 1992-1996, 1998-2017, 2020-2021 Free Software Foundation, # Inc. # # @@ -17,6 +17,7 @@ # Be more Bourne compatible DUALCASE=1; export DUALCASE # for MKS sh +as_nop=: if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 then : emulate sh @@ -25,13 +26,12 @@ then : # is contrary to our usage. Disable this feature. alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST -else case e in #( - e) case `(set -o) 2>/dev/null` in #( +else $as_nop + case `(set -o) 2>/dev/null` in #( *posix*) : set -o posix ;; #( *) : ;; -esac ;; esac fi @@ -103,7 +103,7 @@ IFS=$as_save_IFS ;; esac -# We did not find ourselves, most probably we were run as 'sh COMMAND' +# We did not find ourselves, most probably we were run as `sh COMMAND' # in which case we are not to be found in the path. if test "x$as_myself" = x; then as_myself=$0 @@ -133,14 +133,15 @@ case $- in # (((( esac exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} # Admittedly, this is quite paranoid, since all the known shells bail -# out after a failed 'exec'. +# out after a failed `exec'. printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2 exit 255 fi # We don't want this to propagate to other subprocesses. { _as_can_reexec=; unset _as_can_reexec;} if test "x$CONFIG_SHELL" = x; then - as_bourne_compatible="if test \${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 + as_bourne_compatible="as_nop=: +if test \${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 then : emulate sh NULLCMD=: @@ -148,13 +149,12 @@ then : # is contrary to our usage. Disable this feature. alias -g '\${1+\"\$@\"}'='\"\$@\"' setopt NO_GLOB_SUBST -else case e in #( - e) case \`(set -o) 2>/dev/null\` in #( +else \$as_nop + case \`(set -o) 2>/dev/null\` in #( *posix*) : set -o posix ;; #( *) : ;; -esac ;; esac fi " @@ -172,9 +172,8 @@ as_fn_ret_failure && { exitcode=1; echo as_fn_ret_failure succeeded.; } if ( set x; as_fn_ret_success y && test x = \"\$1\" ) then : -else case e in #( - e) exitcode=1; echo positional parameters were not saved. ;; -esac +else \$as_nop + exitcode=1; echo positional parameters were not saved. fi test x\$exitcode = x0 || exit 1 blah=\$(echo \$(echo blah)) @@ -187,15 +186,14 @@ test -x / || exit 1" if (eval "$as_required") 2>/dev/null then : as_have_required=yes -else case e in #( - e) as_have_required=no ;; -esac +else $as_nop + as_have_required=no fi if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null then : -else case e in #( - e) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +else $as_nop + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR as_found=false for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH do @@ -228,13 +226,12 @@ IFS=$as_save_IFS if $as_found then : -else case e in #( - e) if { test -f "$SHELL" || test -f "$SHELL.exe"; } && +else $as_nop + if { test -f "$SHELL" || test -f "$SHELL.exe"; } && as_run=a "$SHELL" -c "$as_bourne_compatible""$as_required" 2>/dev/null then : CONFIG_SHELL=$SHELL as_have_required=yes -fi ;; -esac +fi fi @@ -256,7 +253,7 @@ case $- in # (((( esac exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} # Admittedly, this is quite paranoid, since all the known shells bail -# out after a failed 'exec'. +# out after a failed `exec'. printf "%s\n" "$0: could not re-execute with $CONFIG_SHELL" >&2 exit 255 fi @@ -276,8 +273,7 @@ $0: manually run the script under such a shell if you do $0: have one." fi exit 1 -fi ;; -esac +fi fi fi SHELL=${CONFIG_SHELL-/bin/sh} @@ -316,6 +312,14 @@ as_fn_exit () as_fn_set_status $1 exit $1 } # as_fn_exit +# as_fn_nop +# --------- +# Do nothing but, unlike ":", preserve the value of $?. +as_fn_nop () +{ + return $? +} +as_nop=as_fn_nop # as_fn_mkdir_p # ------------- @@ -384,12 +388,11 @@ then : { eval $1+=\$2 }' -else case e in #( - e) as_fn_append () +else $as_nop + as_fn_append () { eval $1=\$$1\$2 - } ;; -esac + } fi # as_fn_append # as_fn_arith ARG... @@ -403,14 +406,21 @@ then : { as_val=$(( $* )) }' -else case e in #( - e) as_fn_arith () +else $as_nop + as_fn_arith () { as_val=`expr "$@" || test $? -eq 1` - } ;; -esac + } fi # as_fn_arith +# as_fn_nop +# --------- +# Do nothing but, unlike ":", preserve the value of $?. +as_fn_nop () +{ + return $? +} +as_nop=as_fn_nop # as_fn_error STATUS ERROR [LINENO LOG_FD] # ---------------------------------------- @@ -484,8 +494,6 @@ as_cr_alnum=$as_cr_Letters$as_cr_digits /[$]LINENO/= ' <$as_myself | sed ' - t clear - :clear s/[$]LINENO.*/&-/ t lineno b @@ -534,6 +542,7 @@ esac as_echo='printf %s\n' as_echo_n='printf %s' + rm -f conf$$ conf$$.exe conf$$.file if test -d conf$$.dir; then rm -f conf$$.dir/conf$$.file @@ -545,9 +554,9 @@ if (echo >conf$$.file) 2>/dev/null; then if ln -s conf$$.file conf$$ 2>/dev/null; then as_ln_s='ln -s' # ... but there are two gotchas: - # 1) On MSYS, both 'ln -s file dir' and 'ln file dir' fail. - # 2) DJGPP < 2.04 has no symlinks; 'ln -s' creates a wrapper executable. - # In both cases, we have to default to 'cp -pR'. + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -pR'. ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || as_ln_s='cp -pR' elif ln conf$$.file conf$$ 2>/dev/null; then @@ -572,12 +581,10 @@ as_test_x='test -x' as_executable_p=as_fn_executable_p # Sed expression to map a string onto a valid CPP name. -as_sed_cpp="y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g" -as_tr_cpp="eval sed '$as_sed_cpp'" # deprecated +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" # Sed expression to map a string onto a valid variable name. -as_sed_sh="y%*+%pp%;s%[^_$as_cr_alnum]%_%g" -as_tr_sh="eval sed '$as_sed_sh'" # deprecated +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" test -n "$DJDIR" || exec 7<&0 >>>>>> upstream/master with_target enable_dual_endian ' @@ -858,7 +860,7 @@ do ac_useropt=`expr "x$ac_option" : 'x-*disable-\(.*\)'` # Reject names that are not valid shell variable names. expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && - as_fn_error $? "invalid feature name: '$ac_useropt'" + as_fn_error $? "invalid feature name: \`$ac_useropt'" ac_useropt_orig=$ac_useropt ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` case $ac_user_opts in @@ -884,7 +886,7 @@ do ac_useropt=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'` # Reject names that are not valid shell variable names. expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && - as_fn_error $? "invalid feature name: '$ac_useropt'" + as_fn_error $? "invalid feature name: \`$ac_useropt'" ac_useropt_orig=$ac_useropt ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` case $ac_user_opts in @@ -1097,7 +1099,7 @@ do ac_useropt=`expr "x$ac_option" : 'x-*with-\([^=]*\)'` # Reject names that are not valid shell variable names. expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && - as_fn_error $? "invalid package name: '$ac_useropt'" + as_fn_error $? "invalid package name: \`$ac_useropt'" ac_useropt_orig=$ac_useropt ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` case $ac_user_opts in @@ -1113,7 +1115,7 @@ do ac_useropt=`expr "x$ac_option" : 'x-*without-\(.*\)'` # Reject names that are not valid shell variable names. expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null && - as_fn_error $? "invalid package name: '$ac_useropt'" + as_fn_error $? "invalid package name: \`$ac_useropt'" ac_useropt_orig=$ac_useropt ac_useropt=`printf "%s\n" "$ac_useropt" | sed 's/[-+.]/_/g'` case $ac_user_opts in @@ -1143,8 +1145,8 @@ do | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*) x_libraries=$ac_optarg ;; - -*) as_fn_error $? "unrecognized option: '$ac_option' -Try '$0 --help' for more information" + -*) as_fn_error $? "unrecognized option: \`$ac_option' +Try \`$0 --help' for more information" ;; *=*) @@ -1152,7 +1154,7 @@ Try '$0 --help' for more information" # Reject names that are not valid shell variable names. case $ac_envvar in #( '' | [0-9]* | *[!_$as_cr_alnum]* ) - as_fn_error $? "invalid variable name: '$ac_envvar'" ;; + as_fn_error $? "invalid variable name: \`$ac_envvar'" ;; esac eval $ac_envvar=\$ac_optarg export $ac_envvar ;; @@ -1202,7 +1204,7 @@ do as_fn_error $? "expected an absolute directory name for --$ac_var: $ac_val" done -# There might be people who depend on the old broken behavior: '$host' +# There might be people who depend on the old broken behavior: `$host' # used to hold the argument of --host etc. # FIXME: To remove some day. build=$build_alias @@ -1270,7 +1272,7 @@ if test ! -r "$srcdir/$ac_unique_file"; then test "$ac_srcdir_defaulted" = yes && srcdir="$ac_confdir or .." as_fn_error $? "cannot find sources ($ac_unique_file) in $srcdir" fi -ac_msg="sources are in $srcdir, but 'cd $srcdir' does not work" +ac_msg="sources are in $srcdir, but \`cd $srcdir' does not work" ac_abs_confdir=`( cd "$srcdir" && test -r "./$ac_unique_file" || as_fn_error $? "$ac_msg" pwd)` @@ -1298,7 +1300,7 @@ if test "$ac_init_help" = "long"; then # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -'configure' configures RISC-V ISA Simulator ? to adapt to many kinds of systems. +\`configure' configures RISC-V ISA Simulator ? to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1312,11 +1314,11 @@ Configuration: --help=short display options specific to this package --help=recursive display the short help of all the included packages -V, --version display version information and exit - -q, --quiet, --silent do not print 'checking ...' messages + -q, --quiet, --silent do not print \`checking ...' messages --cache-file=FILE cache test results in FILE [disabled] - -C, --config-cache alias for '--cache-file=config.cache' + -C, --config-cache alias for \`--cache-file=config.cache' -n, --no-create do not create output files - --srcdir=DIR find the sources in DIR [configure dir or '..'] + --srcdir=DIR find the sources in DIR [configure dir or \`..'] Installation directories: --prefix=PREFIX install architecture-independent files in PREFIX @@ -1324,10 +1326,10 @@ Installation directories: --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX [PREFIX] -By default, 'make install' will install all the files in -'$ac_default_prefix/bin', '$ac_default_prefix/lib' etc. You can specify -an installation prefix other than '$ac_default_prefix' using '--prefix', -for instance '--prefix=\$HOME'. +By default, \`make install' will install all the files in +\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc. You can specify +an installation prefix other than \`$ac_default_prefix' using \`--prefix', +for instance \`--prefix=\$HOME'. For better control, use the options below. @@ -1398,15 +1400,9 @@ Optional Packages: use the Regex library from boost - it is possible to specify a certain library for the linker e.g. --with-boost-regex=boost_regex-gcc-mt-d-1_33_1 -<<<<<<< HEAD - --with-isa=RV64IMAFDC_zicntr_zihpm - Sets the default RISC-V ISA - --with-priv=MSU Sets the default RISC-V privilege modes supported --with-varch=vlen:128,elen:64 Sets the default vector config --with-vfp8=1 Sets the default FP8 format (1 or 2) -======= ->>>>>>> upstream/master --with-target=riscv64-unknown-elf Sets the default target config @@ -1423,7 +1419,7 @@ Some influential environment variables: STOW_ROOT Root for non-native stow-based installs STOW_PREFIX Prefix for stow-based installs -Use these variables to override the choices made by 'configure' or to help +Use these variables to override the choices made by `configure' or to help it to find libraries and programs with nonstandard names/locations. Report bugs to . @@ -1491,9 +1487,9 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF RISC-V ISA Simulator configure ? -generated by GNU Autoconf 2.72 +generated by GNU Autoconf 2.71 -Copyright (C) 2023 Free Software Foundation, Inc. +Copyright (C) 2021 Free Software Foundation, Inc. This configure script is free software; the Free Software Foundation gives unlimited permission to copy, distribute and modify it. _ACEOF @@ -1532,12 +1528,11 @@ printf "%s\n" "$ac_try_echo"; } >&5 } && test -s conftest.$ac_objext then : ac_retval=0 -else case e in #( - e) printf "%s\n" "$as_me: failed program was:" >&5 +else $as_nop + printf "%s\n" "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 - ac_retval=1 ;; -esac + ac_retval=1 fi eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno as_fn_set_status $ac_retval @@ -1572,66 +1567,17 @@ printf "%s\n" "$ac_try_echo"; } >&5 } && test -s conftest.$ac_objext then : ac_retval=0 -else case e in #( - e) printf "%s\n" "$as_me: failed program was:" >&5 +else $as_nop + printf "%s\n" "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 - ac_retval=1 ;; -esac + ac_retval=1 fi eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno as_fn_set_status $ac_retval } # ac_fn_cxx_try_compile -# ac_fn_cxx_try_link LINENO -# ------------------------- -# Try to link conftest.$ac_ext, and return whether this succeeded. -ac_fn_cxx_try_link () -{ - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack - rm -f conftest.$ac_objext conftest.beam conftest$ac_exeext - if { { ac_try="$ac_link" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" -printf "%s\n" "$ac_try_echo"; } >&5 - (eval "$ac_link") 2>conftest.err - ac_status=$? - if test -s conftest.err; then - grep -v '^ *+' conftest.err >conftest.er1 - cat conftest.er1 >&5 - mv -f conftest.er1 conftest.err - fi - printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; } && { - test -z "$ac_cxx_werror_flag" || - test ! -s conftest.err - } && test -s conftest$ac_exeext && { - test "$cross_compiling" = yes || - test -x conftest$ac_exeext - } -then : - ac_retval=0 -else case e in #( - e) printf "%s\n" "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_retval=1 ;; -esac -fi - # Delete the IPA/IPO (Inter Procedural Analysis/Optimization) information - # created by the PGI compiler (conftest_ipa8_conftest.oo), as it would - # interfere with the next link command; also delete a directory that is - # left behind by Apple's compiler. We do this before executing the actions. - rm -rf conftest.dSYM conftest_ipa8_conftest.oo - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - as_fn_set_status $ac_retval - -} # ac_fn_cxx_try_link - # ac_fn_cxx_try_run LINENO # ------------------------ # Try to run conftest.$ac_ext, and return whether this succeeded. Assumes that @@ -1662,13 +1608,12 @@ printf "%s\n" "$ac_try_echo"; } >&5 test $ac_status = 0; }; } then : ac_retval=0 -else case e in #( - e) printf "%s\n" "$as_me: program exited with status $ac_status" >&5 +else $as_nop + printf "%s\n" "$as_me: program exited with status $ac_status" >&5 printf "%s\n" "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 - ac_retval=$ac_status ;; -esac + ac_retval=$ac_status fi rm -rf conftest.dSYM conftest_ipa8_conftest.oo eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno @@ -1688,8 +1633,8 @@ printf %s "checking for $2... " >&6; } if eval test \${$3+y} then : printf %s "(cached) " >&6 -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ $4 #include <$2> @@ -1697,12 +1642,10 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : eval "$3=yes" -else case e in #( - e) eval "$3=no" ;; -esac +else $as_nop + eval "$3=no" fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi eval ac_res=\$$3 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -1723,8 +1666,8 @@ printf %s "checking for $2... " >&6; } if eval test \${$3+y} then : printf %s "(cached) " >&6 -else case e in #( - e) eval "$3=no" +else $as_nop + eval "$3=no" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ $4 @@ -1754,14 +1697,12 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : -else case e in #( - e) eval "$3=yes" ;; -esac +else $as_nop + eval "$3=yes" fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi eval ac_res=\$$3 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -1770,6 +1711,53 @@ printf "%s\n" "$ac_res" >&6; } } # ac_fn_cxx_check_type +# ac_fn_cxx_try_link LINENO +# ------------------------- +# Try to link conftest.$ac_ext, and return whether this succeeded. +ac_fn_cxx_try_link () +{ + as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack + rm -f conftest.$ac_objext conftest.beam conftest$ac_exeext + if { { ac_try="$ac_link" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" +printf "%s\n" "$ac_try_echo"; } >&5 + (eval "$ac_link") 2>conftest.err + ac_status=$? + if test -s conftest.err; then + grep -v '^ *+' conftest.err >conftest.er1 + cat conftest.er1 >&5 + mv -f conftest.er1 conftest.err + fi + printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } && { + test -z "$ac_cxx_werror_flag" || + test ! -s conftest.err + } && test -s conftest$ac_exeext && { + test "$cross_compiling" = yes || + test -x conftest$ac_exeext + } +then : + ac_retval=0 +else $as_nop + printf "%s\n" "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + + ac_retval=1 +fi + # Delete the IPA/IPO (Inter Procedural Analysis/Optimization) information + # created by the PGI compiler (conftest_ipa8_conftest.oo), as it would + # interfere with the next link command; also delete a directory that is + # left behind by Apple's compiler. We do this before executing the actions. + rm -rf conftest.dSYM conftest_ipa8_conftest.oo + eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno + as_fn_set_status $ac_retval + +} # ac_fn_cxx_try_link + # ac_fn_cxx_check_member LINENO AGGR MEMBER VAR INCLUDES # ------------------------------------------------------ # Tries to find if the field MEMBER exists in type AGGR, after including @@ -1782,8 +1770,8 @@ printf %s "checking for $2.$3... " >&6; } if eval test \${$4+y} then : printf %s "(cached) " >&6 -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ $5 int @@ -1799,8 +1787,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : eval "$4=yes" -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ $5 int @@ -1816,15 +1804,12 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : eval "$4=yes" -else case e in #( - e) eval "$4=no" ;; -esac +else $as_nop + eval "$4=no" fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi eval ac_res=\$$4 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -1857,7 +1842,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. It was created by RISC-V ISA Simulator $as_me ?, which was -generated by GNU Autoconf 2.72. Invocation command line was +generated by GNU Autoconf 2.71. Invocation command line was $ $0$ac_configure_args_raw @@ -2103,10 +2088,10 @@ esac printf "%s\n" "$as_me: loading site script $ac_site_file" >&6;} sed 's/^/| /' "$ac_site_file" >&5 . "$ac_site_file" \ - || { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} + || { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error $? "failed to load site script $ac_site_file -See 'config.log' for more details" "$LINENO" 5; } +See \`config.log' for more details" "$LINENO" 5; } fi done @@ -2142,7 +2127,9 @@ struct stat; /* Most of the following tests are stolen from RCS 5.7 src/conf.sh. */ struct buf { int x; }; struct buf * (*rcsopen) (struct buf *, struct stat *, int); -static char *e (char **p, int i) +static char *e (p, i) + char **p; + int i; { return p[i]; } @@ -2156,21 +2143,6 @@ static char *f (char * (*g) (char **, int), char **p, ...) return s; } -/* C89 style stringification. */ -#define noexpand_stringify(a) #a -const char *stringified = noexpand_stringify(arbitrary+token=sequence); - -/* C89 style token pasting. Exercises some of the corner cases that - e.g. old MSVC gets wrong, but not very hard. */ -#define noexpand_concat(a,b) a##b -#define expand_concat(a,b) noexpand_concat(a,b) -extern int vA; -extern int vbee; -#define aye A -#define bee B -int *pvA = &expand_concat(v,aye); -int *pvbee = &noexpand_concat(v,bee); - /* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has function prototypes and stuff, but not \xHH hex character constants. These do not provoke an error unfortunately, instead are silently treated @@ -2198,19 +2170,16 @@ ok |= (argc == 0 || f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]); # Test code for whether the C compiler supports C99 (global declarations) ac_c_conftest_c99_globals=' -/* Does the compiler advertise C99 conformance? */ +// Does the compiler advertise C99 conformance? #if !defined __STDC_VERSION__ || __STDC_VERSION__ < 199901L # error "Compiler does not advertise C99 conformance" #endif -// See if C++-style comments work. - #include extern int puts (const char *); extern int printf (const char *, ...); extern int dprintf (int, const char *, ...); extern void *malloc (size_t); -extern void free (void *); // Check varargs macros. These examples are taken from C99 6.10.3.5. // dprintf is used instead of fprintf to avoid needing to declare @@ -2260,6 +2229,7 @@ typedef const char *ccp; static inline int test_restrict (ccp restrict text) { + // See if C++-style comments work. // Iterate through items via the restricted pointer. // Also check for declarations in for loops. for (unsigned int i = 0; *(text+i) != '\''\0'\''; ++i) @@ -2325,8 +2295,6 @@ ac_c_conftest_c99_main=' ia->datasize = 10; for (int i = 0; i < ia->datasize; ++i) ia->data[i] = i * 1.234; - // Work around memory leak warnings. - free (ia); // Check named initializers. struct named_init ni = { @@ -2348,7 +2316,7 @@ ac_c_conftest_c99_main=' # Test code for whether the C compiler supports C11 (global declarations) ac_c_conftest_c11_globals=' -/* Does the compiler advertise C11 conformance? */ +// Does the compiler advertise C11 conformance? #if !defined __STDC_VERSION__ || __STDC_VERSION__ < 201112L # error "Compiler does not advertise C11 conformance" #endif @@ -2756,9 +2724,8 @@ IFS=$as_save_IFS if $as_found then : -else case e in #( - e) as_fn_error $? "cannot find required auxiliary files:$ac_missing_aux_files" "$LINENO" 5 ;; -esac +else $as_nop + as_fn_error $? "cannot find required auxiliary files:$ac_missing_aux_files" "$LINENO" 5 fi @@ -2786,12 +2753,12 @@ for ac_var in $ac_precious_vars; do eval ac_new_val=\$ac_env_${ac_var}_value case $ac_old_set,$ac_new_set in set,) - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: '$ac_var' was set to '$ac_old_val' in the previous run" >&5 -printf "%s\n" "$as_me: error: '$ac_var' was set to '$ac_old_val' in the previous run" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5 +printf "%s\n" "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;} ac_cache_corrupted=: ;; ,set) - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: '$ac_var' was not set in the previous run" >&5 -printf "%s\n" "$as_me: error: '$ac_var' was not set in the previous run" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' was not set in the previous run" >&5 +printf "%s\n" "$as_me: error: \`$ac_var' was not set in the previous run" >&2;} ac_cache_corrupted=: ;; ,);; *) @@ -2800,18 +2767,18 @@ printf "%s\n" "$as_me: error: '$ac_var' was not set in the previous run" >&2;} ac_old_val_w=`echo x $ac_old_val` ac_new_val_w=`echo x $ac_new_val` if test "$ac_old_val_w" != "$ac_new_val_w"; then - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: '$ac_var' has changed since the previous run:" >&5 -printf "%s\n" "$as_me: error: '$ac_var' has changed since the previous run:" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: \`$ac_var' has changed since the previous run:" >&5 +printf "%s\n" "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;} ac_cache_corrupted=: else - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in '$ac_var' since the previous run:" >&5 -printf "%s\n" "$as_me: warning: ignoring whitespace changes in '$ac_var' since the previous run:" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&5 +printf "%s\n" "$as_me: warning: ignoring whitespace changes in \`$ac_var' since the previous run:" >&2;} eval $ac_var=\$ac_old_val fi - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: former value: '$ac_old_val'" >&5 -printf "%s\n" "$as_me: former value: '$ac_old_val'" >&2;} - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: current value: '$ac_new_val'" >&5 -printf "%s\n" "$as_me: current value: '$ac_new_val'" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: former value: \`$ac_old_val'" >&5 +printf "%s\n" "$as_me: former value: \`$ac_old_val'" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: current value: \`$ac_new_val'" >&5 +printf "%s\n" "$as_me: current value: \`$ac_new_val'" >&2;} fi;; esac # Pass precious variables to config.status. @@ -2827,11 +2794,11 @@ printf "%s\n" "$as_me: current value: '$ac_new_val'" >&2;} fi done if $ac_cache_corrupted; then - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5 printf "%s\n" "$as_me: error: changes in the environment can compromise the build" >&2;} - as_fn_error $? "run '${MAKE-make} distclean' and/or 'rm $cache_file' + as_fn_error $? "run \`${MAKE-make} distclean' and/or \`rm $cache_file' and start over" "$LINENO" 5 fi ## -------------------- ## @@ -2865,16 +2832,15 @@ printf %s "checking build system type... " >&6; } if test ${ac_cv_build+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_build_alias=$build_alias +else $as_nop + ac_build_alias=$build_alias test "x$ac_build_alias" = x && ac_build_alias=`$SHELL "${ac_aux_dir}config.guess"` test "x$ac_build_alias" = x && as_fn_error $? "cannot guess build type; you must specify one" "$LINENO" 5 ac_cv_build=`$SHELL "${ac_aux_dir}config.sub" $ac_build_alias` || as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $ac_build_alias failed" "$LINENO" 5 - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_build" >&5 printf "%s\n" "$ac_cv_build" >&6; } @@ -2901,15 +2867,14 @@ printf %s "checking host system type... " >&6; } if test ${ac_cv_host+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test "x$host_alias" = x; then +else $as_nop + if test "x$host_alias" = x; then ac_cv_host=$ac_cv_build else ac_cv_host=`$SHELL "${ac_aux_dir}config.sub" $host_alias` || as_fn_error $? "$SHELL ${ac_aux_dir}config.sub $host_alias failed" "$LINENO" 5 fi - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_host" >&5 printf "%s\n" "$ac_cv_host" >&6; } @@ -3263,8 +3228,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CC"; then +else $as_nop + if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3286,8 +3251,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then @@ -3309,8 +3273,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_CC"; then +else $as_nop + if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3332,8 +3296,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then @@ -3368,8 +3331,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CC"; then +else $as_nop + if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3391,8 +3354,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then @@ -3414,8 +3376,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CC"; then +else $as_nop + if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else ac_prog_rejected=no @@ -3454,8 +3416,7 @@ if test $ac_prog_rejected = yes; then ac_cv_prog_CC="$as_dir$ac_word${1+' '}$@" fi fi -fi ;; -esac +fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then @@ -3479,8 +3440,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CC"; then +else $as_nop + if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3502,8 +3463,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then @@ -3529,8 +3489,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_CC"; then +else $as_nop + if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3552,8 +3512,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then @@ -3591,8 +3550,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CC"; then +else $as_nop + if test -n "$CC"; then ac_cv_prog_CC="$CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3614,8 +3573,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi CC=$ac_cv_prog_CC if test -n "$CC"; then @@ -3637,8 +3595,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_CC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_CC"; then +else $as_nop + if test -n "$ac_ct_CC"; then ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -3660,8 +3618,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_CC=$ac_cv_prog_ac_ct_CC if test -n "$ac_ct_CC"; then @@ -3690,10 +3647,10 @@ fi fi -test -z "$CC" && { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} +test -z "$CC" && { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error $? "no acceptable C compiler found in \$PATH -See 'config.log' for more details" "$LINENO" 5; } +See \`config.log' for more details" "$LINENO" 5; } # Provide some information about the compiler. printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5 @@ -3765,8 +3722,8 @@ printf "%s\n" "$ac_try_echo"; } >&5 printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } then : - # Autoconf-2.13 could set the ac_cv_exeext variable to 'no'. -# So ignore a value of 'no', otherwise this would lead to 'EXEEXT = no' + # Autoconf-2.13 could set the ac_cv_exeext variable to `no'. +# So ignore a value of `no', otherwise this would lead to `EXEEXT = no' # in a Makefile. We should not override ac_cv_exeext if it was cached, # so that the user can short-circuit this test for compilers unknown to # Autoconf. @@ -3786,7 +3743,7 @@ do ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'` fi # We set ac_cv_exeext here because the later test for it is not - # safe: cross compilers may not add the suffix if given an '-o' + # safe: cross compilers may not add the suffix if given an `-o' # argument, so we may need to know it at that point already. # Even if this section looks crufty: it has the advantage of # actually working. @@ -3797,9 +3754,8 @@ do done test "$ac_cv_exeext" = no && ac_cv_exeext= -else case e in #( - e) ac_file='' ;; -esac +else $as_nop + ac_file='' fi if test -z "$ac_file" then : @@ -3808,14 +3764,13 @@ printf "%s\n" "no" >&6; } printf "%s\n" "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 -{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} +{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error 77 "C compiler cannot create executables -See 'config.log' for more details" "$LINENO" 5; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -printf "%s\n" "yes" >&6; } ;; -esac +See \`config.log' for more details" "$LINENO" 5; } +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +printf "%s\n" "yes" >&6; } fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for C compiler default output file name" >&5 printf %s "checking for C compiler default output file name... " >&6; } @@ -3839,10 +3794,10 @@ printf "%s\n" "$ac_try_echo"; } >&5 printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } then : - # If both 'conftest.exe' and 'conftest' are 'present' (well, observable) -# catch 'conftest.exe'. For instance with Cygwin, 'ls conftest' will -# work properly (i.e., refer to 'conftest.exe'), while it won't with -# 'rm'. + # If both `conftest.exe' and `conftest' are `present' (well, observable) +# catch `conftest.exe'. For instance with Cygwin, `ls conftest' will +# work properly (i.e., refer to `conftest.exe'), while it won't with +# `rm'. for ac_file in conftest.exe conftest conftest.*; do test -f "$ac_file" || continue case $ac_file in @@ -3852,12 +3807,11 @@ for ac_file in conftest.exe conftest conftest.*; do * ) break;; esac done -else case e in #( - e) { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} +else $as_nop + { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error $? "cannot compute suffix of executables: cannot compile and link -See 'config.log' for more details" "$LINENO" 5; } ;; -esac +See \`config.log' for more details" "$LINENO" 5; } fi rm -f conftest conftest$ac_cv_exeext { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5 @@ -3873,8 +3827,6 @@ int main (void) { FILE *f = fopen ("conftest.out", "w"); - if (!f) - return 1; return ferror (f) || fclose (f) != 0; ; @@ -3914,27 +3866,26 @@ printf "%s\n" "$ac_try_echo"; } >&5 if test "$cross_compiling" = maybe; then cross_compiling=yes else - { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} + { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error 77 "cannot run C compiled programs. -If you meant to cross compile, use '--host'. -See 'config.log' for more details" "$LINENO" 5; } +If you meant to cross compile, use \`--host'. +See \`config.log' for more details" "$LINENO" 5; } fi fi fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $cross_compiling" >&5 printf "%s\n" "$cross_compiling" >&6; } -rm -f conftest.$ac_ext conftest$ac_cv_exeext \ - conftest.o conftest.obj conftest.out +rm -f conftest.$ac_ext conftest$ac_cv_exeext conftest.out ac_clean_files=$ac_clean_files_save { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5 printf %s "checking for suffix of object files... " >&6; } if test ${ac_cv_objext+y} then : printf %s "(cached) " >&6 -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int @@ -3966,18 +3917,16 @@ then : break;; esac done -else case e in #( - e) printf "%s\n" "$as_me: failed program was:" >&5 +else $as_nop + printf "%s\n" "$as_me: failed program was:" >&5 sed 's/^/| /' conftest.$ac_ext >&5 -{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in '$ac_pwd':" >&5 -printf "%s\n" "$as_me: error: in '$ac_pwd':" >&2;} +{ { printf "%s\n" "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +printf "%s\n" "$as_me: error: in \`$ac_pwd':" >&2;} as_fn_error $? "cannot compute suffix of object files: cannot compile -See 'config.log' for more details" "$LINENO" 5; } ;; -esac +See \`config.log' for more details" "$LINENO" 5; } fi -rm -f conftest.$ac_cv_objext conftest.$ac_ext ;; -esac +rm -f conftest.$ac_cv_objext conftest.$ac_ext fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_objext" >&5 printf "%s\n" "$ac_cv_objext" >&6; } @@ -3988,8 +3937,8 @@ printf %s "checking whether the compiler supports GNU C... " >&6; } if test ${ac_cv_c_compiler_gnu+y} then : printf %s "(cached) " >&6 -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int @@ -4006,14 +3955,12 @@ _ACEOF if ac_fn_c_try_compile "$LINENO" then : ac_compiler_gnu=yes -else case e in #( - e) ac_compiler_gnu=no ;; -esac +else $as_nop + ac_compiler_gnu=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ac_cv_c_compiler_gnu=$ac_compiler_gnu - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5 printf "%s\n" "$ac_cv_c_compiler_gnu" >&6; } @@ -4031,8 +3978,8 @@ printf %s "checking whether $CC accepts -g... " >&6; } if test ${ac_cv_prog_cc_g+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_save_c_werror_flag=$ac_c_werror_flag +else $as_nop + ac_save_c_werror_flag=$ac_c_werror_flag ac_c_werror_flag=yes ac_cv_prog_cc_g=no CFLAGS="-g" @@ -4050,8 +3997,8 @@ _ACEOF if ac_fn_c_try_compile "$LINENO" then : ac_cv_prog_cc_g=yes -else case e in #( - e) CFLAGS="" +else $as_nop + CFLAGS="" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4066,8 +4013,8 @@ _ACEOF if ac_fn_c_try_compile "$LINENO" then : -else case e in #( - e) ac_c_werror_flag=$ac_save_c_werror_flag +else $as_nop + ac_c_werror_flag=$ac_save_c_werror_flag CFLAGS="-g" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4084,15 +4031,12 @@ if ac_fn_c_try_compile "$LINENO" then : ac_cv_prog_cc_g=yes fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_c_werror_flag=$ac_save_c_werror_flag ;; -esac + ac_c_werror_flag=$ac_save_c_werror_flag fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5 printf "%s\n" "$ac_cv_prog_cc_g" >&6; } @@ -4119,8 +4063,8 @@ printf %s "checking for $CC option to enable C11 features... " >&6; } if test ${ac_cv_prog_cc_c11+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_prog_cc_c11=no +else $as_nop + ac_cv_prog_cc_c11=no ac_save_CC=$CC cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4137,28 +4081,25 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam test "x$ac_cv_prog_cc_c11" != "xno" && break done rm -f conftest.$ac_ext -CC=$ac_save_CC ;; -esac +CC=$ac_save_CC fi if test "x$ac_cv_prog_cc_c11" = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 printf "%s\n" "unsupported" >&6; } -else case e in #( - e) if test "x$ac_cv_prog_cc_c11" = x +else $as_nop + if test "x$ac_cv_prog_cc_c11" = x then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 printf "%s\n" "none needed" >&6; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c11" >&5 +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c11" >&5 printf "%s\n" "$ac_cv_prog_cc_c11" >&6; } - CC="$CC $ac_cv_prog_cc_c11" ;; -esac + CC="$CC $ac_cv_prog_cc_c11" fi ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c11 - ac_prog_cc_stdc=c11 ;; -esac + ac_prog_cc_stdc=c11 fi fi if test x$ac_prog_cc_stdc = xno @@ -4168,8 +4109,8 @@ printf %s "checking for $CC option to enable C99 features... " >&6; } if test ${ac_cv_prog_cc_c99+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_prog_cc_c99=no +else $as_nop + ac_cv_prog_cc_c99=no ac_save_CC=$CC cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4186,28 +4127,25 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam test "x$ac_cv_prog_cc_c99" != "xno" && break done rm -f conftest.$ac_ext -CC=$ac_save_CC ;; -esac +CC=$ac_save_CC fi if test "x$ac_cv_prog_cc_c99" = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 printf "%s\n" "unsupported" >&6; } -else case e in #( - e) if test "x$ac_cv_prog_cc_c99" = x +else $as_nop + if test "x$ac_cv_prog_cc_c99" = x then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 printf "%s\n" "none needed" >&6; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c99" >&5 +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c99" >&5 printf "%s\n" "$ac_cv_prog_cc_c99" >&6; } - CC="$CC $ac_cv_prog_cc_c99" ;; -esac + CC="$CC $ac_cv_prog_cc_c99" fi ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c99 - ac_prog_cc_stdc=c99 ;; -esac + ac_prog_cc_stdc=c99 fi fi if test x$ac_prog_cc_stdc = xno @@ -4217,8 +4155,8 @@ printf %s "checking for $CC option to enable C89 features... " >&6; } if test ${ac_cv_prog_cc_c89+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_prog_cc_c89=no +else $as_nop + ac_cv_prog_cc_c89=no ac_save_CC=$CC cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4235,28 +4173,25 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam test "x$ac_cv_prog_cc_c89" != "xno" && break done rm -f conftest.$ac_ext -CC=$ac_save_CC ;; -esac +CC=$ac_save_CC fi if test "x$ac_cv_prog_cc_c89" = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 printf "%s\n" "unsupported" >&6; } -else case e in #( - e) if test "x$ac_cv_prog_cc_c89" = x +else $as_nop + if test "x$ac_cv_prog_cc_c89" = x then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 printf "%s\n" "none needed" >&6; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 printf "%s\n" "$ac_cv_prog_cc_c89" >&6; } - CC="$CC $ac_cv_prog_cc_c89" ;; -esac + CC="$CC $ac_cv_prog_cc_c89" fi ac_cv_prog_cc_stdc=$ac_cv_prog_cc_c89 - ac_prog_cc_stdc=c89 ;; -esac + ac_prog_cc_stdc=c89 fi fi @@ -4291,8 +4226,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_CXX+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$CXX"; then +else $as_nop + if test -n "$CXX"; then ac_cv_prog_CXX="$CXX" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4314,8 +4249,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi CXX=$ac_cv_prog_CXX if test -n "$CXX"; then @@ -4341,8 +4275,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_CXX+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_CXX"; then +else $as_nop + if test -n "$ac_ct_CXX"; then ac_cv_prog_ac_ct_CXX="$ac_ct_CXX" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4364,8 +4298,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_CXX=$ac_cv_prog_ac_ct_CXX if test -n "$ac_ct_CXX"; then @@ -4425,8 +4358,8 @@ printf %s "checking whether the compiler supports GNU C++... " >&6; } if test ${ac_cv_cxx_compiler_gnu+y} then : printf %s "(cached) " >&6 -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int @@ -4443,14 +4376,12 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ac_compiler_gnu=yes -else case e in #( - e) ac_compiler_gnu=no ;; -esac +else $as_nop + ac_compiler_gnu=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ac_cv_cxx_compiler_gnu=$ac_compiler_gnu - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_cxx_compiler_gnu" >&5 printf "%s\n" "$ac_cv_cxx_compiler_gnu" >&6; } @@ -4468,8 +4399,8 @@ printf %s "checking whether $CXX accepts -g... " >&6; } if test ${ac_cv_prog_cxx_g+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_save_cxx_werror_flag=$ac_cxx_werror_flag +else $as_nop + ac_save_cxx_werror_flag=$ac_cxx_werror_flag ac_cxx_werror_flag=yes ac_cv_prog_cxx_g=no CXXFLAGS="-g" @@ -4487,8 +4418,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ac_cv_prog_cxx_g=yes -else case e in #( - e) CXXFLAGS="" +else $as_nop + CXXFLAGS="" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4503,8 +4434,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : -else case e in #( - e) ac_cxx_werror_flag=$ac_save_cxx_werror_flag +else $as_nop + ac_cxx_werror_flag=$ac_save_cxx_werror_flag CXXFLAGS="-g" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4521,15 +4452,12 @@ if ac_fn_cxx_try_compile "$LINENO" then : ac_cv_prog_cxx_g=yes fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi -rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - ac_cxx_werror_flag=$ac_save_cxx_werror_flag ;; -esac + ac_cxx_werror_flag=$ac_save_cxx_werror_flag fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_g" >&5 printf "%s\n" "$ac_cv_prog_cxx_g" >&6; } @@ -4553,11 +4481,11 @@ if test x$ac_prog_cxx_stdcxx = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CXX option to enable C++11 features" >&5 printf %s "checking for $CXX option to enable C++11 features... " >&6; } -if test ${ac_cv_prog_cxx_cxx11+y} +if test ${ac_cv_prog_cxx_11+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_prog_cxx_cxx11=no +else $as_nop + ac_cv_prog_cxx_11=no ac_save_CXX=$CXX cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4574,39 +4502,36 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam test "x$ac_cv_prog_cxx_cxx11" != "xno" && break done rm -f conftest.$ac_ext -CXX=$ac_save_CXX ;; -esac +CXX=$ac_save_CXX fi if test "x$ac_cv_prog_cxx_cxx11" = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 printf "%s\n" "unsupported" >&6; } -else case e in #( - e) if test "x$ac_cv_prog_cxx_cxx11" = x +else $as_nop + if test "x$ac_cv_prog_cxx_cxx11" = x then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 printf "%s\n" "none needed" >&6; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx11" >&5 +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx11" >&5 printf "%s\n" "$ac_cv_prog_cxx_cxx11" >&6; } - CXX="$CXX $ac_cv_prog_cxx_cxx11" ;; -esac + CXX="$CXX $ac_cv_prog_cxx_cxx11" fi ac_cv_prog_cxx_stdcxx=$ac_cv_prog_cxx_cxx11 - ac_prog_cxx_stdcxx=cxx11 ;; -esac + ac_prog_cxx_stdcxx=cxx11 fi fi if test x$ac_prog_cxx_stdcxx = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $CXX option to enable C++98 features" >&5 printf %s "checking for $CXX option to enable C++98 features... " >&6; } -if test ${ac_cv_prog_cxx_cxx98+y} +if test ${ac_cv_prog_cxx_98+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_prog_cxx_cxx98=no +else $as_nop + ac_cv_prog_cxx_98=no ac_save_CXX=$CXX cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4623,28 +4548,25 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam test "x$ac_cv_prog_cxx_cxx98" != "xno" && break done rm -f conftest.$ac_ext -CXX=$ac_save_CXX ;; -esac +CXX=$ac_save_CXX fi if test "x$ac_cv_prog_cxx_cxx98" = xno then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 printf "%s\n" "unsupported" >&6; } -else case e in #( - e) if test "x$ac_cv_prog_cxx_cxx98" = x +else $as_nop + if test "x$ac_cv_prog_cxx_cxx98" = x then : { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 printf "%s\n" "none needed" >&6; } -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx98" >&5 +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cxx_cxx98" >&5 printf "%s\n" "$ac_cv_prog_cxx_cxx98" >&6; } - CXX="$CXX $ac_cv_prog_cxx_cxx98" ;; -esac + CXX="$CXX $ac_cv_prog_cxx_cxx98" fi ac_cv_prog_cxx_stdcxx=$ac_cv_prog_cxx_cxx98 - ac_prog_cxx_stdcxx=cxx98 ;; -esac + ac_prog_cxx_stdcxx=cxx98 fi fi @@ -4662,8 +4584,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_AR+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$AR"; then +else $as_nop + if test -n "$AR"; then ac_cv_prog_AR="$AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4685,8 +4607,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi AR=$ac_cv_prog_AR if test -n "$AR"; then @@ -4708,8 +4629,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_AR+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_AR"; then +else $as_nop + if test -n "$ac_ct_AR"; then ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4731,8 +4652,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_AR=$ac_cv_prog_ac_ct_AR if test -n "$ac_ct_AR"; then @@ -4766,8 +4686,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_RANLIB+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$RANLIB"; then +else $as_nop + if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4789,8 +4709,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then @@ -4812,8 +4731,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_prog_ac_ct_RANLIB+y} then : printf %s "(cached) " >&6 -else case e in #( - e) if test -n "$ac_ct_RANLIB"; then +else $as_nop + if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR @@ -4835,8 +4754,7 @@ done done IFS=$as_save_IFS -fi ;; -esac +fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then @@ -4869,8 +4787,8 @@ printf %s "checking for $ac_word... " >&6; } if test ${ac_cv_path_DTC+y} then : printf %s "(cached) " >&6 -else case e in #( - e) case $DTC in +else $as_nop + case $DTC in [\\/]* | ?:[\\/]*) ac_cv_path_DTC="$DTC" # Let the user override the test with a path. ;; @@ -4896,7 +4814,6 @@ IFS=$as_save_IFS test -z "$ac_cv_path_DTC" && ac_cv_path_DTC="no" ;; -esac ;; esac fi DTC=$ac_cv_path_DTC @@ -4952,8 +4869,8 @@ printf %s "checking whether byte ordering is bigendian... " >&6; } if test ${ac_cv_c_bigendian+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_cv_c_bigendian=unknown +else $as_nop + ac_cv_c_bigendian=unknown # See if we're dealing with a universal compiler. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -4999,8 +4916,8 @@ rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext int main (void) { -#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \\ - && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \\ +#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \ + && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \ && LITTLE_ENDIAN) bogus endian macros #endif @@ -5031,9 +4948,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ac_cv_c_bigendian=yes -else case e in #( - e) ac_cv_c_bigendian=no ;; -esac +else $as_nop + ac_cv_c_bigendian=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi @@ -5077,9 +4993,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ac_cv_c_bigendian=yes -else case e in #( - e) ac_cv_c_bigendian=no ;; -esac +else $as_nop + ac_cv_c_bigendian=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext fi @@ -5106,23 +5021,22 @@ unsigned short int ascii_mm[] = int use_ebcdic (int i) { return ebcdic_mm[i] + ebcdic_ii[i]; } - int - main (int argc, char **argv) - { - /* Intimidate the compiler so that it does not - optimize the arrays away. */ - char *p = argv[0]; - ascii_mm[1] = *p++; ebcdic_mm[1] = *p++; - ascii_ii[1] = *p++; ebcdic_ii[1] = *p++; - return use_ascii (argc) == use_ebcdic (*p); - } + extern int foo; + +int +main (void) +{ +return use_ascii (foo) == use_ebcdic (foo); + ; + return 0; +} _ACEOF -if ac_fn_cxx_try_link "$LINENO" +if ac_fn_cxx_try_compile "$LINENO" then : - if grep BIGenDianSyS conftest$ac_exeext >/dev/null; then + if grep BIGenDianSyS conftest.$ac_objext >/dev/null; then ac_cv_c_bigendian=yes fi - if grep LiTTleEnDian conftest$ac_exeext >/dev/null ; then + if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then if test "$ac_cv_c_bigendian" = unknown; then ac_cv_c_bigendian=no else @@ -5131,10 +5045,9 @@ then : fi fi fi -rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext -else case e in #( - e) cat confdefs.h - <<_ACEOF >conftest.$ac_ext +rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ $ac_includes_default int @@ -5157,17 +5070,14 @@ _ACEOF if ac_fn_cxx_try_run "$LINENO" then : ac_cv_c_bigendian=no -else case e in #( - e) ac_cv_c_bigendian=yes ;; -esac +else $as_nop + ac_cv_c_bigendian=yes fi rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ - conftest.$ac_objext conftest.beam conftest.$ac_ext ;; -esac + conftest.$ac_objext conftest.beam conftest.$ac_ext fi - fi ;; -esac + fi fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_bigendian" >&5 printf "%s\n" "$ac_cv_c_bigendian" >&6; } @@ -5216,8 +5126,8 @@ if test -z "$INSTALL"; then if test ${ac_cv_path_install+y} then : printf %s "(cached) " >&6 -else case e in #( - e) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +else $as_nop + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS @@ -5271,8 +5181,7 @@ esac IFS=$as_save_IFS rm -rf conftest.one conftest.two conftest.dir - ;; -esac + fi if test ${ac_cv_path_install+y}; then INSTALL=$ac_cv_path_install @@ -5303,9 +5212,8 @@ test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' if test ${enable_stow+y} then : enableval=$enable_stow; enable_stow="yes" -else case e in #( - e) enable_stow="no" ;; -esac +else $as_nop + enable_stow="no" fi @@ -5345,14 +5253,14 @@ fi for flag in -Wl,--export-dynamic; do - as_CACHEVAR=`printf "%s\n" "ax_cv_check_ldflags__$flag" | sed "$as_sed_sh"` + as_CACHEVAR=`printf "%s\n" "ax_cv_check_ldflags__$flag" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether the linker accepts $flag" >&5 printf %s "checking whether the linker accepts $flag... " >&6; } if eval test \${$as_CACHEVAR+y} then : printf %s "(cached) " >&6 -else case e in #( - e) +else $as_nop + ax_check_save_flags=$LDFLAGS LDFLAGS="$LDFLAGS $flag" cat confdefs.h - <<_ACEOF >conftest.$ac_ext @@ -5369,14 +5277,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_CACHEVAR=yes" -else case e in #( - e) eval "$as_CACHEVAR=no" ;; -esac +else $as_nop + eval "$as_CACHEVAR=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext - LDFLAGS=$ax_check_save_flags ;; -esac + LDFLAGS=$ax_check_save_flags fi eval ac_res=\$$as_CACHEVAR { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -5405,21 +5311,19 @@ then : ;; esac -else case e in #( - e) +else $as_nop + LDFLAGS=$flag { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: : LDFLAGS=\"\$LDFLAGS\""; } >&5 (: LDFLAGS="$LDFLAGS") 2>&5 ac_status=$? printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } - ;; -esac + fi -else case e in #( - e) : ;; -esac +else $as_nop + : fi done @@ -5430,8 +5334,8 @@ printf %s "checking whether the C++ compiler accepts -relocatable-pch... " >&6; if test ${ax_cv_check_cxxflags___relocatable_pch+y} then : printf %s "(cached) " >&6 -else case e in #( - e) +else $as_nop + ax_check_save_flags=$CXXFLAGS if test x"$GXX" = xyes ; then add_gnu_werror="-Werror" @@ -5451,13 +5355,11 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ax_cv_check_cxxflags___relocatable_pch=yes -else case e in #( - e) ax_cv_check_cxxflags___relocatable_pch=no ;; -esac +else $as_nop + ax_cv_check_cxxflags___relocatable_pch=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext - CXXFLAGS=$ax_check_save_flags ;; -esac + CXXFLAGS=$ax_check_save_flags fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ax_cv_check_cxxflags___relocatable_pch" >&5 printf "%s\n" "$ax_cv_check_cxxflags___relocatable_pch" >&6; } @@ -5465,9 +5367,8 @@ if test "x$ax_cv_check_cxxflags___relocatable_pch" = xyes then : HAVE_CLANG_PCH=yes -else case e in #( - e) : ;; -esac +else $as_nop + : fi @@ -5538,8 +5439,8 @@ printf %s "checking for pthread_create in -lpthread... " >&6; } if test ${ac_cv_lib_pthread_pthread_create+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-lpthread $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -5558,14 +5459,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : ac_cv_lib_pthread_pthread_create=yes -else case e in #( - e) ac_cv_lib_pthread_pthread_create=no ;; -esac +else $as_nop + ac_cv_lib_pthread_pthread_create=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_pthread_pthread_create" >&5 printf "%s\n" "$ac_cv_lib_pthread_pthread_create" >&6; } @@ -5575,9 +5474,8 @@ then : LIBS="-lpthread $LIBS" -else case e in #( - e) as_fn_error $? "libpthread is required" "$LINENO" 5 ;; -esac +else $as_nop + as_fn_error $? "libpthread is required" "$LINENO" 5 fi @@ -5665,9 +5563,8 @@ then : want_boost="yes";_AX_BOOST_BASE_boost_path="$withval" ;; esac -else case e in #( - e) want_boost="yes" ;; -esac +else $as_nop + want_boost="yes" fi @@ -5680,14 +5577,12 @@ then : if test -d "$withval" then : _AX_BOOST_BASE_boost_lib_path="$withval" -else case e in #( - e) as_fn_error $? "--with-boost-libdir expected directory name" "$LINENO" 5 ;; -esac +else $as_nop + as_fn_error $? "--with-boost-libdir expected directory name" "$LINENO" 5 fi -else case e in #( - e) _AX_BOOST_BASE_boost_lib_path="" ;; -esac +else $as_nop + _AX_BOOST_BASE_boost_lib_path="" fi @@ -5700,9 +5595,8 @@ then : if test "x1.53" = "x" then : _AX_BOOST_BASE_TONUMERICVERSION_req="1.20.0" -else case e in #( - e) _AX_BOOST_BASE_TONUMERICVERSION_req="1.53" ;; -esac +else $as_nop + _AX_BOOST_BASE_TONUMERICVERSION_req="1.53" fi _AX_BOOST_BASE_TONUMERICVERSION_req_shorten=`expr $_AX_BOOST_BASE_TONUMERICVERSION_req : '\([0-9]*\.[0-9]*\)'` _AX_BOOST_BASE_TONUMERICVERSION_req_major=`expr $_AX_BOOST_BASE_TONUMERICVERSION_req : '\([0-9]*\)'` @@ -5771,21 +5665,19 @@ printf "%s\n" "yes" >&6; } BOOST_LDFLAGS="-L$_AX_BOOST_BASE_boost_path/$_AX_BOOST_BASE_boost_path_tmp"; break; -else case e in #( - e) { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -printf "%s\n" "no" >&6; } ;; -esac +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 +printf "%s\n" "no" >&6; } fi done -else case e in #( - e) +else $as_nop + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 -printf "%s\n" "no" >&6; } ;; -esac +printf "%s\n" "no" >&6; } fi -else case e in #( - e) +else $as_nop + if test X"$cross_compiling" = Xyes; then search_libsubdirs=$multiarch_libsubdir else @@ -5801,8 +5693,7 @@ else case e in #( break; fi done - ;; -esac + fi if test "x$_AX_BOOST_BASE_boost_lib_path" != "x" @@ -6024,10 +5915,9 @@ then : ax_boost_user_asio_lib="$withval" fi -else case e in #( - e) want_boost="yes" - ;; -esac +else $as_nop + want_boost="yes" + fi @@ -6046,8 +5936,8 @@ printf %s "checking whether the Boost::ASIO library is available... " >&6; } if test ${ax_cv_boost_asio+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_ext=cpp +else $as_nop + ac_ext=cpp ac_cpp='$CXXCPP $CPPFLAGS' ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' @@ -6076,9 +5966,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ax_cv_boost_asio=yes -else case e in #( - e) ax_cv_boost_asio=no ;; -esac +else $as_nop + ax_cv_boost_asio=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ac_ext=cpp @@ -6087,8 +5976,7 @@ ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_cxx_compiler_gnu - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ax_cv_boost_asio" >&5 printf "%s\n" "$ax_cv_boost_asio" >&6; } @@ -6100,14 +5988,14 @@ printf "%s\n" "#define HAVE_BOOST_ASIO /**/" >>confdefs.h BOOSTLIBDIR=`echo $BOOST_LDFLAGS | sed -e 's/[^\/]*//'` if test "x$ax_boost_user_asio_lib" = "x"; then for ax_lib in `ls $BOOSTLIBDIR/libboost_system*.so* $BOOSTLIBDIR/libboost_system*.dylib* $BOOSTLIBDIR/libboost_system*.a* 2>/dev/null | sed 's,.*/,,' | sed -e 's;^lib\(boost_system.*\)\.so.*$;\1;' -e 's;^lib\(boost_system.*\)\.dylib.*$;\1;' -e 's;^lib\(boost_system.*\)\.a.*$;\1;' ` ; do - as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | sed "$as_sed_sh"` + as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for main in -l$ax_lib" >&5 printf %s "checking for main in -l$ax_lib... " >&6; } if eval test \${$as_ac_Lib+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-l$ax_lib $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6126,14 +6014,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_ac_Lib=yes" -else case e in #( - e) eval "$as_ac_Lib=no" ;; -esac +else $as_nop + eval "$as_ac_Lib=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi eval ac_res=\$$as_ac_Lib { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -6141,22 +6027,21 @@ printf "%s\n" "$ac_res" >&6; } if eval test \"x\$"$as_ac_Lib"\" = x"yes" then : BOOST_ASIO_LIB="-l$ax_lib" link_thread="yes" break -else case e in #( - e) link_thread="no" ;; -esac +else $as_nop + link_thread="no" fi done else for ax_lib in $ax_boost_user_asio_lib $BN-$ax_boost_user_asio_lib; do - as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | sed "$as_sed_sh"` + as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for main in -l$ax_lib" >&5 printf %s "checking for main in -l$ax_lib... " >&6; } if eval test \${$as_ac_Lib+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-l$ax_lib $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6175,14 +6060,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_ac_Lib=yes" -else case e in #( - e) eval "$as_ac_Lib=no" ;; -esac +else $as_nop + eval "$as_ac_Lib=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi eval ac_res=\$$as_ac_Lib { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -6190,9 +6073,8 @@ printf "%s\n" "$ac_res" >&6; } if eval test \"x\$"$as_ac_Lib"\" = x"yes" then : BOOST_ASIO_LIB="-l$ax_lib" link_asio="yes" break -else case e in #( - e) link_asio="no" ;; -esac +else $as_nop + link_asio="no" fi done @@ -6226,10 +6108,9 @@ then : ax_boost_user_regex_lib="$withval" fi -else case e in #( - e) want_boost="yes" - ;; -esac +else $as_nop + want_boost="yes" + fi @@ -6248,8 +6129,8 @@ printf %s "checking whether the Boost::Regex library is available... " >&6; } if test ${ax_cv_boost_regex+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_ext=cpp +else $as_nop + ac_ext=cpp ac_cpp='$CXXCPP $CPPFLAGS' ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' @@ -6270,9 +6151,8 @@ _ACEOF if ac_fn_cxx_try_compile "$LINENO" then : ax_cv_boost_regex=yes -else case e in #( - e) ax_cv_boost_regex=no ;; -esac +else $as_nop + ax_cv_boost_regex=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam conftest.$ac_ext ac_ext=cpp @@ -6281,8 +6161,7 @@ ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_cxx_compiler_gnu - ;; -esac + fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ax_cv_boost_regex" >&5 printf "%s\n" "$ax_cv_boost_regex" >&6; } @@ -6294,14 +6173,14 @@ printf "%s\n" "#define HAVE_BOOST_REGEX /**/" >>confdefs.h if test "x$ax_boost_user_regex_lib" = "x"; then for libextension in `ls $BOOSTLIBDIR/libboost_regex*.so* $BOOSTLIBDIR/libboost_regex*.dylib* $BOOSTLIBDIR/libboost_regex*.a* 2>/dev/null | sed 's,.*/,,' | sed -e 's;^lib\(boost_regex.*\)\.so.*$;\1;' -e 's;^lib\(boost_regex.*\)\.dylib.*;\1;' -e 's;^lib\(boost_regex.*\)\.a.*$;\1;'` ; do ax_lib=${libextension} - as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_exit" | sed "$as_sed_sh"` + as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_exit" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for exit in -l$ax_lib" >&5 printf %s "checking for exit in -l$ax_lib... " >&6; } if eval test \${$as_ac_Lib+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-l$ax_lib $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6320,14 +6199,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_ac_Lib=yes" -else case e in #( - e) eval "$as_ac_Lib=no" ;; -esac +else $as_nop + eval "$as_ac_Lib=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi eval ac_res=\$$as_ac_Lib { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -6335,23 +6212,22 @@ printf "%s\n" "$ac_res" >&6; } if eval test \"x\$"$as_ac_Lib"\" = x"yes" then : BOOST_REGEX_LIB="-l$ax_lib"; link_regex="yes"; break -else case e in #( - e) link_regex="no" ;; -esac +else $as_nop + link_regex="no" fi done if test "x$link_regex" != "xyes"; then for libextension in `ls $BOOSTLIBDIR/boost_regex*.dll* $BOOSTLIBDIR/boost_regex*.a* 2>/dev/null | sed 's,.*/,,' | sed -e 's;^\(boost_regex.*\)\.dll.*$;\1;' -e 's;^\(boost_regex.*\)\.a.*$;\1;'` ; do ax_lib=${libextension} - as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_exit" | sed "$as_sed_sh"` + as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_exit" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for exit in -l$ax_lib" >&5 printf %s "checking for exit in -l$ax_lib... " >&6; } if eval test \${$as_ac_Lib+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-l$ax_lib $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6370,14 +6246,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_ac_Lib=yes" -else case e in #( - e) eval "$as_ac_Lib=no" ;; -esac +else $as_nop + eval "$as_ac_Lib=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi eval ac_res=\$$as_ac_Lib { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -6385,9 +6259,8 @@ printf "%s\n" "$ac_res" >&6; } if eval test \"x\$"$as_ac_Lib"\" = x"yes" then : BOOST_REGEX_LIB="-l$ax_lib"; link_regex="yes"; break -else case e in #( - e) link_regex="no" ;; -esac +else $as_nop + link_regex="no" fi done @@ -6395,14 +6268,14 @@ fi else for ax_lib in $ax_boost_user_regex_lib boost_regex-$ax_boost_user_regex_lib; do - as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | sed "$as_sed_sh"` + as_ac_Lib=`printf "%s\n" "ac_cv_lib_$ax_lib""_main" | $as_tr_sh` { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for main in -l$ax_lib" >&5 printf %s "checking for main in -l$ax_lib... " >&6; } if eval test \${$as_ac_Lib+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-l$ax_lib $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6421,14 +6294,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : eval "$as_ac_Lib=yes" -else case e in #( - e) eval "$as_ac_Lib=no" ;; -esac +else $as_nop + eval "$as_ac_Lib=no" fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi eval ac_res=\$$as_ac_Lib { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5 @@ -6436,9 +6307,8 @@ printf "%s\n" "$ac_res" >&6; } if eval test \"x\$"$as_ac_Lib"\" = x"yes" then : BOOST_REGEX_LIB="-l$ax_lib"; link_regex="yes"; break -else case e in #( - e) link_regex="no" ;; -esac +else $as_nop + link_regex="no" fi done @@ -6461,8 +6331,8 @@ printf %s "checking for main in -lboost_system... " >&6; } if test ${ac_cv_lib_boost_system_main+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-lboost_system $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6481,14 +6351,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : ac_cv_lib_boost_system_main=yes -else case e in #( - e) ac_cv_lib_boost_system_main=no ;; -esac +else $as_nop + ac_cv_lib_boost_system_main=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_boost_system_main" >&5 printf "%s\n" "$ac_cv_lib_boost_system_main" >&6; } @@ -6506,8 +6374,8 @@ printf %s "checking for main in -lboost_regex... " >&6; } if test ${ac_cv_lib_boost_regex_main+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-lboost_regex $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6526,14 +6394,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : ac_cv_lib_boost_regex_main=yes -else case e in #( - e) ac_cv_lib_boost_regex_main=no ;; -esac +else $as_nop + ac_cv_lib_boost_regex_main=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_boost_regex_main" >&5 printf "%s\n" "$ac_cv_lib_boost_regex_main" >&6; } @@ -6547,35 +6413,6 @@ fi -<<<<<<< HEAD -# Check whether --with-isa was given. -if test ${with_isa+y} -then : - withval=$with_isa; -printf "%s\n" "#define DEFAULT_ISA \"$withval\"" >>confdefs.h - -else $as_nop - -printf "%s\n" "#define DEFAULT_ISA \"RV64IMAFDC_zicntr_zihpm\"" >>confdefs.h - -fi - - - -# Check whether --with-priv was given. -if test ${with_priv+y} -then : - withval=$with_priv; -printf "%s\n" "#define DEFAULT_PRIV \"$withval\"" >>confdefs.h - -else $as_nop - -printf "%s\n" "#define DEFAULT_PRIV \"MSU\"" >>confdefs.h - -fi - - - # Check whether --with-varch was given. if test ${with_varch+y} then : @@ -6604,19 +6441,16 @@ fi -======= ->>>>>>> upstream/master # Check whether --with-target was given. if test ${with_target+y} then : withval=$with_target; printf "%s\n" "#define TARGET_ARCH \"$withval\"" >>confdefs.h -else case e in #( - e) +else $as_nop + printf "%s\n" "#define TARGET_ARCH \"riscv64-unknown-elf\"" >>confdefs.h - ;; -esac + fi @@ -6625,8 +6459,8 @@ printf %s "checking for library containing dlopen... " >&6; } if test ${ac_cv_search_dlopen+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_func_search_save_LIBS=$LIBS +else $as_nop + ac_func_search_save_LIBS=$LIBS cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6663,13 +6497,11 @@ done if test ${ac_cv_search_dlopen+y} then : -else case e in #( - e) ac_cv_search_dlopen=no ;; -esac +else $as_nop + ac_cv_search_dlopen=no fi rm conftest.$ac_ext -LIBS=$ac_func_search_save_LIBS ;; -esac +LIBS=$ac_func_search_save_LIBS fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_dlopen" >&5 printf "%s\n" "$ac_cv_search_dlopen" >&6; } @@ -6692,8 +6524,8 @@ printf %s "checking for pthread_create in -lpthread... " >&6; } if test ${ac_cv_lib_pthread_pthread_create+y} then : printf %s "(cached) " >&6 -else case e in #( - e) ac_check_lib_save_LIBS=$LIBS +else $as_nop + ac_check_lib_save_LIBS=$LIBS LIBS="-lpthread $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ @@ -6712,14 +6544,12 @@ _ACEOF if ac_fn_cxx_try_link "$LINENO" then : ac_cv_lib_pthread_pthread_create=yes -else case e in #( - e) ac_cv_lib_pthread_pthread_create=no ;; -esac +else $as_nop + ac_cv_lib_pthread_pthread_create=no fi rm -f core conftest.err conftest.$ac_objext conftest.beam \ conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS ;; -esac +LIBS=$ac_check_lib_save_LIBS fi { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_pthread_pthread_create" >&5 printf "%s\n" "$ac_cv_lib_pthread_pthread_create" >&6; } @@ -6729,9 +6559,8 @@ then : LIBS="-lpthread $LIBS" -else case e in #( - e) as_fn_error $? "libpthread is required" "$LINENO" 5 ;; -esac +else $as_nop + as_fn_error $? "libpthread is required" "$LINENO" 5 fi @@ -7111,8 +6940,8 @@ cat >confcache <<\_ACEOF # config.status only pays attention to the cache file if you give it # the --recheck option to rerun configure. # -# 'ac_cv_env_foo' variables (set or unset) will be overridden when -# loading this file, other *unset* 'ac_cv_foo' will be assigned the +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the # following values. _ACEOF @@ -7142,14 +6971,14 @@ printf "%s\n" "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} (set) 2>&1 | case $as_nl`(ac_space=' '; set) 2>&1` in #( *${as_nl}ac_space=\ *) - # 'set' does not quote correctly, so add quotes: double-quote + # `set' does not quote correctly, so add quotes: double-quote # substitution turns \\\\ into \\, and sed turns \\ into \. sed -n \ "s/'/'\\\\''/g; s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" ;; #( *) - # 'set' quotes correctly as required by POSIX, so do not add quotes. + # `set' quotes correctly as required by POSIX, so do not add quotes. sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" ;; esac | @@ -7240,6 +7069,7 @@ cat >>$CONFIG_STATUS <<\_ASEOF || as_write_fail=1 # Be more Bourne compatible DUALCASE=1; export DUALCASE # for MKS sh +as_nop=: if test ${ZSH_VERSION+y} && (emulate sh) >/dev/null 2>&1 then : emulate sh @@ -7248,13 +7078,12 @@ then : # is contrary to our usage. Disable this feature. alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST -else case e in #( - e) case `(set -o) 2>/dev/null` in #( +else $as_nop + case `(set -o) 2>/dev/null` in #( *posix*) : set -o posix ;; #( *) : ;; -esac ;; esac fi @@ -7326,7 +7155,7 @@ IFS=$as_save_IFS ;; esac -# We did not find ourselves, most probably we were run as 'sh COMMAND' +# We did not find ourselves, most probably we were run as `sh COMMAND' # in which case we are not to be found in the path. if test "x$as_myself" = x; then as_myself=$0 @@ -7355,6 +7184,7 @@ as_fn_error () } # as_fn_error + # as_fn_set_status STATUS # ----------------------- # Set $? to STATUS, without forking. @@ -7394,12 +7224,11 @@ then : { eval $1+=\$2 }' -else case e in #( - e) as_fn_append () +else $as_nop + as_fn_append () { eval $1=\$$1\$2 - } ;; -esac + } fi # as_fn_append # as_fn_arith ARG... @@ -7413,12 +7242,11 @@ then : { as_val=$(( $* )) }' -else case e in #( - e) as_fn_arith () +else $as_nop + as_fn_arith () { as_val=`expr "$@" || test $? -eq 1` - } ;; -esac + } fi # as_fn_arith @@ -7501,9 +7329,9 @@ if (echo >conf$$.file) 2>/dev/null; then if ln -s conf$$.file conf$$ 2>/dev/null; then as_ln_s='ln -s' # ... but there are two gotchas: - # 1) On MSYS, both 'ln -s file dir' and 'ln file dir' fail. - # 2) DJGPP < 2.04 has no symlinks; 'ln -s' creates a wrapper executable. - # In both cases, we have to default to 'cp -pR'. + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -pR'. ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || as_ln_s='cp -pR' elif ln conf$$.file conf$$ 2>/dev/null; then @@ -7584,12 +7412,10 @@ as_test_x='test -x' as_executable_p=as_fn_executable_p # Sed expression to map a string onto a valid CPP name. -as_sed_cpp="y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g" -as_tr_cpp="eval sed '$as_sed_cpp'" # deprecated +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" # Sed expression to map a string onto a valid variable name. -as_sed_sh="y%*+%pp%;s%[^_$as_cr_alnum]%_%g" -as_tr_sh="eval sed '$as_sed_sh'" # deprecated +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" exec 6>&1 @@ -7605,7 +7431,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 # values after options handling. ac_log=" This file was extended by RISC-V ISA Simulator $as_me ?, which was -generated by GNU Autoconf 2.72. Invocation command line was +generated by GNU Autoconf 2.71. Invocation command line was CONFIG_FILES = $CONFIG_FILES CONFIG_HEADERS = $CONFIG_HEADERS @@ -7636,7 +7462,7 @@ _ACEOF cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 ac_cs_usage="\ -'$as_me' instantiates files and other configuration actions +\`$as_me' instantiates files and other configuration actions from templates according to the current configuration. Unless the files and actions are specified as TAGs, all are instantiated by default. @@ -7669,10 +7495,10 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config='$ac_cs_config_escaped' ac_cs_version="\\ RISC-V ISA Simulator config.status ? -configured by $0, generated by GNU Autoconf 2.72, +configured by $0, generated by GNU Autoconf 2.71, with options \\"\$ac_cs_config\\" -Copyright (C) 2023 Free Software Foundation, Inc. +Copyright (C) 2021 Free Software Foundation, Inc. This config.status script is free software; the Free Software Foundation gives unlimited permission to copy, distribute and modify it." @@ -7732,8 +7558,8 @@ do ac_need_defaults=false;; --he | --h) # Conflict between --help and --header - as_fn_error $? "ambiguous option: '$1' -Try '$0 --help' for more information.";; + as_fn_error $? "ambiguous option: \`$1' +Try \`$0 --help' for more information.";; --help | --hel | -h ) printf "%s\n" "$ac_cs_usage"; exit ;; -q | -quiet | --quiet | --quie | --qui | --qu | --q \ @@ -7741,8 +7567,8 @@ Try '$0 --help' for more information.";; ac_cs_silent=: ;; # This is an error. - -*) as_fn_error $? "unrecognized option: '$1' -Try '$0 --help' for more information." ;; + -*) as_fn_error $? "unrecognized option: \`$1' +Try \`$0 --help' for more information." ;; *) as_fn_append ac_config_targets " $1" ac_need_defaults=false ;; @@ -7805,7 +7631,7 @@ do "riscv-disasm.pc") CONFIG_FILES="$CONFIG_FILES riscv-disasm.pc" ;; "riscv-riscv.pc") CONFIG_FILES="$CONFIG_FILES riscv-riscv.pc" ;; - *) as_fn_error $? "invalid argument: '$ac_config_target'" "$LINENO" 5;; + *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;; esac done @@ -7824,7 +7650,7 @@ fi # creating and moving files from /tmp can sometimes cause problems. # Hook for its removal unless debugging. # Note that there is a small window in which the directory will not be cleaned: -# after its creation but before its name has been assigned to '$tmp'. +# after its creation but before its name has been assigned to `$tmp'. $debug || { tmp= ac_tmp= @@ -7848,7 +7674,7 @@ ac_tmp=$tmp # Set up the scripts for CONFIG_FILES section. # No need to generate them if there are no CONFIG_FILES. -# This happens for instance with './config.status config.h'. +# This happens for instance with `./config.status config.h'. if test -n "$CONFIG_FILES"; then @@ -8006,13 +7832,13 @@ fi # test -n "$CONFIG_FILES" # Set up the scripts for CONFIG_HEADERS section. # No need to generate them if there are no CONFIG_HEADERS. -# This happens for instance with './config.status Makefile'. +# This happens for instance with `./config.status Makefile'. if test -n "$CONFIG_HEADERS"; then cat >"$ac_tmp/defines.awk" <<\_ACAWK || BEGIN { _ACEOF -# Transform confdefs.h into an awk script 'defines.awk', embedded as +# Transform confdefs.h into an awk script `defines.awk', embedded as # here-document in config.status, that substitutes the proper values into # config.h.in to produce config.h. @@ -8122,7 +7948,7 @@ do esac case $ac_mode$ac_tag in :[FHL]*:*);; - :L* | :C*:*) as_fn_error $? "invalid tag '$ac_tag'" "$LINENO" 5;; + :L* | :C*:*) as_fn_error $? "invalid tag \`$ac_tag'" "$LINENO" 5;; :[FH]-) ac_tag=-:-;; :[FH]*) ac_tag=$ac_tag:$ac_tag.in;; esac @@ -8144,19 +7970,19 @@ do -) ac_f="$ac_tmp/stdin";; *) # Look for the file first in the build tree, then in the source tree # (if the path is not absolute). The absolute path cannot be DOS-style, - # because $ac_f cannot contain ':'. + # because $ac_f cannot contain `:'. test -f "$ac_f" || case $ac_f in [\\/$]*) false;; *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";; esac || - as_fn_error 1 "cannot find input file: '$ac_f'" "$LINENO" 5;; + as_fn_error 1 "cannot find input file: \`$ac_f'" "$LINENO" 5;; esac case $ac_f in *\'*) ac_f=`printf "%s\n" "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac as_fn_append ac_file_inputs " '$ac_f'" done - # Let's still pretend it is 'configure' which instantiates (i.e., don't + # Let's still pretend it is `configure' which instantiates (i.e., don't # use $as_me), people would be surprised to read: # /* config.h. Generated by config.status. */ configure_input='Generated from '` @@ -8284,7 +8110,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 esac _ACEOF -# Neutralize VPATH when '$srcdir' = '.'. +# Neutralize VPATH when `$srcdir' = `.'. # Shell code in configure.ac might set extrasub. # FIXME: do we really want to maintain this feature? cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 @@ -8314,9 +8140,9 @@ test -z "$ac_datarootdir_hack$ac_datarootdir_seen" && { ac_out=`sed -n '/\${datarootdir}/p' "$ac_tmp/out"`; test -n "$ac_out"; } && { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' \ "$ac_tmp/out"`; test -z "$ac_out"; } && - { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable 'datarootdir' + { printf "%s\n" "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir' which seems to be undefined. Please make sure it is defined" >&5 -printf "%s\n" "$as_me: WARNING: $ac_file contains a reference to the variable 'datarootdir' +printf "%s\n" "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir' which seems to be undefined. Please make sure it is defined" >&2;} rm -f "$ac_tmp/stdin" diff --git a/riscv/platform.h b/riscv/platform.h index c8a5bf4bfb..81bee2e5bf 100644 --- a/riscv/platform.h +++ b/riscv/platform.h @@ -12,8 +12,8 @@ #define PLIC_SIZE 0x01000000 #define PLIC_NDEV 31 #define PLIC_PRIO_BITS 4 -#define NS16550_BASE 0x10000000 -#define NS16550_SIZE 0x100 +#define NS16550_BASE 0x1A100000 +#define NS16550_SIZE 0x8000 #define NS16550_REG_SHIFT 0 #define NS16550_REG_IO_WIDTH 1 #define NS16550_INTERRUPT_ID 1 diff --git a/riscv/riscv.ac b/riscv/riscv.ac index 80eaa4f842..af022f4850 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -8,18 +8,6 @@ AC_CHECK_LIB([boost_system], [main], [], []) AC_CHECK_LIB([boost_regex], [main], [], []) -AC_ARG_WITH(isa, - [AS_HELP_STRING([--with-isa=RV64IMAFDC_zicntr_zihpm], - [Sets the default RISC-V ISA])], - AC_DEFINE_UNQUOTED([DEFAULT_ISA], "$withval", [Default value for --isa switch]), - AC_DEFINE_UNQUOTED([DEFAULT_ISA], "RV64IMAFDC_zicntr_zihpm", [Default value for --isa switch])) - -AC_ARG_WITH(priv, - [AS_HELP_STRING([--with-priv=MSU], - [Sets the default RISC-V privilege modes supported])], - AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "$withval", [Default value for --priv switch]), - AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "MSU", [Default value for --priv switch])) - AC_ARG_WITH(varch, [AS_HELP_STRING([--with-varch=vlen:128,elen:64], [Sets the default vector config])], diff --git a/softfloat_8/softfloat.h b/softfloat_8/softfloat.h index a2dd12de2e..2f84731494 100644 --- a/softfloat_8/softfloat.h +++ b/softfloat_8/softfloat.h @@ -181,8 +181,8 @@ float8_2_t ui16_to_f8_2( uint16_t a ); float16_t i8_to_bf16( int8_t a ); float16_t ui8_to_bf16( uint8_t a ); -int8_t bf16_to_i8(float16_t input, uint_fast8_t roundingMode); -int8_t bf16_to_ui8(float16_t input, uint_fast8_t roundingMode); +//int8_t bf16_to_i8(float16_t input, uint_fast8_t roundingMode); +//int8_t bf16_to_ui8(float16_t input, uint_fast8_t roundingMode); #ifdef __cplusplus } diff --git a/softfloat_8/softfloat_8.mk.in b/softfloat_8/softfloat_8.mk.in index a7080d1fc6..280ee94738 100644 --- a/softfloat_8/softfloat_8.mk.in +++ b/softfloat_8/softfloat_8.mk.in @@ -11,8 +11,6 @@ softfloat_8_hdrs = \ softfloat_8_c_srcs = \ bf16_to_f8_1.c \ bf16_to_f8_2.c \ - bf16_to_i8.c \ - bf16_to_ui8.c \ f8_1_2_recip7_rsqrte7.c \ f8_1_add.c \ f8_1_div.c \ diff --git a/spike_main/spike.cc b/spike_main/spike.cc index bdcc79ccbc..0d1de59fda 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -396,11 +396,8 @@ int main(int argc, char** argv) parser.option(0, "pmpregions", 1, [&](const char* s){cfg.pmpregions = atoul_safe(s);}); parser.option(0, "pmpgranularity", 1, [&](const char* s){cfg.pmpgranularity = atoul_safe(s);}); parser.option(0, "priv", 1, [&](const char* s){cfg.priv = s;}); -<<<<<<< HEAD parser.option(0, "varch", 1, [&](const char* s){cfg.varch = s;}); parser.option(0, "vfp8", 1, [&](const char* s){cfg.vfp8 = s;}); -======= ->>>>>>> upstream/master parser.option(0, "device", 1, device_parser); parser.option(0, "extension", 1, [&](const char* s){extensions.push_back(find_extension(s));}); parser.option(0, "dump-dts", 0, [&](const char UNUSED *s){dump_dts = true;}); diff --git a/vfpu/kless_platform.h b/vfpu/kless_platform.h new file mode 100644 index 0000000000..d13267bdcc --- /dev/null +++ b/vfpu/kless_platform.h @@ -0,0 +1,23 @@ +// See LICENSE for license details. +#ifndef _RISCV_PLATFORM_H +#define _RISCV_PLATFORM_H + +#define DEFAULT_KERNEL_BOOTARGS "console=ttyS0 earlycon" +#define DEFAULT_RSTVEC 0x00001000 +#define DEFAULT_ISA "rv64imafdc_zicntr_zihpm" +#define DEFAULT_PRIV "MSU" +#define CLINT_BASE 0x02000000 +#define CLINT_SIZE 0x000c0000 +#define PLIC_BASE 0x0c000000 +#define PLIC_SIZE 0x01000000 +#define PLIC_NDEV 31 +#define PLIC_PRIO_BITS 4 +#define NS16550_BASE 0x9A100000 +#define NS16550_SIZE 0x100 +#define NS16550_REG_SHIFT 0 +#define NS16550_REG_IO_WIDTH 1 +#define NS16550_INTERRUPT_ID 1 +#define EXT_IO_BASE 0x40000000 +#define DRAM_BASE 0x80000000 + +#endif From b5e1f559c8b39f89019b4155084fd2261cf5ea9f Mon Sep 17 00:00:00 2001 From: aesash Date: Thu, 3 Jul 2025 07:03:02 +0200 Subject: [PATCH 13/31] update bugs --- riscv/ns16550.cc | 6 ++++-- riscv/vector_unit.cc | 4 ++-- vfpu/README | 5 ++++- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/riscv/ns16550.cc b/riscv/ns16550.cc index 15e087332c..1262ec9d81 100644 --- a/riscv/ns16550.cc +++ b/riscv/ns16550.cc @@ -171,7 +171,8 @@ bool ns16550_t::load(reg_t addr, size_t len, uint8_t* bytes) if (reg_io_width != len) { return false; } - if (addr + len > PGSIZE) { + //if (addr + len > PGSIZE) { + if (addr + len > NS16550_SIZE) { return false; } addr >>= reg_shift; @@ -234,7 +235,8 @@ bool ns16550_t::store(reg_t addr, size_t len, const uint8_t* bytes) if (reg_io_width != len) { return false; } - if (addr + len > PGSIZE) { + //if (addr + len > PGSIZE) { + if (addr + len > NS16550_SIZE) { return false; } addr >>= reg_shift; diff --git a/riscv/vector_unit.cc b/riscv/vector_unit.cc index 0a4cc78c87..51067d63c4 100644 --- a/riscv/vector_unit.cc +++ b/riscv/vector_unit.cc @@ -21,8 +21,8 @@ void vectorUnit_t::vectorUnit_t::reset() state->add_csr(CSR_VL, vl = std::make_shared(p, CSR_VL, /*mask*/ 0)); state->add_csr(CSR_VTYPE, vtype = std::make_shared(p, CSR_VTYPE, /*mask*/ 0)); state->add_csr(CSR_VLENB, std::make_shared(p, CSR_VLENB, /*mask*/ 0, /*init*/ vlenb)); - state->add_csr(CSR_VFP8, std::make_shared(p, CSR_VFP8, /*mask*/ 0, /*init*/ vlenb)); - + state->add_csr(CSR_VFP8, vfp8 = std::make_shared(p, CSR_VFP8, this)); + assert(VCSR_VXSAT_SHIFT == 0); // composite_csr_t assumes vxsat begins at bit 0 state->add_csr(CSR_VCSR, std::make_shared(p, CSR_VCSR, vxrm, vxsat, VCSR_VXRM_SHIFT)); diff --git a/vfpu/README b/vfpu/README index 5dd64f6629..3527a50e2c 100755 --- a/vfpu/README +++ b/vfpu/README @@ -2,4 +2,7 @@ clang --target=riscv64-unknown-elf --sysroot=$(dirname $(which riscv64-unknown-elf-gcc))/../riscv64-unknown-elf --gcc-toolchain=$(dirname $(which riscv64-unknown-elf-gcc))/.. -B$RISCV_BIN -march=rv64gcv -mcmodel=medany src/crt.S src/syscalls.c vfpu.c -o vfpu -I inc -nostartfiles -T src/test.ld -Wno-literal-conversion -O3 -spike --isa=rv64gcv --varch=vlen:4096,elen:8 --priv=msu vfpu +// 1-4-3 +spike --isa=rv64gcv --isa=rv64gcv_zvl4096b --vfp8=1 --priv=msu vfpu +// 1-5-2 +spike --isa=rv64gcv --isa=rv64gcv_zvl4096b --vfp8=2 --priv=msu vfpu From e86c2213f53218de0a6000fb1617676ba7da6047 Mon Sep 17 00:00:00 2001 From: aesash Date: Thu, 3 Jul 2025 07:05:00 +0200 Subject: [PATCH 14/31] added helloworld.elf --- vfpu/helloworld.elf | Bin 0 -> 88884 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100755 vfpu/helloworld.elf diff --git a/vfpu/helloworld.elf b/vfpu/helloworld.elf new file mode 100755 index 0000000000000000000000000000000000000000..ba5f8562946fb3f9cbc72b5c41d9c6fe4e546eb1 GIT binary patch literal 88884 zcmeFa33yz^l{Q>;Z{O}#Yip^sdz0L4Rl96QWuml-- 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znY^1)e80FG^*!IX5_wxwd@tOO>Y38OZh9U~@$rSwhrRm%EBCGx-@{)J+3CF!Y<&A8 zJ}fJGE&ip*f1Vuy1mxrA{uJNbS465Ae2=8~cH!5`FG|G4@{WNIeKu*NzW^VW%J{PS z@tp^YllUF*J!Q%OHWht4#dq(*oZRNV5}-0o217T8G+BNDgBtt4+T{Ng$>Xr#w<|cN d>{@$uPR?OsbeX(Gz&_t~*X88LsEb|3_dg1K2V(#L From 22ba86d061f7864d63afa61308fc788c7d952a7a Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 8 Jul 2025 15:43:17 +0200 Subject: [PATCH 16/31] modified to accept LW and SW --- riscv/platform.h | 4 ++-- spike_main/spike.cc | 7 ++++++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/riscv/platform.h b/riscv/platform.h index 81bee2e5bf..d85410f9b0 100644 --- a/riscv/platform.h +++ b/riscv/platform.h @@ -14,8 +14,8 @@ #define PLIC_PRIO_BITS 4 #define NS16550_BASE 0x1A100000 #define NS16550_SIZE 0x8000 -#define NS16550_REG_SHIFT 0 -#define NS16550_REG_IO_WIDTH 1 +#define NS16550_REG_SHIFT 2 +#define NS16550_REG_IO_WIDTH 4 #define NS16550_INTERRUPT_ID 1 #define EXT_IO_BASE 0x40000000 #define DRAM_BASE 0x80000000 diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 0d1de59fda..e4e73bbd56 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -316,7 +316,7 @@ static std::vector parse_hartids(const char *s) return hartids; } -int main(int argc, char** argv) +int spike_main(int argc, char** argv) { bool debug = false; bool halted = false; @@ -559,3 +559,8 @@ int main(int argc, char** argv) return return_code; } + +int main(int argc, char** argv) +{ + return spike_main(argc, argv); +} \ No newline at end of file From 69a02ba62cfd4f9958293c00a65ee49bbeac175f Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 8 Jul 2025 15:43:54 +0200 Subject: [PATCH 17/31] added dpi fucntion --- spike_main/spike_dpi.cc | 160 ++++++++++++++++++++++++++++++++++++ spike_main/spike_main.mk.in | 7 +- 2 files changed, 165 insertions(+), 2 deletions(-) create mode 100644 spike_main/spike_dpi.cc diff --git a/spike_main/spike_dpi.cc b/spike_main/spike_dpi.cc new file mode 100644 index 0000000000..c2465629f8 --- /dev/null +++ b/spike_main/spike_dpi.cc @@ -0,0 +1,160 @@ +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Temporarily turn all private members of Spike classes into public so we + * can call sim_t::step() (kept private upstream). */ +#pragma push_macro("private") +#undef private +#define private public +#include "sim.h" +#include "processor.h" +#include "mmu.h" +#pragma pop_macro("private") + +#include "cfg.h" /* cfg_t helper */ +#include "debug_module.h" /* debug_module_config_t */ +#include "encoding.h" /* CSR_MIP constant */ + +/* --------------------------------------------------------------------- */ +/* Helper: build sim_t */ +/* --------------------------------------------------------------------- */ +static std::unique_ptr +build_sim(const std::vector& argv) +{ + static auto cfg = std::make_unique(); // default-initialised + + return std::make_unique( // Call the sim_t constructor + cfg.get(), // halted_at_reset = false + false, + std::vector>{}, // no extra mem + std::vector{}, // no extra IO + argv, // command-line arguments + debug_module_config_t{}, nullptr, // default DM + false, nullptr, // no DTB + false, nullptr, // no socket server + std::nullopt); // unlimited trace +} + +/* ================================================================= */ +/* Spike DPI Wrapper */ +/* ================================================================= */ +class SpikeDpiWrapper { +public: + SpikeDpiWrapper(int argc, const char* const* argv) + { + std::vector av(argv, argv + argc); + sim = build_sim(av); + if (!sim) + throw std::runtime_error("Spike initialisation failed"); + } + + /* One-instruction stepping (sim_t::step() is normally private). */ + void step(uint64_t n = 1) { sim->step(n); } + /* Run until HTIF exit. */ + void run() { sim->run(); } + int exit_code() const { return sim->exit_code(); } + + /* read current PC of core 0 */ + uint64_t pc() const { return sim->get_core(0)->get_state()->pc; } + + /* ---------------- Memory helpers ---------------- */ + int load_u64(uint64_t* dst, uint64_t addr) + { + *dst = sim->get_core(0)->get_mmu()->template load(addr); + return 0; + } + + int store_bytes(uint64_t addr, uint64_t data, unsigned sz_bits) + { + auto* mmu = sim->get_core(0)->get_mmu(); + if (sz_bits == 8) mmu->template store(addr, data); + else if (sz_bits == 16) mmu->template store(addr, data); + else if (sz_bits == 32) mmu->template store(addr, data); + else if (sz_bits == 64) mmu->template store(addr, data); + else return -1; + return 0; + } + + /* ---------------- Interrupt helper -------------- */ + void set_mip(uint64_t mip_val) + { + sim->get_core(0)->put_csr(CSR_MIP, mip_val); + } + + /* ---------------- Dummy translator -------------- */ + uint64_t translate(uint64_t vaddr, uint8_t /*acc*/, uint64_t /*satp*/, + uint64_t /*priv*/, uint64_t /*mstatus*/, + uint64_t* exc) + { + if (exc) *exc = 0; + return vaddr; /* identity mapping stub */ + } + +private: + std::unique_ptr sim; +}; + +/* Single global instance */ +static std::unique_ptr g_spike; + +/* ===================================================================== */ +/* DPI-visible shims */ +/* ===================================================================== */ +extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) +{ + /* Tokenise argv_flat (space separated). */ + std::vector toks; + std::string cur; + for (const char* p = argv_flat; *p; ++p) { + if (*p == ' ') { if (!cur.empty()) { toks.push_back(cur); cur.clear(); } } + else cur.push_back(*p); + } + if (!cur.empty()) toks.push_back(cur); + + std::vector c_argv; + for (auto& s : toks) c_argv.push_back(s.c_str()); + + g_spike = std::make_unique(c_argv.size(), c_argv.data()); +} + +extern "C" void start_execution() { g_spike->run(); } +extern "C" void do_step(unsigned long long n) { g_spike->step(n); } +extern "C" int exit_code() { return g_spike->exit_code(); } + +extern "C" uint64_t spike_get_pc() { return g_spike ? g_spike->pc() : 0ull; } + +extern "C" int get_memory_data(uint64_t* d,uint64_t a) { return g_spike->load_u64(d,a); } +extern "C" int set_memory_data(uint64_t d,uint64_t a,int s){ return g_spike->store_bytes(a,d,s); } +extern "C" void spike_set_external_interrupt(uint64_t m) { g_spike->set_mip(m); } + +extern "C" uint64_t address_translate(uint64_t v, uint64_t len, int acc, + uint64_t satp, uint64_t prv, + uint64_t ms, uint64_t* exc) +{ + (void)len; + return g_spike->translate(v, static_cast(acc), satp, prv, ms, exc); +} + +/* ---------- Compatibility stubs (unimplemented) ---------------------- */ +extern "C" int run_and_inject(uint32_t, void*) { return -1; } +extern "C" int spike_run_until_vector_ins(void*) { return -1; } +extern "C" int spike_run_until_target_ins(uint64_t, void*) { return -1; } +extern "C" void get_src_vreg(int, const svOpenArrayHandle) {} +extern "C" void get_dst_vreg(int, const svOpenArrayHandle) {} +extern "C" int get_mem_addr(const svOpenArrayHandle) { return 0; } +extern "C" int get_mem_elem(const svOpenArrayHandle) { return 0; } +extern "C" uint64_t spike_get_mstatus() { return 0; } +extern "C" uint64_t l2_address_translate(uint64_t,uint64_t,int, + uint64_t,uint64_t,uint64_t, + uint64_t*,void*) { return 0; } +extern "C" void read_elf(const char*) {} +extern "C" unsigned char get_symbol_addr(const char*,uint64_t*){ return 0; } +extern "C" unsigned char is_vector(uint64_t) { return 0; } diff --git a/spike_main/spike_main.mk.in b/spike_main/spike_main.mk.in index 4ac53abd19..981b960e75 100644 --- a/spike_main/spike_main.mk.in +++ b/spike_main/spike_main.mk.in @@ -12,9 +12,12 @@ spike_main_install_prog_srcs = \ xspike.cc \ termios-xspike.cc \ -spike_main_srcs = \ +spike_main_install_shared_lib = yes -spike_main_CFLAGS = -fPIC +spike_main_srcs = \ + spike.cc \ + spike_dpi.cc +spike_main_CFLAGS = -fPIC -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd # This hack adds all symbols from extension.o to spike's dynamic symbol # table, which is required for dynamically loaded --extension libraries From 58468455758bbdbc49c023a5f62131a8b9a46847 Mon Sep 17 00:00:00 2001 From: aesash Date: Tue, 8 Jul 2025 15:44:17 +0200 Subject: [PATCH 18/31] --- vfpu/vfpu.dump | 2773 +++++++++++++++++++++++++----------------------- 1 file changed, 1423 insertions(+), 1350 deletions(-) diff --git a/vfpu/vfpu.dump b/vfpu/vfpu.dump index 1f842bc2a7..33191f94eb 100644 --- a/vfpu/vfpu.dump +++ b/vfpu/vfpu.dump @@ -36,174 +36,176 @@ Disassembly of section .text.init: 80000038: 4e81 li t4,0 8000003a: 4f01 li t5,0 8000003c: 4f81 li t6,0 - 8000003e: 62f9 lui t0,0x1e - 80000040: 3002a073 csrs mstatus,t0 - 80000044: 4285 li t0,1 - 80000046: 02fe sll t0,t0,0x1f - 80000048: 0002d863 bgez t0,80000058 <_start+0x58> - 8000004c: 4505 li a0,1 - 8000004e: 00001297 auipc t0,0x1 - 80000052: faa2a923 sw a0,-78(t0) # 80001000 - 80000056: bfdd j 8000004c <_start+0x4c> - 80000058: 00000297 auipc t0,0x0 - 8000005c: 09028293 add t0,t0,144 # 800000e8 <_start+0xe8> - 80000060: 30529073 csrw mtvec,t0 - 80000064: 00301073 fscsr zero - 80000068: f0000053 fmv.w.x ft0,zero - 8000006c: f00000d3 fmv.w.x ft1,zero - 80000070: f0000153 fmv.w.x ft2,zero - 80000074: f00001d3 fmv.w.x ft3,zero - 80000078: f0000253 fmv.w.x ft4,zero - 8000007c: f00002d3 fmv.w.x ft5,zero - 80000080: f0000353 fmv.w.x ft6,zero - 80000084: f00003d3 fmv.w.x ft7,zero - 80000088: f0000453 fmv.w.x fs0,zero - 8000008c: f00004d3 fmv.w.x fs1,zero - 80000090: f0000553 fmv.w.x fa0,zero - 80000094: f00005d3 fmv.w.x fa1,zero - 80000098: f0000653 fmv.w.x fa2,zero - 8000009c: f00006d3 fmv.w.x fa3,zero - 800000a0: f0000753 fmv.w.x fa4,zero - 800000a4: f00007d3 fmv.w.x fa5,zero - 800000a8: f0000853 fmv.w.x fa6,zero - 800000ac: f00008d3 fmv.w.x fa7,zero - 800000b0: f0000953 fmv.w.x fs2,zero - 800000b4: f00009d3 fmv.w.x fs3,zero - 800000b8: f0000a53 fmv.w.x fs4,zero - 800000bc: f0000ad3 fmv.w.x fs5,zero - 800000c0: f0000b53 fmv.w.x fs6,zero - 800000c4: f0000bd3 fmv.w.x fs7,zero - 800000c8: f0000c53 fmv.w.x fs8,zero - 800000cc: f0000cd3 fmv.w.x fs9,zero - 800000d0: f0000d53 fmv.w.x fs10,zero - 800000d4: f0000dd3 fmv.w.x fs11,zero - 800000d8: f0000e53 fmv.w.x ft8,zero - 800000dc: f0000ed3 fmv.w.x ft9,zero - 800000e0: f0000f53 fmv.w.x ft10,zero - 800000e4: f0000fd3 fmv.w.x ft11,zero - 800000e8: 00000297 auipc t0,0x0 - 800000ec: 03c28293 add t0,t0,60 # 80000124 - 800000f0: 30529073 csrw mtvec,t0 - 800000f4: 00004197 auipc gp,0x4 - 800000f8: e4418193 add gp,gp,-444 # 80003f38 <__global_pointer$> - 800000fc: 00014217 auipc tp,0x14 - 80000100: ec320213 add tp,tp,-317 # 80013fbf <_end+0x3f> - 80000104: fc027213 and tp,tp,-64 - 80000108: f1402573 csrr a0,mhartid - 8000010c: 4585 li a1,1 - 8000010e: 00b57063 bgeu a0,a1,8000010e <_start+0x10e> - 80000112: 00150113 add sp,a0,1 - 80000116: 0146 sll sp,sp,0x11 - 80000118: 9112 add sp,sp,tp - 8000011a: 01151613 sll a2,a0,0x11 - 8000011e: 9232 add tp,tp,a2 - 80000120: 0520206f j 80002172 <_init> + 8000003e: 00014217 auipc tp,0x14 + 80000042: 03a20213 add tp,tp,58 # 80014078 <_tdata_begin> + 80000046: 62f9 lui t0,0x1e + 80000048: 3002a073 csrs mstatus,t0 + 8000004c: 4285 li t0,1 + 8000004e: 02fe sll t0,t0,0x1f + 80000050: 0002d863 bgez t0,80000060 <_start+0x60> + 80000054: 4505 li a0,1 + 80000056: 00001297 auipc t0,0x1 + 8000005a: faa2a523 sw a0,-86(t0) # 80001000 + 8000005e: bfdd j 80000054 <_start+0x54> + 80000060: 00000297 auipc t0,0x0 + 80000064: 09028293 add t0,t0,144 # 800000f0 <_start+0xf0> + 80000068: 30529073 csrw mtvec,t0 + 8000006c: 00301073 fscsr zero + 80000070: f0000053 fmv.w.x ft0,zero + 80000074: f00000d3 fmv.w.x ft1,zero + 80000078: f0000153 fmv.w.x ft2,zero + 8000007c: f00001d3 fmv.w.x ft3,zero + 80000080: f0000253 fmv.w.x ft4,zero + 80000084: f00002d3 fmv.w.x ft5,zero + 80000088: f0000353 fmv.w.x ft6,zero + 8000008c: f00003d3 fmv.w.x ft7,zero + 80000090: f0000453 fmv.w.x fs0,zero + 80000094: f00004d3 fmv.w.x fs1,zero + 80000098: f0000553 fmv.w.x fa0,zero + 8000009c: f00005d3 fmv.w.x fa1,zero + 800000a0: f0000653 fmv.w.x fa2,zero + 800000a4: f00006d3 fmv.w.x fa3,zero + 800000a8: f0000753 fmv.w.x fa4,zero + 800000ac: f00007d3 fmv.w.x fa5,zero + 800000b0: f0000853 fmv.w.x fa6,zero + 800000b4: f00008d3 fmv.w.x fa7,zero + 800000b8: f0000953 fmv.w.x fs2,zero + 800000bc: f00009d3 fmv.w.x fs3,zero + 800000c0: f0000a53 fmv.w.x fs4,zero + 800000c4: f0000ad3 fmv.w.x fs5,zero + 800000c8: f0000b53 fmv.w.x fs6,zero + 800000cc: f0000bd3 fmv.w.x fs7,zero + 800000d0: f0000c53 fmv.w.x fs8,zero + 800000d4: f0000cd3 fmv.w.x fs9,zero + 800000d8: f0000d53 fmv.w.x fs10,zero + 800000dc: f0000dd3 fmv.w.x fs11,zero + 800000e0: f0000e53 fmv.w.x ft8,zero + 800000e4: f0000ed3 fmv.w.x ft9,zero + 800000e8: f0000f53 fmv.w.x ft10,zero + 800000ec: f0000fd3 fmv.w.x ft11,zero + 800000f0: 00000297 auipc t0,0x0 + 800000f4: 03c28293 add t0,t0,60 # 8000012c + 800000f8: 30529073 csrw mtvec,t0 + 800000fc: 00004197 auipc gp,0x4 + 80000100: f4418193 add gp,gp,-188 # 80004040 <__global_pointer$> + 80000104: 00014217 auipc tp,0x14 + 80000108: fbb20213 add tp,tp,-69 # 800140bf <_end+0x3f> + 8000010c: fc027213 and tp,tp,-64 + 80000110: f1402573 csrr a0,mhartid + 80000114: 4585 li a1,1 + 80000116: 00b57063 bgeu a0,a1,80000116 <_start+0x116> + 8000011a: 00150113 add sp,a0,1 + 8000011e: 0146 sll sp,sp,0x11 + 80000120: 9112 add sp,sp,tp + 80000122: 01151613 sll a2,a0,0x11 + 80000126: 9232 add tp,tp,a2 + 80000128: 04a0206f j 80002172 <_init> -0000000080000124 : - 80000124: 716d add sp,sp,-272 - 80000126: e406 sd ra,8(sp) - 80000128: e80a sd sp,16(sp) - 8000012a: ec0e sd gp,24(sp) - 8000012c: f012 sd tp,32(sp) - 8000012e: f416 sd t0,40(sp) - 80000130: f81a sd t1,48(sp) - 80000132: fc1e sd t2,56(sp) - 80000134: e0a2 sd s0,64(sp) - 80000136: e4a6 sd s1,72(sp) - 80000138: e8aa sd a0,80(sp) - 8000013a: ecae sd a1,88(sp) - 8000013c: f0b2 sd a2,96(sp) - 8000013e: f4b6 sd a3,104(sp) - 80000140: f8ba sd a4,112(sp) - 80000142: fcbe sd a5,120(sp) - 80000144: e142 sd a6,128(sp) - 80000146: e546 sd a7,136(sp) - 80000148: e94a sd s2,144(sp) - 8000014a: ed4e sd s3,152(sp) - 8000014c: f152 sd s4,160(sp) - 8000014e: f556 sd s5,168(sp) - 80000150: f95a sd s6,176(sp) - 80000152: fd5e sd s7,184(sp) - 80000154: e1e2 sd s8,192(sp) - 80000156: e5e6 sd s9,200(sp) - 80000158: e9ea sd s10,208(sp) - 8000015a: edee sd s11,216(sp) - 8000015c: f1f2 sd t3,224(sp) - 8000015e: f5f6 sd t4,232(sp) - 80000160: f9fa sd t5,240(sp) - 80000162: fdfe sd t6,248(sp) - 80000164: 34202573 csrr a0,mcause - 80000168: 341025f3 csrr a1,mepc - 8000016c: 860a mv a2,sp - 8000016e: 703010ef jal 80002070 - 80000172: 34151073 csrw mepc,a0 - 80000176: 6289 lui t0,0x2 - 80000178: 8002829b addw t0,t0,-2048 # 1800 - 8000017c: 3002a073 csrs mstatus,t0 - 80000180: 60a2 ld ra,8(sp) - 80000182: 6142 ld sp,16(sp) - 80000184: 61e2 ld gp,24(sp) - 80000186: 7202 ld tp,32(sp) - 80000188: 72a2 ld t0,40(sp) - 8000018a: 7342 ld t1,48(sp) - 8000018c: 73e2 ld t2,56(sp) - 8000018e: 6406 ld s0,64(sp) - 80000190: 64a6 ld s1,72(sp) - 80000192: 6546 ld a0,80(sp) - 80000194: 65e6 ld a1,88(sp) - 80000196: 7606 ld a2,96(sp) - 80000198: 76a6 ld a3,104(sp) - 8000019a: 7746 ld a4,112(sp) - 8000019c: 77e6 ld a5,120(sp) - 8000019e: 680a ld a6,128(sp) - 800001a0: 68aa ld a7,136(sp) - 800001a2: 694a ld s2,144(sp) - 800001a4: 69ea ld s3,152(sp) - 800001a6: 7a0a ld s4,160(sp) - 800001a8: 7aaa ld s5,168(sp) - 800001aa: 7b4a ld s6,176(sp) - 800001ac: 7bea ld s7,184(sp) - 800001ae: 6c0e ld s8,192(sp) - 800001b0: 6cae ld s9,200(sp) - 800001b2: 6d4e ld s10,208(sp) - 800001b4: 6dee ld s11,216(sp) - 800001b6: 7e0e ld t3,224(sp) - 800001b8: 7eae ld t4,232(sp) - 800001ba: 7f4e ld t5,240(sp) - 800001bc: 7fee ld t6,248(sp) - 800001be: 6151 add sp,sp,272 - 800001c0: 30200073 mret +000000008000012c : + 8000012c: 716d add sp,sp,-272 + 8000012e: e406 sd ra,8(sp) + 80000130: e80a sd sp,16(sp) + 80000132: ec0e sd gp,24(sp) + 80000134: f012 sd tp,32(sp) + 80000136: f416 sd t0,40(sp) + 80000138: f81a sd t1,48(sp) + 8000013a: fc1e sd t2,56(sp) + 8000013c: e0a2 sd s0,64(sp) + 8000013e: e4a6 sd s1,72(sp) + 80000140: e8aa sd a0,80(sp) + 80000142: ecae sd a1,88(sp) + 80000144: f0b2 sd a2,96(sp) + 80000146: f4b6 sd a3,104(sp) + 80000148: f8ba sd a4,112(sp) + 8000014a: fcbe sd a5,120(sp) + 8000014c: e142 sd a6,128(sp) + 8000014e: e546 sd a7,136(sp) + 80000150: e94a sd s2,144(sp) + 80000152: ed4e sd s3,152(sp) + 80000154: f152 sd s4,160(sp) + 80000156: f556 sd s5,168(sp) + 80000158: f95a sd s6,176(sp) + 8000015a: fd5e sd s7,184(sp) + 8000015c: e1e2 sd s8,192(sp) + 8000015e: e5e6 sd s9,200(sp) + 80000160: e9ea sd s10,208(sp) + 80000162: edee sd s11,216(sp) + 80000164: f1f2 sd t3,224(sp) + 80000166: f5f6 sd t4,232(sp) + 80000168: f9fa sd t5,240(sp) + 8000016a: fdfe sd t6,248(sp) + 8000016c: 34202573 csrr a0,mcause + 80000170: 341025f3 csrr a1,mepc + 80000174: 860a mv a2,sp + 80000176: 6fb010ef jal 80002070 + 8000017a: 34151073 csrw mepc,a0 + 8000017e: 6289 lui t0,0x2 + 80000180: 8002829b addw t0,t0,-2048 # 1800 + 80000184: 3002a073 csrs mstatus,t0 + 80000188: 60a2 ld ra,8(sp) + 8000018a: 6142 ld sp,16(sp) + 8000018c: 61e2 ld gp,24(sp) + 8000018e: 7202 ld tp,32(sp) + 80000190: 72a2 ld t0,40(sp) + 80000192: 7342 ld t1,48(sp) + 80000194: 73e2 ld t2,56(sp) + 80000196: 6406 ld s0,64(sp) + 80000198: 64a6 ld s1,72(sp) + 8000019a: 6546 ld a0,80(sp) + 8000019c: 65e6 ld a1,88(sp) + 8000019e: 7606 ld a2,96(sp) + 800001a0: 76a6 ld a3,104(sp) + 800001a2: 7746 ld a4,112(sp) + 800001a4: 77e6 ld a5,120(sp) + 800001a6: 680a ld a6,128(sp) + 800001a8: 68aa ld a7,136(sp) + 800001aa: 694a ld s2,144(sp) + 800001ac: 69ea ld s3,152(sp) + 800001ae: 7a0a ld s4,160(sp) + 800001b0: 7aaa ld s5,168(sp) + 800001b2: 7b4a ld s6,176(sp) + 800001b4: 7bea ld s7,184(sp) + 800001b6: 6c0e ld s8,192(sp) + 800001b8: 6cae ld s9,200(sp) + 800001ba: 6d4e ld s10,208(sp) + 800001bc: 6dee ld s11,216(sp) + 800001be: 7e0e ld t3,224(sp) + 800001c0: 7eae ld t4,232(sp) + 800001c2: 7f4e ld t5,240(sp) + 800001c4: 7fee ld t6,248(sp) + 800001c6: 6151 add sp,sp,272 + 800001c8: 30200073 mret Disassembly of section .text: 0000000080002000 : 80002000: b0002673 csrr a2,mcycle - 80002004: 00001597 auipc a1,0x1 - 80002008: 74c58593 add a1,a1,1868 # 80003750 + 80002004: 00002597 auipc a1,0x2 + 80002008: 85458593 add a1,a1,-1964 # 80003858 8000200c: c911 beqz a0,80002020 - 8000200e: 00001517 auipc a0,0x1 - 80002012: 73a50513 add a0,a0,1850 # 80003748 + 8000200e: 00002517 auipc a0,0x2 + 80002012: 84250513 add a0,a0,-1982 # 80003850 80002016: e110 sd a2,0(a0) 80002018: b0202573 csrr a0,minstret 8000201c: e188 sd a0,0(a1) 8000201e: 8082 ret - 80002020: 00001517 auipc a0,0x1 - 80002024: 72850513 add a0,a0,1832 # 80003748 + 80002020: 00002517 auipc a0,0x2 + 80002024: 83050513 add a0,a0,-2000 # 80003850 80002028: 6114 ld a3,0(a0) 8000202a: 8e15 sub a2,a2,a3 - 8000202c: 00001697 auipc a3,0x1 - 80002030: 72c68693 add a3,a3,1836 # 80003758 + 8000202c: 00002697 auipc a3,0x2 + 80002030: 83468693 add a3,a3,-1996 # 80003860 80002034: 00001717 auipc a4,0x1 - 80002038: 48470713 add a4,a4,1156 # 800034b8 + 80002038: 56470713 add a4,a4,1380 # 80003598 8000203c: e298 sd a4,0(a3) 8000203e: e110 sd a2,0(a0) 80002040: b0202573 csrr a0,minstret 80002044: 6190 ld a2,0(a1) 80002046: 8d11 sub a0,a0,a2 - 80002048: 00001617 auipc a2,0x1 - 8000204c: 71860613 add a2,a2,1816 # 80003760 + 80002048: 00002617 auipc a2,0x2 + 8000204c: 82060613 add a2,a2,-2016 # 80003868 80002050: 00001697 auipc a3,0x1 - 80002054: 46f68693 add a3,a3,1135 # 800034bf + 80002054: 54f68693 add a3,a3,1359 # 8000359f 80002058: e214 sd a3,0(a2) 8000205a: e188 sd a0,0(a1) 8000205c: 8082 ret @@ -298,7 +300,7 @@ Disassembly of section .text: 8000212c: 4505 li a0,1 8000212e: e42a sd a0,8(sp) 80002130: 00001517 auipc a0,0x1 - 80002134: 39850513 add a0,a0,920 # 800034c8 + 80002134: 47850513 add a0,a0,1144 # 800035a8 80002138: e82a sd a0,16(sp) 8000213a: 455d li a0,23 8000213c: ec2a sd a0,24(sp) @@ -328,1240 +330,1311 @@ Disassembly of section .text: 80002178: f5ca sd s2,232(sp) 8000217a: f1ce sd s3,224(sp) 8000217c: edd2 sd s4,216(sp) - 8000217e: 0200 add s0,sp,256 - 80002180: fc017113 and sp,sp,-64 - 80002184: 892e mv s2,a1 - 80002186: 89aa mv s3,a0 - 80002188: de82 sw zero,124(sp) - 8000218a: 18e8 add a0,sp,124 - 8000218c: 40000593 li a1,1024 - 80002190: 6599 lui a1,0x6 - 80002192: 2005859b addw a1,a1,512 # 6200 - 80002196: 30002073 csrr zero,mstatus - 8000219a: ffffa037 lui zero,0xffffa - 8000219e: 9ff0001b addw zero,zero,-1537 - 800021a2: 00007033 and zero,zero,zero - 800021a6: 0005e033 or zero,a1,zero - 800021aa: 00052023 sw zero,0(a0) - 800021ae: 30001073 csrw mstatus,zero - 800021b2: 00012597 auipc a1,0x12 - 800021b6: dbe58593 add a1,a1,-578 # 80013f70 <_tdata_begin> - 800021ba: 00012a17 auipc s4,0x12 - 800021be: db6a0a13 add s4,s4,-586 # 80013f70 <_tdata_begin> - 800021c2: 40ba0633 sub a2,s4,a1 - 800021c6: 00001097 auipc ra,0x1 - 800021ca: 9e0080e7 jalr -1568(ra) # 80002ba6 - 800021ce: 00012517 auipc a0,0x12 - 800021d2: df650513 add a0,a0,-522 # 80013fc4 <_tbss_end> - 800021d6: 41450633 sub a2,a0,s4 - 800021da: 4581 li a1,0 - 800021dc: 00001097 auipc ra,0x1 - 800021e0: a0e080e7 jalr -1522(ra) # 80002bea - 800021e4: 854e mv a0,s3 - 800021e6: 85ca mv a1,s2 - 800021e8: 00000097 auipc ra,0x0 - 800021ec: f2c080e7 jalr -212(ra) # 80002114 - 800021f0: 4501 li a0,0 - 800021f2: 4581 li a1,0 - 800021f4: 00001097 auipc ra,0x1 - 800021f8: b04080e7 jalr -1276(ra) # 80002cf8
- 800021fc: 00001597 auipc a1,0x1 - 80002200: 54c58593 add a1,a1,1356 # 80003748 - 80002204: 6194 ld a3,0(a1) - 80002206: 892a mv s2,a0 - 80002208: c295 beqz a3,8000222c <_init+0xba> - 8000220a: 00001517 auipc a0,0x1 - 8000220e: 54e50513 add a0,a0,1358 # 80003758 - 80002212: 6110 ld a2,0(a0) - 80002214: 00001597 auipc a1,0x1 - 80002218: 2cc58593 add a1,a1,716 # 800034e0 - 8000221c: 850a mv a0,sp - 8000221e: 898a mv s3,sp - 80002220: 00000097 auipc ra,0x0 - 80002224: 092080e7 jalr 146(ra) # 800022b2 - 80002228: 99aa add s3,s3,a0 - 8000222a: a011 j 8000222e <_init+0xbc> - 8000222c: 898a mv s3,sp - 8000222e: 00001517 auipc a0,0x1 - 80002232: 52250513 add a0,a0,1314 # 80003750 - 80002236: 6114 ld a3,0(a0) - 80002238: c285 beqz a3,80002258 <_init+0xe6> - 8000223a: 00001517 auipc a0,0x1 - 8000223e: 52650513 add a0,a0,1318 # 80003760 - 80002242: 6110 ld a2,0(a0) + 8000217e: e9d6 sd s5,208(sp) + 80002180: e5da sd s6,200(sp) + 80002182: 0200 add s0,sp,256 + 80002184: fc017113 and sp,sp,-64 + 80002188: 892e mv s2,a1 + 8000218a: 89aa mv s3,a0 + 8000218c: de82 sw zero,124(sp) + 8000218e: 18e8 add a0,sp,124 + 80002190: 40000593 li a1,1024 + 80002194: 6599 lui a1,0x6 + 80002196: 2005859b addw a1,a1,512 # 6200 + 8000219a: 30002073 csrr zero,mstatus + 8000219e: ffffa037 lui zero,0xffffa + 800021a2: 9ff0001b addw zero,zero,-1537 + 800021a6: 00007033 and zero,zero,zero + 800021aa: 0005e033 or zero,a1,zero + 800021ae: 00052023 sw zero,0(a0) + 800021b2: 30001073 csrw mstatus,zero + 800021b6: 6519 lui a0,0x6 + 800021b8: 6005051b addw a0,a0,1536 # 6600 + 800021bc: 30052073 csrs mstatus,a0 + 800021c0: 04000293 li t0,64 + 800021c4: 0c02f057 vsetvli zero,t0,e8,m1,ta,ma + 800021c8: 00301073 fscsr zero + 800021cc: 00006037 lui zero,0x6 + 800021d0: 30002073 csrr zero,mstatus + 800021d4: 60000013 li zero,1536 + 800021d8: 30002073 csrr zero,mstatus + 800021dc: 60000513 li a0,1536 + 800021e0: 30052073 csrs mstatus,a0 + 800021e4: 04000513 li a0,64 + 800021e8: 0c057057 vsetvli zero,a0,e8,m1,ta,ma + 800021ec: 00301073 fscsr zero + 800021f0: 8a12 mv s4,tp + 800021f2: 00012597 auipc a1,0x12 + 800021f6: e8658593 add a1,a1,-378 # 80014078 <_tdata_begin> + 800021fa: 00012b17 auipc s6,0x12 + 800021fe: e7eb0b13 add s6,s6,-386 # 80014078 <_tdata_begin> + 80002202: 40bb0ab3 sub s5,s6,a1 + 80002206: 8552 mv a0,s4 + 80002208: 8656 mv a2,s5 + 8000220a: 00001097 auipc ra,0x1 + 8000220e: 9fa080e7 jalr -1542(ra) # 80002c04 + 80002212: 015a0533 add a0,s4,s5 + 80002216: 00012597 auipc a1,0x12 + 8000221a: eae58593 add a1,a1,-338 # 800140c4 <_tbss_end> + 8000221e: 41658633 sub a2,a1,s6 + 80002222: 4581 li a1,0 + 80002224: 00001097 auipc ra,0x1 + 80002228: a24080e7 jalr -1500(ra) # 80002c48 + 8000222c: 854e mv a0,s3 + 8000222e: 85ca mv a1,s2 + 80002230: 00000097 auipc ra,0x0 + 80002234: ee4080e7 jalr -284(ra) # 80002114 + 80002238: 4501 li a0,0 + 8000223a: 4581 li a1,0 + 8000223c: 00001097 auipc ra,0x1 + 80002240: b18080e7 jalr -1256(ra) # 80002d54
80002244: 00001597 auipc a1,0x1 - 80002248: 29c58593 add a1,a1,668 # 800034e0 - 8000224c: 854e mv a0,s3 - 8000224e: 00000097 auipc ra,0x0 - 80002252: 064080e7 jalr 100(ra) # 800022b2 - 80002256: 99aa add s3,s3,a0 - 80002258: 858a mv a1,sp - 8000225a: fffff517 auipc a0,0xfffff - 8000225e: da650513 add a0,a0,-602 # 80001000 - 80002262: 04b98263 beq s3,a1,800022a6 <_init+0x134> - 80002266: 4601 li a2,0 - 80002268: 00c586b3 add a3,a1,a2 - 8000226c: 0006c683 lbu a3,0(a3) - 80002270: 0605 add a2,a2,1 - 80002272: fafd bnez a3,80002268 <_init+0xf6> - 80002274: fff60593 add a1,a2,-1 - 80002278: 04000613 li a2,64 - 8000227c: e132 sd a2,128(sp) - 8000227e: 4605 li a2,1 - 80002280: e532 sd a2,136(sp) - 80002282: 860a mv a2,sp - 80002284: e932 sd a2,144(sp) - 80002286: ed2e sd a1,152(sp) - 80002288: 0330000f fence rw,rw - 8000228c: 010c add a1,sp,128 - 8000228e: e10c sd a1,0(a0) - 80002290: fffff597 auipc a1,0xfffff - 80002294: db058593 add a1,a1,-592 # 80001040 - 80002298: 6190 ld a2,0(a1) - 8000229a: de7d beqz a2,80002298 <_init+0x126> - 8000229c: 0005b023 sd zero,0(a1) - 800022a0: 0330000f fence rw,rw - 800022a4: 658a ld a1,128(sp) - 800022a6: 00191593 sll a1,s2,0x1 - 800022aa: 0015e593 or a1,a1,1 - 800022ae: e10c sd a1,0(a0) - 800022b0: a001 j 800022b0 <_init+0x13e> + 80002248: 60c58593 add a1,a1,1548 # 80003850 + 8000224c: 6194 ld a3,0(a1) + 8000224e: 892a mv s2,a0 + 80002250: c2dd beqz a3,800022f6 <_init+0x184> + 80002252: 00001517 auipc a0,0x1 + 80002256: 60e50513 add a0,a0,1550 # 80003860 + 8000225a: 6110 ld a2,0(a0) + 8000225c: 00001597 auipc a1,0x1 + 80002260: 36458593 add a1,a1,868 # 800035c0 + 80002264: 850a mv a0,sp + 80002266: 898a mv s3,sp + 80002268: 00000097 auipc ra,0x0 + 8000226c: 09e080e7 jalr 158(ra) # 80002306 + 80002270: 99aa add s3,s3,a0 + 80002272: 00001517 auipc a0,0x1 + 80002276: 5e650513 add a0,a0,1510 # 80003858 + 8000227a: 6114 ld a3,0(a0) + 8000227c: c285 beqz a3,8000229c <_init+0x12a> + 8000227e: 00001517 auipc a0,0x1 + 80002282: 5ea50513 add a0,a0,1514 # 80003868 + 80002286: 6110 ld a2,0(a0) + 80002288: 00001597 auipc a1,0x1 + 8000228c: 33858593 add a1,a1,824 # 800035c0 + 80002290: 854e mv a0,s3 + 80002292: 00000097 auipc ra,0x0 + 80002296: 074080e7 jalr 116(ra) # 80002306 + 8000229a: 99aa add s3,s3,a0 + 8000229c: 858a mv a1,sp + 8000229e: fffff517 auipc a0,0xfffff + 800022a2: d6250513 add a0,a0,-670 # 80001000 + 800022a6: 04b98263 beq s3,a1,800022ea <_init+0x178> + 800022aa: 4601 li a2,0 + 800022ac: 00c586b3 add a3,a1,a2 + 800022b0: 0006c683 lbu a3,0(a3) + 800022b4: 0605 add a2,a2,1 + 800022b6: fafd bnez a3,800022ac <_init+0x13a> + 800022b8: fff60593 add a1,a2,-1 + 800022bc: 04000613 li a2,64 + 800022c0: e132 sd a2,128(sp) + 800022c2: 4605 li a2,1 + 800022c4: e532 sd a2,136(sp) + 800022c6: 860a mv a2,sp + 800022c8: e932 sd a2,144(sp) + 800022ca: ed2e sd a1,152(sp) + 800022cc: 0330000f fence rw,rw + 800022d0: 010c add a1,sp,128 + 800022d2: e10c sd a1,0(a0) + 800022d4: fffff597 auipc a1,0xfffff + 800022d8: d6c58593 add a1,a1,-660 # 80001040 + 800022dc: 6190 ld a2,0(a1) + 800022de: de7d beqz a2,800022dc <_init+0x16a> + 800022e0: 0005b023 sd zero,0(a1) + 800022e4: 0330000f fence rw,rw + 800022e8: 658a ld a1,128(sp) + 800022ea: 00191593 sll a1,s2,0x1 + 800022ee: 0015e593 or a1,a1,1 + 800022f2: e10c sd a1,0(a0) + 800022f4: a001 j 800022f4 <_init+0x182> + 800022f6: 898a mv s3,sp + 800022f8: 00001517 auipc a0,0x1 + 800022fc: 56050513 add a0,a0,1376 # 80003858 + 80002300: 6114 ld a3,0(a0) + 80002302: feb5 bnez a3,8000227e <_init+0x10c> + 80002304: bf61 j 8000229c <_init+0x12a> -00000000800022b2 : - 800022b2: 7161 add sp,sp,-432 - 800022b4: fe86 sd ra,376(sp) - 800022b6: faa2 sd s0,368(sp) - 800022b8: f6a6 sd s1,360(sp) - 800022ba: f2ca sd s2,352(sp) - 800022bc: eece sd s3,344(sp) - 800022be: ead2 sd s4,336(sp) - 800022c0: e6d6 sd s5,328(sp) - 800022c2: e2da sd s6,320(sp) - 800022c4: fe5e sd s7,312(sp) - 800022c6: fa62 sd s8,304(sp) - 800022c8: f666 sd s9,296(sp) - 800022ca: f26a sd s10,288(sp) - 800022cc: ee6e sd s11,280(sp) - 800022ce: 89ae mv s3,a1 - 800022d0: 82aa mv t0,a0 - 800022d2: f746 sd a7,424(sp) - 800022d4: f342 sd a6,416(sp) - 800022d6: ef3e sd a5,408(sp) - 800022d8: eb3a sd a4,400(sp) - 800022da: e736 sd a3,392(sp) - 800022dc: e332 sd a2,384(sp) - 800022de: 18010393 add t2,sp,384 - 800022e2: e81e sd t2,16(sp) - 800022e4: 01c10893 add a7,sp,28 - 800022e8: 02500a93 li s5,37 - 800022ec: 05500313 li t1,85 - 800022f0: 4c29 li s8,10 - 800022f2: 0f600c93 li s9,246 - 800022f6: 4e09 li t3,2 - 800022f8: 02d00e93 li t4,45 - 800022fc: 01810f13 add t5,sp,24 - 80002300: 4a25 li s4,9 - 80002302: 4d05 li s10,1 - 80002304: 03000f93 li t6,48 - 80002308: 07800093 li ra,120 - 8000230c: 842a mv s0,a0 - 8000230e: 4b01 li s6,0 - 80002310: 01698533 add a0,s3,s6 - 80002314: 00054583 lbu a1,0(a0) - 80002318: 2c058c63 beqz a1,800025f0 - 8000231c: 01640db3 add s11,s0,s6 - 80002320: 01558663 beq a1,s5,8000232c - 80002324: 00bd8023 sb a1,0(s11) - 80002328: 0b05 add s6,s6,1 - 8000232a: b7dd j 80002310 - 8000232c: 4801 li a6,0 - 8000232e: 00150693 add a3,a0,1 - 80002332: 02000593 li a1,32 - 80002336: 597d li s2,-1 - 80002338: 557d li a0,-1 - 8000233a: 89b6 mv s3,a3 - 8000233c: 0009c703 lbu a4,0(s3) - 80002340: fdd70493 add s1,a4,-35 - 80002344: 06936163 bltu t1,s1,800023a6 - 80002348: 87ce mv a5,s3 - 8000234a: 048e sll s1,s1,0x3 - 8000234c: 00001617 auipc a2,0x1 - 80002350: bf460613 add a2,a2,-1036 # 80002f40 - 80002354: 9626 add a2,a2,s1 - 80002356: 6210 ld a2,0(a2) - 80002358: 0985 add s3,s3,1 - 8000235a: 8602 jr a2 - 8000235c: 4901 li s2,0 - 8000235e: 0ff77613 zext.b a2,a4 - 80002362: 0017c703 lbu a4,1(a5) - 80002366: 0785 add a5,a5,1 - 80002368: 038904bb mulw s1,s2,s8 - 8000236c: 9e25 addw a2,a2,s1 - 8000236e: fc67049b addw s1,a4,-58 - 80002372: 0ff4f493 zext.b s1,s1 - 80002376: fd06091b addw s2,a2,-48 - 8000237a: ff94f2e3 bgeu s1,s9,8000235e - 8000237e: 89be mv s3,a5 - 80002380: fa055ee3 bgez a0,8000233c - 80002384: 854a mv a0,s2 - 80002386: 597d li s2,-1 - 80002388: bf55 j 8000233c - 8000238a: 85ba mv a1,a4 - 8000238c: bf45 j 8000233c - 8000238e: 0003a903 lw s2,0(t2) - 80002392: 03a1 add t2,t2,8 - 80002394: fa0554e3 bgez a0,8000233c - 80002398: b7f5 j 80002384 - 8000239a: faa041e3 bgtz a0,8000233c - 8000239e: 4501 li a0,0 - 800023a0: bf71 j 8000233c - 800023a2: 2805 addw a6,a6,1 - 800023a4: bf61 j 8000233c - 800023a6: 015d8023 sb s5,0(s11) - 800023aa: 001d8413 add s0,s11,1 - 800023ae: 89b6 mv s3,a3 - 800023b0: bfb9 j 8000230e - 800023b2: 015d8023 sb s5,0(s11) - 800023b6: 001d8413 add s0,s11,1 - 800023ba: bf91 j 8000230e - 800023bc: 00038503 lb a0,0(t2) - 800023c0: 03a1 add t2,t2,8 - 800023c2: 00ad8023 sb a0,0(s11) - 800023c6: 001d8413 add s0,s11,1 - 800023ca: b791 j 8000230e - 800023cc: 01c85463 bge a6,t3,800023d4 - 800023d0: 18080e63 beqz a6,8000256c - 800023d4: 0003b603 ld a2,0(t2) - 800023d8: 46a9 li a3,10 - 800023da: 0c065d63 bgez a2,800024b4 - 800023de: 01dd8023 sb t4,0(s11) - 800023e2: 0d85 add s11,s11,1 - 800023e4: 40c00633 neg a2,a2 - 800023e8: a0f1 j 800024b4 - 800023ea: 46a1 li a3,8 - 800023ec: 0dc84063 blt a6,t3,800024ac - 800023f0: a0c1 j 800024b0 - 800023f2: 01fd8023 sb t6,0(s11) - 800023f6: 001d80a3 sb ra,1(s11) - 800023fa: 0d89 add s11,s11,2 - 800023fc: 46c1 li a3,16 - 800023fe: a84d j 800024b0 - 80002400: 0003b483 ld s1,0(t2) - 80002404: e489 bnez s1,8000240e - 80002406: 00001497 auipc s1,0x1 - 8000240a: 0e448493 add s1,s1,228 # 800034ea - 8000240e: 00a02633 sgtz a2,a0 - 80002412: 0ff5f693 zext.b a3,a1 - 80002416: fd368693 add a3,a3,-45 - 8000241a: 00d036b3 snez a3,a3 - 8000241e: 8e75 and a2,a2,a3 - 80002420: 14060063 beqz a2,80002560 - 80002424: 8626 mv a2,s1 - 80002426: 00090d63 beqz s2,80002440 - 8000242a: 012486b3 add a3,s1,s2 - 8000242e: 874a mv a4,s2 - 80002430: 8626 mv a2,s1 - 80002432: 00064783 lbu a5,0(a2) - 80002436: c789 beqz a5,80002440 - 80002438: 177d add a4,a4,-1 - 8000243a: 0605 add a2,a2,1 - 8000243c: fb7d bnez a4,80002432 - 8000243e: 8636 mv a2,a3 - 80002440: 40c486bb subw a3,s1,a2 - 80002444: 00d50bbb addw s7,a0,a3 - 80002448: 13705863 blez s7,80002578 - 8000244c: 9d25 addw a0,a0,s1 - 8000244e: fff64613 not a2,a2 - 80002452: 9d31 addw a0,a0,a2 - 80002454: 1502 sll a0,a0,0x20 - 80002456: 9101 srl a0,a0,0x20 - 80002458: e02a sd a0,0(sp) - 8000245a: 00150613 add a2,a0,1 - 8000245e: 856e mv a0,s11 - 80002460: e416 sd t0,8(sp) - 80002462: 8bc6 mv s7,a7 - 80002464: 8d9e mv s11,t2 - 80002466: 00000097 auipc ra,0x0 - 8000246a: 784080e7 jalr 1924(ra) # 80002bea - 8000246e: 07800093 li ra,120 - 80002472: 03000f93 li t6,48 - 80002476: 01810f13 add t5,sp,24 - 8000247a: 02d00e93 li t4,45 - 8000247e: 4e09 li t3,2 - 80002480: 83ee mv t2,s11 - 80002482: 05500313 li t1,85 - 80002486: 88de mv a7,s7 - 80002488: 62a2 ld t0,8(sp) - 8000248a: 4b81 li s7,0 - 8000248c: 6502 ld a0,0(sp) - 8000248e: 9522 add a0,a0,s0 - 80002490: 955a add a0,a0,s6 - 80002492: 00150413 add s0,a0,1 - 80002496: 0004c503 lbu a0,0(s1) - 8000249a: e17d bnez a0,80002580 - 8000249c: a219 j 800025a2 - 8000249e: 46a9 li a3,10 - 800024a0: 01c85863 bge a6,t3,800024b0 - 800024a4: a021 j 800024ac - 800024a6: 46c1 li a3,16 - 800024a8: 01c85463 bge a6,t3,800024b0 - 800024ac: 0a080763 beqz a6,8000255a - 800024b0: 0003b603 ld a2,0(t2) - 800024b4: 02d67733 remu a4,a2,a3 - 800024b8: cc3a sw a4,24(sp) - 800024ba: 4485 li s1,1 - 800024bc: 00d66d63 bltu a2,a3,800024d6 - 800024c0: 4485 li s1,1 - 800024c2: 8746 mv a4,a7 - 800024c4: 02d65633 divu a2,a2,a3 - 800024c8: 02d677b3 remu a5,a2,a3 - 800024cc: 0485 add s1,s1,1 - 800024ce: c31c sw a5,0(a4) - 800024d0: 0711 add a4,a4,4 - 800024d2: fed679e3 bgeu a2,a3,800024c4 - 800024d6: 0004861b sext.w a2,s1 - 800024da: 04a65463 bge a2,a0,80002522 - 800024de: fff4c613 not a2,s1 - 800024e2: 9d31 addw a0,a0,a2 - 800024e4: 1502 sll a0,a0,0x20 - 800024e6: 02055413 srl s0,a0,0x20 - 800024ea: 00140613 add a2,s0,1 - 800024ee: 856e mv a0,s11 - 800024f0: 8916 mv s2,t0 - 800024f2: 8b46 mv s6,a7 - 800024f4: 8b9e mv s7,t2 - 800024f6: 00000097 auipc ra,0x0 - 800024fa: 6f4080e7 jalr 1780(ra) # 80002bea - 800024fe: 07800093 li ra,120 - 80002502: 03000f93 li t6,48 - 80002506: 01810f13 add t5,sp,24 - 8000250a: 02d00e93 li t4,45 - 8000250e: 4e09 li t3,2 - 80002510: 83de mv t2,s7 - 80002512: 05500313 li t1,85 - 80002516: 88da mv a7,s6 - 80002518: 82ca mv t0,s2 - 8000251a: 008d8533 add a0,s11,s0 - 8000251e: 00150d93 add s11,a0,1 - 80002522: 03a1 add t2,t2,8 - 80002524: 02049513 sll a0,s1,0x20 - 80002528: 9101 srl a0,a0,0x20 - 8000252a: 846e mv s0,s11 - 8000252c: a811 j 80002540 - 8000252e: 9db1 addw a1,a1,a2 - 80002530: 00b40023 sb a1,0(s0) - 80002534: 0405 add s0,s0,1 - 80002536: 0005059b sext.w a1,a0 - 8000253a: 157d add a0,a0,-1 - 8000253c: dcbd59e3 bge s10,a1,8000230e - 80002540: 34fd addw s1,s1,-1 - 80002542: 02049593 sll a1,s1,0x20 - 80002546: 81f9 srl a1,a1,0x1e - 80002548: 95fa add a1,a1,t5 - 8000254a: 418c lw a1,0(a1) - 8000254c: 05700613 li a2,87 - 80002550: fcba6fe3 bltu s4,a1,8000252e - 80002554: 03000613 li a2,48 - 80002558: bfd9 j 8000252e - 8000255a: 0003e603 lwu a2,0(t2) - 8000255e: bf99 j 800024b4 - 80002560: 846e mv s0,s11 - 80002562: 8baa mv s7,a0 - 80002564: 0004c503 lbu a0,0(s1) - 80002568: ed01 bnez a0,80002580 - 8000256a: a825 j 800025a2 - 8000256c: 0003a603 lw a2,0(t2) - 80002570: 46a9 li a3,10 - 80002572: f40651e3 bgez a2,800024b4 - 80002576: b5a5 j 800023de - 80002578: 846e mv s0,s11 - 8000257a: 0004c503 lbu a0,0(s1) - 8000257e: c115 beqz a0,800025a2 - 80002580: 00148593 add a1,s1,1 - 80002584: a809 j 80002596 - 80002586: 00a40023 sb a0,0(s0) - 8000258a: 0005c503 lbu a0,0(a1) - 8000258e: 0405 add s0,s0,1 - 80002590: 3bfd addw s7,s7,-1 - 80002592: 0585 add a1,a1,1 - 80002594: c519 beqz a0,800025a2 - 80002596: fe0948e3 bltz s2,80002586 - 8000259a: 00090463 beqz s2,800025a2 - 8000259e: 397d addw s2,s2,-1 - 800025a0: b7dd j 80002586 - 800025a2: 03a1 add t2,t2,8 - 800025a4: d77055e3 blez s7,8000230e - 800025a8: 020b9513 sll a0,s7,0x20 - 800025ac: 02055613 srl a2,a0,0x20 - 800025b0: 02000593 li a1,32 - 800025b4: 8522 mv a0,s0 - 800025b6: 8916 mv s2,t0 - 800025b8: 84c6 mv s1,a7 - 800025ba: 8b1e mv s6,t2 - 800025bc: 00000097 auipc ra,0x0 - 800025c0: 62e080e7 jalr 1582(ra) # 80002bea - 800025c4: 07800093 li ra,120 - 800025c8: 03000f93 li t6,48 - 800025cc: 01810f13 add t5,sp,24 - 800025d0: 02d00e93 li t4,45 - 800025d4: 4e09 li t3,2 - 800025d6: 83da mv t2,s6 - 800025d8: 05500313 li t1,85 - 800025dc: 88a6 mv a7,s1 - 800025de: 82ca mv t0,s2 - 800025e0: fffb851b addw a0,s7,-1 - 800025e4: 1502 sll a0,a0,0x20 - 800025e6: 9101 srl a0,a0,0x20 - 800025e8: 9522 add a0,a0,s0 - 800025ea: 00150413 add s0,a0,1 - 800025ee: b305 j 8000230e - 800025f0: 016405b3 add a1,s0,s6 - 800025f4: 4054053b subw a0,s0,t0 - 800025f8: 0165053b addw a0,a0,s6 - 800025fc: 00058023 sb zero,0(a1) - 80002600: 70f6 ld ra,376(sp) - 80002602: 7456 ld s0,368(sp) - 80002604: 74b6 ld s1,360(sp) - 80002606: 7916 ld s2,352(sp) - 80002608: 69f6 ld s3,344(sp) - 8000260a: 6a56 ld s4,336(sp) - 8000260c: 6ab6 ld s5,328(sp) - 8000260e: 6b16 ld s6,320(sp) - 80002610: 7bf2 ld s7,312(sp) - 80002612: 7c52 ld s8,304(sp) - 80002614: 7cb2 ld s9,296(sp) - 80002616: 7d12 ld s10,288(sp) - 80002618: 6df2 ld s11,280(sp) - 8000261a: 615d add sp,sp,432 - 8000261c: 8082 ret +0000000080002306 : + 80002306: 7161 add sp,sp,-432 + 80002308: fe86 sd ra,376(sp) + 8000230a: faa2 sd s0,368(sp) + 8000230c: f6a6 sd s1,360(sp) + 8000230e: f2ca sd s2,352(sp) + 80002310: eece sd s3,344(sp) + 80002312: ead2 sd s4,336(sp) + 80002314: e6d6 sd s5,328(sp) + 80002316: e2da sd s6,320(sp) + 80002318: fe5e sd s7,312(sp) + 8000231a: fa62 sd s8,304(sp) + 8000231c: f666 sd s9,296(sp) + 8000231e: f26a sd s10,288(sp) + 80002320: ee6e sd s11,280(sp) + 80002322: 89ae mv s3,a1 + 80002324: 82aa mv t0,a0 + 80002326: f746 sd a7,424(sp) + 80002328: f342 sd a6,416(sp) + 8000232a: ef3e sd a5,408(sp) + 8000232c: eb3a sd a4,400(sp) + 8000232e: e736 sd a3,392(sp) + 80002330: e332 sd a2,384(sp) + 80002332: 18010393 add t2,sp,384 + 80002336: e81e sd t2,16(sp) + 80002338: 01c10893 add a7,sp,28 + 8000233c: 02500a93 li s5,37 + 80002340: 05500313 li t1,85 + 80002344: 4c29 li s8,10 + 80002346: 0f600c93 li s9,246 + 8000234a: 4e09 li t3,2 + 8000234c: 02d00e93 li t4,45 + 80002350: 01810f13 add t5,sp,24 + 80002354: 4a25 li s4,9 + 80002356: 4d05 li s10,1 + 80002358: 03000f93 li t6,48 + 8000235c: 07800093 li ra,120 + 80002360: 842a mv s0,a0 + 80002362: 4b01 li s6,0 + 80002364: 01698533 add a0,s3,s6 + 80002368: 00054583 lbu a1,0(a0) + 8000236c: 2e058163 beqz a1,8000264e + 80002370: 01640db3 add s11,s0,s6 + 80002374: 01558b63 beq a1,s5,8000238a + 80002378: 00bd8023 sb a1,0(s11) + 8000237c: 0b05 add s6,s6,1 + 8000237e: 01698533 add a0,s3,s6 + 80002382: 00054583 lbu a1,0(a0) + 80002386: f5ed bnez a1,80002370 + 80002388: a4d9 j 8000264e + 8000238a: 4801 li a6,0 + 8000238c: 00150693 add a3,a0,1 + 80002390: 02000593 li a1,32 + 80002394: 597d li s2,-1 + 80002396: 557d li a0,-1 + 80002398: 89b6 mv s3,a3 + 8000239a: 0009c703 lbu a4,0(s3) + 8000239e: fdd70493 add s1,a4,-35 + 800023a2: 06936163 bltu t1,s1,80002404 + 800023a6: 87ce mv a5,s3 + 800023a8: 048e sll s1,s1,0x3 + 800023aa: 00001617 auipc a2,0x1 + 800023ae: c7660613 add a2,a2,-906 # 80003020 + 800023b2: 9626 add a2,a2,s1 + 800023b4: 6210 ld a2,0(a2) + 800023b6: 0985 add s3,s3,1 + 800023b8: 8602 jr a2 + 800023ba: 4901 li s2,0 + 800023bc: 0ff77613 zext.b a2,a4 + 800023c0: 0017c703 lbu a4,1(a5) + 800023c4: 0785 add a5,a5,1 + 800023c6: 038904bb mulw s1,s2,s8 + 800023ca: 9e25 addw a2,a2,s1 + 800023cc: fc67049b addw s1,a4,-58 + 800023d0: 0ff4f493 zext.b s1,s1 + 800023d4: fd06091b addw s2,a2,-48 + 800023d8: ff94f2e3 bgeu s1,s9,800023bc + 800023dc: 89be mv s3,a5 + 800023de: fa055ee3 bgez a0,8000239a + 800023e2: 854a mv a0,s2 + 800023e4: 597d li s2,-1 + 800023e6: bf55 j 8000239a + 800023e8: 85ba mv a1,a4 + 800023ea: bf45 j 8000239a + 800023ec: 0003a903 lw s2,0(t2) + 800023f0: 03a1 add t2,t2,8 + 800023f2: fa0554e3 bgez a0,8000239a + 800023f6: b7f5 j 800023e2 + 800023f8: faa041e3 bgtz a0,8000239a + 800023fc: 4501 li a0,0 + 800023fe: bf71 j 8000239a + 80002400: 2805 addw a6,a6,1 + 80002402: bf61 j 8000239a + 80002404: 015d8023 sb s5,0(s11) + 80002408: 001d8413 add s0,s11,1 + 8000240c: 89b6 mv s3,a3 + 8000240e: bf91 j 80002362 + 80002410: 015d8023 sb s5,0(s11) + 80002414: 001d8413 add s0,s11,1 + 80002418: b7a9 j 80002362 + 8000241a: 00038503 lb a0,0(t2) + 8000241e: 03a1 add t2,t2,8 + 80002420: 00ad8023 sb a0,0(s11) + 80002424: 001d8413 add s0,s11,1 + 80002428: bf2d j 80002362 + 8000242a: 01c85463 bge a6,t3,80002432 + 8000242e: 18080e63 beqz a6,800025ca + 80002432: 0003b603 ld a2,0(t2) + 80002436: 46a9 li a3,10 + 80002438: 0c065d63 bgez a2,80002512 + 8000243c: 01dd8023 sb t4,0(s11) + 80002440: 0d85 add s11,s11,1 + 80002442: 40c00633 neg a2,a2 + 80002446: a0f1 j 80002512 + 80002448: 46a1 li a3,8 + 8000244a: 0dc84063 blt a6,t3,8000250a + 8000244e: a0c1 j 8000250e + 80002450: 01fd8023 sb t6,0(s11) + 80002454: 001d80a3 sb ra,1(s11) + 80002458: 0d89 add s11,s11,2 + 8000245a: 46c1 li a3,16 + 8000245c: a84d j 8000250e + 8000245e: 0003b483 ld s1,0(t2) + 80002462: e489 bnez s1,8000246c + 80002464: 00001497 auipc s1,0x1 + 80002468: 16648493 add s1,s1,358 # 800035ca + 8000246c: 00a02633 sgtz a2,a0 + 80002470: 0ff5f693 zext.b a3,a1 + 80002474: fd368693 add a3,a3,-45 + 80002478: 00d036b3 snez a3,a3 + 8000247c: 8e75 and a2,a2,a3 + 8000247e: 14060063 beqz a2,800025be + 80002482: 8626 mv a2,s1 + 80002484: 00090d63 beqz s2,8000249e + 80002488: 012486b3 add a3,s1,s2 + 8000248c: 874a mv a4,s2 + 8000248e: 8626 mv a2,s1 + 80002490: 00064783 lbu a5,0(a2) + 80002494: c789 beqz a5,8000249e + 80002496: 177d add a4,a4,-1 + 80002498: 0605 add a2,a2,1 + 8000249a: fb7d bnez a4,80002490 + 8000249c: 8636 mv a2,a3 + 8000249e: 40c486bb subw a3,s1,a2 + 800024a2: 00d50bbb addw s7,a0,a3 + 800024a6: 13705863 blez s7,800025d6 + 800024aa: 9d25 addw a0,a0,s1 + 800024ac: fff64613 not a2,a2 + 800024b0: 9d31 addw a0,a0,a2 + 800024b2: 1502 sll a0,a0,0x20 + 800024b4: 9101 srl a0,a0,0x20 + 800024b6: e02a sd a0,0(sp) + 800024b8: 00150613 add a2,a0,1 + 800024bc: 856e mv a0,s11 + 800024be: e416 sd t0,8(sp) + 800024c0: 8bc6 mv s7,a7 + 800024c2: 8d9e mv s11,t2 + 800024c4: 00000097 auipc ra,0x0 + 800024c8: 784080e7 jalr 1924(ra) # 80002c48 + 800024cc: 07800093 li ra,120 + 800024d0: 03000f93 li t6,48 + 800024d4: 01810f13 add t5,sp,24 + 800024d8: 02d00e93 li t4,45 + 800024dc: 4e09 li t3,2 + 800024de: 83ee mv t2,s11 + 800024e0: 05500313 li t1,85 + 800024e4: 88de mv a7,s7 + 800024e6: 62a2 ld t0,8(sp) + 800024e8: 4b81 li s7,0 + 800024ea: 6502 ld a0,0(sp) + 800024ec: 9522 add a0,a0,s0 + 800024ee: 955a add a0,a0,s6 + 800024f0: 00150413 add s0,a0,1 + 800024f4: 0004c503 lbu a0,0(s1) + 800024f8: e17d bnez a0,800025de + 800024fa: a219 j 80002600 + 800024fc: 46a9 li a3,10 + 800024fe: 01c85863 bge a6,t3,8000250e + 80002502: a021 j 8000250a + 80002504: 46c1 li a3,16 + 80002506: 01c85463 bge a6,t3,8000250e + 8000250a: 0a080763 beqz a6,800025b8 + 8000250e: 0003b603 ld a2,0(t2) + 80002512: 02d67733 remu a4,a2,a3 + 80002516: cc3a sw a4,24(sp) + 80002518: 4485 li s1,1 + 8000251a: 00d66d63 bltu a2,a3,80002534 + 8000251e: 4485 li s1,1 + 80002520: 8746 mv a4,a7 + 80002522: 02d65633 divu a2,a2,a3 + 80002526: 02d677b3 remu a5,a2,a3 + 8000252a: 0485 add s1,s1,1 + 8000252c: c31c sw a5,0(a4) + 8000252e: 0711 add a4,a4,4 + 80002530: fed679e3 bgeu a2,a3,80002522 + 80002534: 0004861b sext.w a2,s1 + 80002538: 04a65463 bge a2,a0,80002580 + 8000253c: fff4c613 not a2,s1 + 80002540: 9d31 addw a0,a0,a2 + 80002542: 1502 sll a0,a0,0x20 + 80002544: 02055413 srl s0,a0,0x20 + 80002548: 00140613 add a2,s0,1 + 8000254c: 856e mv a0,s11 + 8000254e: 8916 mv s2,t0 + 80002550: 8b46 mv s6,a7 + 80002552: 8b9e mv s7,t2 + 80002554: 00000097 auipc ra,0x0 + 80002558: 6f4080e7 jalr 1780(ra) # 80002c48 + 8000255c: 07800093 li ra,120 + 80002560: 03000f93 li t6,48 + 80002564: 01810f13 add t5,sp,24 + 80002568: 02d00e93 li t4,45 + 8000256c: 4e09 li t3,2 + 8000256e: 83de mv t2,s7 + 80002570: 05500313 li t1,85 + 80002574: 88da mv a7,s6 + 80002576: 82ca mv t0,s2 + 80002578: 008d8533 add a0,s11,s0 + 8000257c: 00150d93 add s11,a0,1 + 80002580: 03a1 add t2,t2,8 + 80002582: 02049513 sll a0,s1,0x20 + 80002586: 9101 srl a0,a0,0x20 + 80002588: 846e mv s0,s11 + 8000258a: a811 j 8000259e + 8000258c: 9db1 addw a1,a1,a2 + 8000258e: 00b40023 sb a1,0(s0) + 80002592: 0405 add s0,s0,1 + 80002594: 0005059b sext.w a1,a0 + 80002598: 157d add a0,a0,-1 + 8000259a: dcbd54e3 bge s10,a1,80002362 + 8000259e: 34fd addw s1,s1,-1 + 800025a0: 02049593 sll a1,s1,0x20 + 800025a4: 81f9 srl a1,a1,0x1e + 800025a6: 95fa add a1,a1,t5 + 800025a8: 418c lw a1,0(a1) + 800025aa: 05700613 li a2,87 + 800025ae: fcba6fe3 bltu s4,a1,8000258c + 800025b2: 03000613 li a2,48 + 800025b6: bfd9 j 8000258c + 800025b8: 0003e603 lwu a2,0(t2) + 800025bc: bf99 j 80002512 + 800025be: 846e mv s0,s11 + 800025c0: 8baa mv s7,a0 + 800025c2: 0004c503 lbu a0,0(s1) + 800025c6: ed01 bnez a0,800025de + 800025c8: a825 j 80002600 + 800025ca: 0003a603 lw a2,0(t2) + 800025ce: 46a9 li a3,10 + 800025d0: f40651e3 bgez a2,80002512 + 800025d4: b5a5 j 8000243c + 800025d6: 846e mv s0,s11 + 800025d8: 0004c503 lbu a0,0(s1) + 800025dc: c115 beqz a0,80002600 + 800025de: 00148593 add a1,s1,1 + 800025e2: a809 j 800025f4 + 800025e4: 00a40023 sb a0,0(s0) + 800025e8: 0005c503 lbu a0,0(a1) + 800025ec: 0405 add s0,s0,1 + 800025ee: 3bfd addw s7,s7,-1 + 800025f0: 0585 add a1,a1,1 + 800025f2: c519 beqz a0,80002600 + 800025f4: fe0948e3 bltz s2,800025e4 + 800025f8: 00090463 beqz s2,80002600 + 800025fc: 397d addw s2,s2,-1 + 800025fe: b7dd j 800025e4 + 80002600: 03a1 add t2,t2,8 + 80002602: d77050e3 blez s7,80002362 + 80002606: 020b9513 sll a0,s7,0x20 + 8000260a: 02055613 srl a2,a0,0x20 + 8000260e: 02000593 li a1,32 + 80002612: 8522 mv a0,s0 + 80002614: 8916 mv s2,t0 + 80002616: 84c6 mv s1,a7 + 80002618: 8b1e mv s6,t2 + 8000261a: 00000097 auipc ra,0x0 + 8000261e: 62e080e7 jalr 1582(ra) # 80002c48 + 80002622: 07800093 li ra,120 + 80002626: 03000f93 li t6,48 + 8000262a: 01810f13 add t5,sp,24 + 8000262e: 02d00e93 li t4,45 + 80002632: 4e09 li t3,2 + 80002634: 83da mv t2,s6 + 80002636: 05500313 li t1,85 + 8000263a: 88a6 mv a7,s1 + 8000263c: 82ca mv t0,s2 + 8000263e: fffb851b addw a0,s7,-1 + 80002642: 1502 sll a0,a0,0x20 + 80002644: 9101 srl a0,a0,0x20 + 80002646: 9522 add a0,a0,s0 + 80002648: 00150413 add s0,a0,1 + 8000264c: bb19 j 80002362 + 8000264e: 016405b3 add a1,s0,s6 + 80002652: 4054053b subw a0,s0,t0 + 80002656: 0165053b addw a0,a0,s6 + 8000265a: 00058023 sb zero,0(a1) + 8000265e: 70f6 ld ra,376(sp) + 80002660: 7456 ld s0,368(sp) + 80002662: 74b6 ld s1,360(sp) + 80002664: 7916 ld s2,352(sp) + 80002666: 69f6 ld s3,344(sp) + 80002668: 6a56 ld s4,336(sp) + 8000266a: 6ab6 ld s5,328(sp) + 8000266c: 6b16 ld s6,320(sp) + 8000266e: 7bf2 ld s7,312(sp) + 80002670: 7c52 ld s8,304(sp) + 80002672: 7cb2 ld s9,296(sp) + 80002674: 7d12 ld s10,288(sp) + 80002676: 6df2 ld s11,280(sp) + 80002678: 615d add sp,sp,432 + 8000267a: 8082 ret -000000008000261e : - 8000261e: 7119 add sp,sp,-128 - 80002620: fc86 sd ra,120(sp) - 80002622: f8a2 sd s0,112(sp) - 80002624: 0100 add s0,sp,128 - 80002626: fc017113 and sp,sp,-64 - 8000262a: 000005b7 lui a1,0x0 - 8000262e: 00458633 add a2,a1,tp - 80002632: 04062683 lw a3,64(a2) - 80002636: 0016859b addw a1,a3,1 - 8000263a: fc058713 add a4,a1,-64 # ffffffffffffffc0 <_tbss_end+0xffffffff7ffebffc> - 8000263e: 00173713 seqz a4,a4 - 80002642: 04b62023 sw a1,64(a2) - 80002646: ff650613 add a2,a0,-10 - 8000264a: 00163613 seqz a2,a2 - 8000264e: 8f51 or a4,a4,a2 - 80002650: 00000637 lui a2,0x0 - 80002654: 00460633 add a2,a2,tp - 80002658: 00060613 mv a2,a2 - 8000265c: 96b2 add a3,a3,a2 - 8000265e: 00a68023 sb a0,0(a3) - 80002662: c329 beqz a4,800026a4 - 80002664: 04000513 li a0,64 - 80002668: e02a sd a0,0(sp) - 8000266a: 4505 li a0,1 - 8000266c: e42a sd a0,8(sp) - 8000266e: e832 sd a2,16(sp) - 80002670: ec2e sd a1,24(sp) - 80002672: 0330000f fence rw,rw - 80002676: fffff517 auipc a0,0xfffff - 8000267a: 98a50513 add a0,a0,-1654 # 80001000 - 8000267e: 858a mv a1,sp - 80002680: e10c sd a1,0(a0) - 80002682: fffff517 auipc a0,0xfffff - 80002686: 9be50513 add a0,a0,-1602 # 80001040 - 8000268a: 610c ld a1,0(a0) - 8000268c: ddfd beqz a1,8000268a - 8000268e: 00053023 sd zero,0(a0) - 80002692: 0330000f fence rw,rw - 80002696: 6502 ld a0,0(sp) - 80002698: 00000537 lui a0,0x0 - 8000269c: 00450533 add a0,a0,tp - 800026a0: 04052023 sw zero,64(a0) # 40 - 800026a4: 4501 li a0,0 - 800026a6: f8040113 add sp,s0,-128 - 800026aa: 70e6 ld ra,120(sp) - 800026ac: 7446 ld s0,112(sp) - 800026ae: 6109 add sp,sp,128 - 800026b0: 8082 ret +000000008000267c : + 8000267c: 7119 add sp,sp,-128 + 8000267e: fc86 sd ra,120(sp) + 80002680: f8a2 sd s0,112(sp) + 80002682: 0100 add s0,sp,128 + 80002684: fc017113 and sp,sp,-64 + 80002688: 000005b7 lui a1,0x0 + 8000268c: 00458633 add a2,a1,tp + 80002690: 04062683 lw a3,64(a2) + 80002694: 0016859b addw a1,a3,1 + 80002698: fc058713 add a4,a1,-64 # ffffffffffffffc0 <_tbss_end+0xffffffff7ffebefc> + 8000269c: 00173713 seqz a4,a4 + 800026a0: 04b62023 sw a1,64(a2) + 800026a4: ff650613 add a2,a0,-10 + 800026a8: 00163613 seqz a2,a2 + 800026ac: 8f51 or a4,a4,a2 + 800026ae: 00000637 lui a2,0x0 + 800026b2: 00460633 add a2,a2,tp + 800026b6: 00060613 mv a2,a2 + 800026ba: 96b2 add a3,a3,a2 + 800026bc: 00a68023 sb a0,0(a3) + 800026c0: c329 beqz a4,80002702 + 800026c2: 04000513 li a0,64 + 800026c6: e02a sd a0,0(sp) + 800026c8: 4505 li a0,1 + 800026ca: e42a sd a0,8(sp) + 800026cc: e832 sd a2,16(sp) + 800026ce: ec2e sd a1,24(sp) + 800026d0: 0330000f fence rw,rw + 800026d4: fffff517 auipc a0,0xfffff + 800026d8: 92c50513 add a0,a0,-1748 # 80001000 + 800026dc: 858a mv a1,sp + 800026de: e10c sd a1,0(a0) + 800026e0: fffff517 auipc a0,0xfffff + 800026e4: 96050513 add a0,a0,-1696 # 80001040 + 800026e8: 610c ld a1,0(a0) + 800026ea: ddfd beqz a1,800026e8 + 800026ec: 00053023 sd zero,0(a0) + 800026f0: 0330000f fence rw,rw + 800026f4: 6502 ld a0,0(sp) + 800026f6: 00000537 lui a0,0x0 + 800026fa: 00450533 add a0,a0,tp + 800026fe: 04052023 sw zero,64(a0) # 40 + 80002702: 4501 li a0,0 + 80002704: f8040113 add sp,s0,-128 + 80002708: 70e6 ld ra,120(sp) + 8000270a: 7446 ld s0,112(sp) + 8000270c: 6109 add sp,sp,128 + 8000270e: 8082 ret -00000000800026b2 : - 800026b2: 7131 add sp,sp,-192 - 800026b4: fd06 sd ra,184(sp) - 800026b6: f922 sd s0,176(sp) - 800026b8: 0180 add s0,sp,192 - 800026ba: fc017113 and sp,sp,-64 - 800026be: 00f57693 and a3,a0,15 - 800026c2: 03000593 li a1,48 - 800026c6: 4629 li a2,10 - 800026c8: 03000713 li a4,48 - 800026cc: 00c6e463 bltu a3,a2,800026d4 - 800026d0: 05700713 li a4,87 - 800026d4: 9eb9 addw a3,a3,a4 - 800026d6: 02d10f23 sb a3,62(sp) - 800026da: 00455693 srl a3,a0,0x4 - 800026de: 8abd and a3,a3,15 - 800026e0: 03000713 li a4,48 - 800026e4: 00c6e463 bltu a3,a2,800026ec - 800026e8: 05700713 li a4,87 - 800026ec: 9eb9 addw a3,a3,a4 - 800026ee: 02d10ea3 sb a3,61(sp) - 800026f2: 00855693 srl a3,a0,0x8 - 800026f6: 8abd and a3,a3,15 - 800026f8: 03000713 li a4,48 - 800026fc: 00c6e463 bltu a3,a2,80002704 - 80002700: 05700713 li a4,87 - 80002704: 9eb9 addw a3,a3,a4 - 80002706: 02d10e23 sb a3,60(sp) - 8000270a: 00c55693 srl a3,a0,0xc - 8000270e: 8abd and a3,a3,15 - 80002710: 03000713 li a4,48 - 80002714: 00c6e463 bltu a3,a2,8000271c - 80002718: 05700713 li a4,87 - 8000271c: 9eb9 addw a3,a3,a4 - 8000271e: 02d10da3 sb a3,59(sp) - 80002722: 01055693 srl a3,a0,0x10 - 80002726: 8abd and a3,a3,15 - 80002728: 03000713 li a4,48 - 8000272c: 00c6e463 bltu a3,a2,80002734 - 80002730: 05700713 li a4,87 - 80002734: 9eb9 addw a3,a3,a4 - 80002736: 02d10d23 sb a3,58(sp) - 8000273a: 01455693 srl a3,a0,0x14 - 8000273e: 8abd and a3,a3,15 - 80002740: 03000713 li a4,48 - 80002744: 00c6e463 bltu a3,a2,8000274c - 80002748: 05700713 li a4,87 - 8000274c: 9eb9 addw a3,a3,a4 - 8000274e: 02d10ca3 sb a3,57(sp) - 80002752: 01855693 srl a3,a0,0x18 - 80002756: 8abd and a3,a3,15 - 80002758: 03000713 li a4,48 - 8000275c: 00c6e463 bltu a3,a2,80002764 - 80002760: 05700713 li a4,87 - 80002764: 9eb9 addw a3,a3,a4 - 80002766: 02d10c23 sb a3,56(sp) - 8000276a: 01c5569b srlw a3,a0,0x1c +0000000080002710 : + 80002710: 7131 add sp,sp,-192 + 80002712: fd06 sd ra,184(sp) + 80002714: f922 sd s0,176(sp) + 80002716: 0180 add s0,sp,192 + 80002718: fc017113 and sp,sp,-64 + 8000271c: 00f57693 and a3,a0,15 + 80002720: 03000593 li a1,48 + 80002724: 4629 li a2,10 + 80002726: 03000713 li a4,48 + 8000272a: 00c6e463 bltu a3,a2,80002732 + 8000272e: 05700713 li a4,87 + 80002732: 9eb9 addw a3,a3,a4 + 80002734: 02d10f23 sb a3,62(sp) + 80002738: 00455693 srl a3,a0,0x4 + 8000273c: 8abd and a3,a3,15 + 8000273e: 03000713 li a4,48 + 80002742: 00c6e463 bltu a3,a2,8000274a + 80002746: 05700713 li a4,87 + 8000274a: 9eb9 addw a3,a3,a4 + 8000274c: 02d10ea3 sb a3,61(sp) + 80002750: 00855693 srl a3,a0,0x8 + 80002754: 8abd and a3,a3,15 + 80002756: 03000713 li a4,48 + 8000275a: 00c6e463 bltu a3,a2,80002762 + 8000275e: 05700713 li a4,87 + 80002762: 9eb9 addw a3,a3,a4 + 80002764: 02d10e23 sb a3,60(sp) + 80002768: 00c55693 srl a3,a0,0xc + 8000276c: 8abd and a3,a3,15 8000276e: 03000713 li a4,48 - 80002772: 00c6e463 bltu a3,a2,8000277a + 80002772: 00c6e463 bltu a3,a2,8000277a 80002776: 05700713 li a4,87 8000277a: 9eb9 addw a3,a3,a4 - 8000277c: 02d10ba3 sb a3,55(sp) - 80002780: 02055693 srl a3,a0,0x20 + 8000277c: 02d10da3 sb a3,59(sp) + 80002780: 01055693 srl a3,a0,0x10 80002784: 8abd and a3,a3,15 80002786: 03000713 li a4,48 - 8000278a: 00c6e463 bltu a3,a2,80002792 + 8000278a: 00c6e463 bltu a3,a2,80002792 8000278e: 05700713 li a4,87 80002792: 9eb9 addw a3,a3,a4 - 80002794: 02d10b23 sb a3,54(sp) - 80002798: 02455693 srl a3,a0,0x24 + 80002794: 02d10d23 sb a3,58(sp) + 80002798: 01455693 srl a3,a0,0x14 8000279c: 8abd and a3,a3,15 8000279e: 03000713 li a4,48 - 800027a2: 00c6e463 bltu a3,a2,800027aa + 800027a2: 00c6e463 bltu a3,a2,800027aa 800027a6: 05700713 li a4,87 800027aa: 9eb9 addw a3,a3,a4 - 800027ac: 02d10aa3 sb a3,53(sp) - 800027b0: 02855693 srl a3,a0,0x28 + 800027ac: 02d10ca3 sb a3,57(sp) + 800027b0: 01855693 srl a3,a0,0x18 800027b4: 8abd and a3,a3,15 800027b6: 03000713 li a4,48 - 800027ba: 00c6e463 bltu a3,a2,800027c2 + 800027ba: 00c6e463 bltu a3,a2,800027c2 800027be: 05700713 li a4,87 800027c2: 9eb9 addw a3,a3,a4 - 800027c4: 02d10a23 sb a3,52(sp) - 800027c8: 02c55693 srl a3,a0,0x2c - 800027cc: 8abd and a3,a3,15 - 800027ce: 03000713 li a4,48 - 800027d2: 00c6e463 bltu a3,a2,800027da - 800027d6: 05700713 li a4,87 - 800027da: 9eb9 addw a3,a3,a4 - 800027dc: 02d109a3 sb a3,51(sp) - 800027e0: 03055693 srl a3,a0,0x30 - 800027e4: 8abd and a3,a3,15 - 800027e6: 03000713 li a4,48 - 800027ea: 00c6e463 bltu a3,a2,800027f2 - 800027ee: 05700713 li a4,87 - 800027f2: 9eb9 addw a3,a3,a4 - 800027f4: 02d10923 sb a3,50(sp) - 800027f8: 03455693 srl a3,a0,0x34 - 800027fc: 8abd and a3,a3,15 - 800027fe: 03000713 li a4,48 - 80002802: 00c6e463 bltu a3,a2,8000280a - 80002806: 05700713 li a4,87 - 8000280a: 9eb9 addw a3,a3,a4 - 8000280c: 02d108a3 sb a3,49(sp) - 80002810: 03855693 srl a3,a0,0x38 - 80002814: 8abd and a3,a3,15 - 80002816: 03000713 li a4,48 - 8000281a: 00c6e463 bltu a3,a2,80002822 - 8000281e: 05700713 li a4,87 - 80002822: 00d7063b addw a2,a4,a3 - 80002826: 02c10823 sb a2,48(sp) - 8000282a: 03d55613 srl a2,a0,0x3d - 8000282e: 4695 li a3,5 - 80002830: 9171 srl a0,a0,0x3c - 80002832: 00d66463 bltu a2,a3,8000283a - 80002836: 05700593 li a1,87 - 8000283a: 952e add a0,a0,a1 - 8000283c: 02a107a3 sb a0,47(sp) - 80002840: 02010fa3 sb zero,63(sp) - 80002844: c901 beqz a0,80002854 - 80002846: 02f10513 add a0,sp,47 - 8000284a: 00154583 lbu a1,1(a0) - 8000284e: 0505 add a0,a0,1 - 80002850: fded bnez a1,8000284a - 80002852: a019 j 80002858 - 80002854: 02f10513 add a0,sp,47 - 80002858: 02f10593 add a1,sp,47 - 8000285c: 8d0d sub a0,a0,a1 - 8000285e: 04000613 li a2,64 - 80002862: e0b2 sd a2,64(sp) - 80002864: 4605 li a2,1 - 80002866: e4b2 sd a2,72(sp) - 80002868: e8ae sd a1,80(sp) - 8000286a: ecaa sd a0,88(sp) - 8000286c: 0330000f fence rw,rw - 80002870: ffffe517 auipc a0,0xffffe - 80002874: 79050513 add a0,a0,1936 # 80001000 - 80002878: 008c add a1,sp,64 - 8000287a: e10c sd a1,0(a0) - 8000287c: ffffe517 auipc a0,0xffffe - 80002880: 7c450513 add a0,a0,1988 # 80001040 - 80002884: 610c ld a1,0(a0) - 80002886: ddfd beqz a1,80002884 - 80002888: 00053023 sd zero,0(a0) - 8000288c: 0330000f fence rw,rw - 80002890: 6506 ld a0,64(sp) - 80002892: f4040113 add sp,s0,-192 - 80002896: 70ea ld ra,184(sp) - 80002898: 744a ld s0,176(sp) - 8000289a: 6129 add sp,sp,192 - 8000289c: 8082 ret + 800027c4: 02d10c23 sb a3,56(sp) + 800027c8: 01c5569b srlw a3,a0,0x1c + 800027cc: 03000713 li a4,48 + 800027d0: 00c6e463 bltu a3,a2,800027d8 + 800027d4: 05700713 li a4,87 + 800027d8: 9eb9 addw a3,a3,a4 + 800027da: 02d10ba3 sb a3,55(sp) + 800027de: 02055693 srl a3,a0,0x20 + 800027e2: 8abd and a3,a3,15 + 800027e4: 03000713 li a4,48 + 800027e8: 00c6e463 bltu a3,a2,800027f0 + 800027ec: 05700713 li a4,87 + 800027f0: 9eb9 addw a3,a3,a4 + 800027f2: 02d10b23 sb a3,54(sp) + 800027f6: 02455693 srl a3,a0,0x24 + 800027fa: 8abd and a3,a3,15 + 800027fc: 03000713 li a4,48 + 80002800: 00c6e463 bltu a3,a2,80002808 + 80002804: 05700713 li a4,87 + 80002808: 9eb9 addw a3,a3,a4 + 8000280a: 02d10aa3 sb a3,53(sp) + 8000280e: 02855693 srl a3,a0,0x28 + 80002812: 8abd and a3,a3,15 + 80002814: 03000713 li a4,48 + 80002818: 00c6e463 bltu a3,a2,80002820 + 8000281c: 05700713 li a4,87 + 80002820: 9eb9 addw a3,a3,a4 + 80002822: 02d10a23 sb a3,52(sp) + 80002826: 02c55693 srl a3,a0,0x2c + 8000282a: 8abd and a3,a3,15 + 8000282c: 03000713 li a4,48 + 80002830: 00c6e463 bltu a3,a2,80002838 + 80002834: 05700713 li a4,87 + 80002838: 9eb9 addw a3,a3,a4 + 8000283a: 02d109a3 sb a3,51(sp) + 8000283e: 03055693 srl a3,a0,0x30 + 80002842: 8abd and a3,a3,15 + 80002844: 03000713 li a4,48 + 80002848: 00c6e463 bltu a3,a2,80002850 + 8000284c: 05700713 li a4,87 + 80002850: 9eb9 addw a3,a3,a4 + 80002852: 02d10923 sb a3,50(sp) + 80002856: 03455693 srl a3,a0,0x34 + 8000285a: 8abd and a3,a3,15 + 8000285c: 03000713 li a4,48 + 80002860: 00c6e463 bltu a3,a2,80002868 + 80002864: 05700713 li a4,87 + 80002868: 9eb9 addw a3,a3,a4 + 8000286a: 02d108a3 sb a3,49(sp) + 8000286e: 03855693 srl a3,a0,0x38 + 80002872: 8abd and a3,a3,15 + 80002874: 03000713 li a4,48 + 80002878: 00c6e463 bltu a3,a2,80002880 + 8000287c: 05700713 li a4,87 + 80002880: 00d7063b addw a2,a4,a3 + 80002884: 02c10823 sb a2,48(sp) + 80002888: 03d55613 srl a2,a0,0x3d + 8000288c: 4695 li a3,5 + 8000288e: 9171 srl a0,a0,0x3c + 80002890: 00d66463 bltu a2,a3,80002898 + 80002894: 05700593 li a1,87 + 80002898: 952e add a0,a0,a1 + 8000289a: 02a107a3 sb a0,47(sp) + 8000289e: 02010fa3 sb zero,63(sp) + 800028a2: c901 beqz a0,800028b2 + 800028a4: 02f10513 add a0,sp,47 + 800028a8: 00154583 lbu a1,1(a0) + 800028ac: 0505 add a0,a0,1 + 800028ae: fded bnez a1,800028a8 + 800028b0: a019 j 800028b6 + 800028b2: 02f10513 add a0,sp,47 + 800028b6: 02f10593 add a1,sp,47 + 800028ba: 8d0d sub a0,a0,a1 + 800028bc: 04000613 li a2,64 + 800028c0: e0b2 sd a2,64(sp) + 800028c2: 4605 li a2,1 + 800028c4: e4b2 sd a2,72(sp) + 800028c6: e8ae sd a1,80(sp) + 800028c8: ecaa sd a0,88(sp) + 800028ca: 0330000f fence rw,rw + 800028ce: ffffe517 auipc a0,0xffffe + 800028d2: 73250513 add a0,a0,1842 # 80001000 + 800028d6: 008c add a1,sp,64 + 800028d8: e10c sd a1,0(a0) + 800028da: ffffe517 auipc a0,0xffffe + 800028de: 76650513 add a0,a0,1894 # 80001040 + 800028e2: 610c ld a1,0(a0) + 800028e4: ddfd beqz a1,800028e2 + 800028e6: 00053023 sd zero,0(a0) + 800028ea: 0330000f fence rw,rw + 800028ee: 6506 ld a0,64(sp) + 800028f0: f4040113 add sp,s0,-192 + 800028f4: 70ea ld ra,184(sp) + 800028f6: 744a ld s0,176(sp) + 800028f8: 6129 add sp,sp,192 + 800028fa: 8082 ret -000000008000289e : - 8000289e: 7121 add sp,sp,-448 - 800028a0: fe86 sd ra,376(sp) - 800028a2: faa2 sd s0,368(sp) - 800028a4: f6a6 sd s1,360(sp) - 800028a6: f2ca sd s2,352(sp) - 800028a8: eece sd s3,344(sp) - 800028aa: ead2 sd s4,336(sp) - 800028ac: e6d6 sd s5,328(sp) - 800028ae: e2da sd s6,320(sp) - 800028b0: fe5e sd s7,312(sp) - 800028b2: fa62 sd s8,304(sp) - 800028b4: f666 sd s9,296(sp) - 800028b6: f26a sd s10,288(sp) - 800028b8: ee6e sd s11,280(sp) - 800028ba: 8b2a mv s6,a0 - 800028bc: ff46 sd a7,440(sp) - 800028be: fb42 sd a6,432(sp) - 800028c0: f73e sd a5,424(sp) - 800028c2: f33a sd a4,416(sp) - 800028c4: ef36 sd a3,408(sp) - 800028c6: eb32 sd a2,400(sp) - 800028c8: e72e sd a1,392(sp) - 800028ca: 032c add a1,sp,392 - 800028cc: 0328 add a0,sp,392 - 800028ce: e42a sd a0,8(sp) - 800028d0: e82e sd a1,16(sp) - 800028d2: 02500993 li s3,37 - 800028d6: 05500493 li s1,85 - 800028da: 00001a97 auipc s5,0x1 - 800028de: 916a8a93 add s5,s5,-1770 # 800031f0 - 800028e2: 4ba9 li s7,10 - 800028e4: 0f600c13 li s8,246 - 800028e8: 01810d13 add s10,sp,24 - 800028ec: 4da5 li s11,9 - 800028ee: 4905 li s2,1 - 800028f0: 001b0413 add s0,s6,1 - 800028f4: fff44503 lbu a0,-1(s0) - 800028f8: 28050063 beqz a0,80002b78 - 800028fc: 01350b63 beq a0,s3,80002912 - 80002900: 00000097 auipc ra,0x0 - 80002904: d1e080e7 jalr -738(ra) # 8000261e - 80002908: 0405 add s0,s0,1 - 8000290a: fff44503 lbu a0,-1(s0) - 8000290e: f57d bnez a0,800028fc - 80002910: a4a5 j 80002b78 - 80002912: 4501 li a0,0 - 80002914: 02000793 li a5,32 - 80002918: 5cfd li s9,-1 - 8000291a: 5a7d li s4,-1 - 8000291c: 8b22 mv s6,s0 - 8000291e: 000b4583 lbu a1,0(s6) - 80002922: fdd58693 add a3,a1,-35 - 80002926: 04d4ef63 bltu s1,a3,80002984 - 8000292a: 865a mv a2,s6 - 8000292c: 068e sll a3,a3,0x3 - 8000292e: 96d6 add a3,a3,s5 - 80002930: 6294 ld a3,0(a3) - 80002932: 0b05 add s6,s6,1 - 80002934: 8682 jr a3 - 80002936: 4c81 li s9,0 - 80002938: 0ff5f693 zext.b a3,a1 - 8000293c: 00164583 lbu a1,1(a2) # 1 - 80002940: 0605 add a2,a2,1 - 80002942: 037c873b mulw a4,s9,s7 - 80002946: 9eb9 addw a3,a3,a4 - 80002948: fc65871b addw a4,a1,-58 - 8000294c: 0ff77713 zext.b a4,a4 - 80002950: fd068c9b addw s9,a3,-48 - 80002954: ff8772e3 bgeu a4,s8,80002938 - 80002958: 8b32 mv s6,a2 - 8000295a: fc0a52e3 bgez s4,8000291e - 8000295e: 8a66 mv s4,s9 - 80002960: 5cfd li s9,-1 - 80002962: bf75 j 8000291e - 80002964: 87ae mv a5,a1 - 80002966: bf65 j 8000291e - 80002968: 65a2 ld a1,8(sp) - 8000296a: 0005ac83 lw s9,0(a1) - 8000296e: 05a1 add a1,a1,8 - 80002970: e42e sd a1,8(sp) - 80002972: fa0a56e3 bgez s4,8000291e - 80002976: b7e5 j 8000295e - 80002978: fb4043e3 bgtz s4,8000291e - 8000297c: 4a01 li s4,0 - 8000297e: b745 j 8000291e - 80002980: 2505 addw a0,a0,1 - 80002982: bf71 j 8000291e - 80002984: 02500513 li a0,37 - 80002988: 00000097 auipc ra,0x0 - 8000298c: c96080e7 jalr -874(ra) # 8000261e - 80002990: 8b22 mv s6,s0 - 80002992: bfb9 j 800028f0 - 80002994: 02500513 li a0,37 - 80002998: 00000097 auipc ra,0x0 - 8000299c: c86080e7 jalr -890(ra) # 8000261e - 800029a0: bf81 j 800028f0 - 800029a2: 65a2 ld a1,8(sp) - 800029a4: 4188 lw a0,0(a1) - 800029a6: 00858413 add s0,a1,8 - 800029aa: 00000097 auipc ra,0x0 - 800029ae: c74080e7 jalr -908(ra) # 8000261e - 800029b2: e422 sd s0,8(sp) - 800029b4: bf35 j 800028f0 - 800029b6: 4589 li a1,2 - 800029b8: 00b55463 bge a0,a1,800029c0 - 800029bc: 1a050863 beqz a0,80002b6c - 800029c0: 6522 ld a0,8(sp) - 800029c2: 6100 ld s0,0(a0) - 800029c4: 4ca9 li s9,10 - 800029c6: 0c045563 bgez s0,80002a90 - 800029ca: 02d00513 li a0,45 - 800029ce: 84be mv s1,a5 - 800029d0: 00000097 auipc ra,0x0 - 800029d4: c4e080e7 jalr -946(ra) # 8000261e - 800029d8: 87a6 mv a5,s1 - 800029da: 40800433 neg s0,s0 - 800029de: a84d j 80002a90 - 800029e0: 4ca1 li s9,8 - 800029e2: 4589 li a1,2 - 800029e4: 0ab54363 blt a0,a1,80002a8a - 800029e8: a055 j 80002a8c - 800029ea: 03000513 li a0,48 - 800029ee: 843e mv s0,a5 - 800029f0: 00000097 auipc ra,0x0 - 800029f4: c2e080e7 jalr -978(ra) # 8000261e - 800029f8: 07800513 li a0,120 - 800029fc: 00000097 auipc ra,0x0 - 80002a00: c22080e7 jalr -990(ra) # 8000261e - 80002a04: 87a2 mv a5,s0 - 80002a06: 4cc1 li s9,16 - 80002a08: a051 j 80002a8c - 80002a0a: 6522 ld a0,8(sp) - 80002a0c: 6118 ld a4,0(a0) - 80002a0e: e709 bnez a4,80002a18 - 80002a10: 00001717 auipc a4,0x1 - 80002a14: ada70713 add a4,a4,-1318 # 800034ea - 80002a18: 01402533 sgtz a0,s4 - 80002a1c: 0ff7f493 zext.b s1,a5 - 80002a20: fd348593 add a1,s1,-45 - 80002a24: 00b035b3 snez a1,a1 - 80002a28: 8d6d and a0,a0,a1 - 80002a2a: c565 beqz a0,80002b12 - 80002a2c: 853a mv a0,a4 - 80002a2e: 000c8d63 beqz s9,80002a48 - 80002a32: 019705b3 add a1,a4,s9 - 80002a36: 8666 mv a2,s9 - 80002a38: 853a mv a0,a4 - 80002a3a: 00054683 lbu a3,0(a0) - 80002a3e: c689 beqz a3,80002a48 - 80002a40: 167d add a2,a2,-1 - 80002a42: 0505 add a0,a0,1 - 80002a44: fa7d bnez a2,80002a3a - 80002a46: 852e mv a0,a1 - 80002a48: 40a7053b subw a0,a4,a0 - 80002a4c: 00aa0a3b addw s4,s4,a0 - 80002a50: 0d405163 blez s4,80002b12 - 80002a54: e03a sd a4,0(sp) - 80002a56: 8452 mv s0,s4 - 80002a58: 8526 mv a0,s1 +00000000800028fc : + 800028fc: 7121 add sp,sp,-448 + 800028fe: fe86 sd ra,376(sp) + 80002900: faa2 sd s0,368(sp) + 80002902: f6a6 sd s1,360(sp) + 80002904: f2ca sd s2,352(sp) + 80002906: eece sd s3,344(sp) + 80002908: ead2 sd s4,336(sp) + 8000290a: e6d6 sd s5,328(sp) + 8000290c: e2da sd s6,320(sp) + 8000290e: fe5e sd s7,312(sp) + 80002910: fa62 sd s8,304(sp) + 80002912: f666 sd s9,296(sp) + 80002914: f26a sd s10,288(sp) + 80002916: ee6e sd s11,280(sp) + 80002918: 8b2a mv s6,a0 + 8000291a: ff46 sd a7,440(sp) + 8000291c: fb42 sd a6,432(sp) + 8000291e: f73e sd a5,424(sp) + 80002920: f33a sd a4,416(sp) + 80002922: ef36 sd a3,408(sp) + 80002924: eb32 sd a2,400(sp) + 80002926: e72e sd a1,392(sp) + 80002928: 032c add a1,sp,392 + 8000292a: 0328 add a0,sp,392 + 8000292c: e42a sd a0,8(sp) + 8000292e: e82e sd a1,16(sp) + 80002930: 02500993 li s3,37 + 80002934: 05500493 li s1,85 + 80002938: 00001a97 auipc s5,0x1 + 8000293c: 998a8a93 add s5,s5,-1640 # 800032d0 + 80002940: 4ba9 li s7,10 + 80002942: 0f600c13 li s8,246 + 80002946: 01810d13 add s10,sp,24 + 8000294a: 4da5 li s11,9 + 8000294c: 4905 li s2,1 + 8000294e: 001b0413 add s0,s6,1 + 80002952: fff44503 lbu a0,-1(s0) + 80002956: 28050063 beqz a0,80002bd6 + 8000295a: 01350b63 beq a0,s3,80002970 + 8000295e: 00000097 auipc ra,0x0 + 80002962: d1e080e7 jalr -738(ra) # 8000267c + 80002966: 0405 add s0,s0,1 + 80002968: fff44503 lbu a0,-1(s0) + 8000296c: f57d bnez a0,8000295a + 8000296e: a4a5 j 80002bd6 + 80002970: 4501 li a0,0 + 80002972: 02000793 li a5,32 + 80002976: 5cfd li s9,-1 + 80002978: 5a7d li s4,-1 + 8000297a: 8b22 mv s6,s0 + 8000297c: 000b4583 lbu a1,0(s6) + 80002980: fdd58693 add a3,a1,-35 + 80002984: 04d4ef63 bltu s1,a3,800029e2 + 80002988: 865a mv a2,s6 + 8000298a: 068e sll a3,a3,0x3 + 8000298c: 96d6 add a3,a3,s5 + 8000298e: 6294 ld a3,0(a3) + 80002990: 0b05 add s6,s6,1 + 80002992: 8682 jr a3 + 80002994: 4c81 li s9,0 + 80002996: 0ff5f693 zext.b a3,a1 + 8000299a: 00164583 lbu a1,1(a2) # 1 + 8000299e: 0605 add a2,a2,1 + 800029a0: 037c873b mulw a4,s9,s7 + 800029a4: 9eb9 addw a3,a3,a4 + 800029a6: fc65871b addw a4,a1,-58 + 800029aa: 0ff77713 zext.b a4,a4 + 800029ae: fd068c9b addw s9,a3,-48 + 800029b2: ff8772e3 bgeu a4,s8,80002996 + 800029b6: 8b32 mv s6,a2 + 800029b8: fc0a52e3 bgez s4,8000297c + 800029bc: 8a66 mv s4,s9 + 800029be: 5cfd li s9,-1 + 800029c0: bf75 j 8000297c + 800029c2: 87ae mv a5,a1 + 800029c4: bf65 j 8000297c + 800029c6: 65a2 ld a1,8(sp) + 800029c8: 0005ac83 lw s9,0(a1) + 800029cc: 05a1 add a1,a1,8 + 800029ce: e42e sd a1,8(sp) + 800029d0: fa0a56e3 bgez s4,8000297c + 800029d4: b7e5 j 800029bc + 800029d6: fb4043e3 bgtz s4,8000297c + 800029da: 4a01 li s4,0 + 800029dc: b745 j 8000297c + 800029de: 2505 addw a0,a0,1 + 800029e0: bf71 j 8000297c + 800029e2: 02500513 li a0,37 + 800029e6: 00000097 auipc ra,0x0 + 800029ea: c96080e7 jalr -874(ra) # 8000267c + 800029ee: 8b22 mv s6,s0 + 800029f0: bfb9 j 8000294e + 800029f2: 02500513 li a0,37 + 800029f6: 00000097 auipc ra,0x0 + 800029fa: c86080e7 jalr -890(ra) # 8000267c + 800029fe: bf81 j 8000294e + 80002a00: 65a2 ld a1,8(sp) + 80002a02: 4188 lw a0,0(a1) + 80002a04: 00858413 add s0,a1,8 + 80002a08: 00000097 auipc ra,0x0 + 80002a0c: c74080e7 jalr -908(ra) # 8000267c + 80002a10: e422 sd s0,8(sp) + 80002a12: bf35 j 8000294e + 80002a14: 4589 li a1,2 + 80002a16: 00b55463 bge a0,a1,80002a1e + 80002a1a: 1a050863 beqz a0,80002bca + 80002a1e: 6522 ld a0,8(sp) + 80002a20: 6100 ld s0,0(a0) + 80002a22: 4ca9 li s9,10 + 80002a24: 0c045563 bgez s0,80002aee + 80002a28: 02d00513 li a0,45 + 80002a2c: 84be mv s1,a5 + 80002a2e: 00000097 auipc ra,0x0 + 80002a32: c4e080e7 jalr -946(ra) # 8000267c + 80002a36: 87a6 mv a5,s1 + 80002a38: 40800433 neg s0,s0 + 80002a3c: a84d j 80002aee + 80002a3e: 4ca1 li s9,8 + 80002a40: 4589 li a1,2 + 80002a42: 0ab54363 blt a0,a1,80002ae8 + 80002a46: a055 j 80002aea + 80002a48: 03000513 li a0,48 + 80002a4c: 843e mv s0,a5 + 80002a4e: 00000097 auipc ra,0x0 + 80002a52: c2e080e7 jalr -978(ra) # 8000267c + 80002a56: 07800513 li a0,120 80002a5a: 00000097 auipc ra,0x0 - 80002a5e: bc4080e7 jalr -1084(ra) # 8000261e - 80002a62: 3a7d addw s4,s4,-1 - 80002a64: fe8969e3 bltu s2,s0,80002a56 - 80002a68: 4a01 li s4,0 - 80002a6a: 05500493 li s1,85 - 80002a6e: 6702 ld a4,0(sp) - 80002a70: 00074503 lbu a0,0(a4) - 80002a74: e545 bnez a0,80002b1c - 80002a76: a0f9 j 80002b44 - 80002a78: 4ca9 li s9,10 - 80002a7a: 4589 li a1,2 - 80002a7c: 00b54763 blt a0,a1,80002a8a - 80002a80: a031 j 80002a8c - 80002a82: 4cc1 li s9,16 - 80002a84: 4589 li a1,2 - 80002a86: 00b55363 bge a0,a1,80002a8c - 80002a8a: cd69 beqz a0,80002b64 - 80002a8c: 6522 ld a0,8(sp) - 80002a8e: 6100 ld s0,0(a0) - 80002a90: 03947533 remu a0,s0,s9 - 80002a94: cc2a sw a0,24(sp) - 80002a96: 4485 li s1,1 - 80002a98: 01946d63 bltu s0,s9,80002ab2 - 80002a9c: 4485 li s1,1 - 80002a9e: 0868 add a0,sp,28 - 80002aa0: 03945433 divu s0,s0,s9 - 80002aa4: 039475b3 remu a1,s0,s9 - 80002aa8: 0485 add s1,s1,1 - 80002aaa: c10c sw a1,0(a0) - 80002aac: 0511 add a0,a0,4 - 80002aae: ff9479e3 bgeu s0,s9,80002aa0 - 80002ab2: 0004841b sext.w s0,s1 - 80002ab6: 01445c63 bge s0,s4,80002ace - 80002aba: 0ff7fc93 zext.b s9,a5 - 80002abe: 3a7d addw s4,s4,-1 - 80002ac0: 8566 mv a0,s9 - 80002ac2: 00000097 auipc ra,0x0 - 80002ac6: b5c080e7 jalr -1188(ra) # 8000261e - 80002aca: ff444ae3 blt s0,s4,80002abe - 80002ace: 6522 ld a0,8(sp) - 80002ad0: 0521 add a0,a0,8 - 80002ad2: e42a sd a0,8(sp) - 80002ad4: 02049513 sll a0,s1,0x20 - 80002ad8: 02055413 srl s0,a0,0x20 - 80002adc: a819 j 80002af2 - 80002ade: 9d2d addw a0,a0,a1 - 80002ae0: 00000097 auipc ra,0x0 - 80002ae4: b3e080e7 jalr -1218(ra) # 8000261e - 80002ae8: 0004051b sext.w a0,s0 - 80002aec: 147d add s0,s0,-1 - 80002aee: 00a95f63 bge s2,a0,80002b0c - 80002af2: 34fd addw s1,s1,-1 - 80002af4: 02049513 sll a0,s1,0x20 - 80002af8: 8179 srl a0,a0,0x1e - 80002afa: 956a add a0,a0,s10 - 80002afc: 4108 lw a0,0(a0) - 80002afe: 05700593 li a1,87 - 80002b02: fcadeee3 bltu s11,a0,80002ade - 80002b06: 03000593 li a1,48 - 80002b0a: bfd1 j 80002ade - 80002b0c: 05500493 li s1,85 - 80002b10: b3c5 j 800028f0 - 80002b12: 05500493 li s1,85 - 80002b16: 00074503 lbu a0,0(a4) - 80002b1a: c50d beqz a0,80002b44 - 80002b1c: 00170413 add s0,a4,1 - 80002b20: a821 j 80002b38 - 80002b22: 0ff57513 zext.b a0,a0 - 80002b26: 00000097 auipc ra,0x0 - 80002b2a: af8080e7 jalr -1288(ra) # 8000261e - 80002b2e: 00044503 lbu a0,0(s0) - 80002b32: 3a7d addw s4,s4,-1 - 80002b34: 0405 add s0,s0,1 - 80002b36: c519 beqz a0,80002b44 - 80002b38: fe0cc5e3 bltz s9,80002b22 - 80002b3c: 000c8463 beqz s9,80002b44 - 80002b40: 3cfd addw s9,s9,-1 - 80002b42: b7c5 j 80002b22 - 80002b44: 6522 ld a0,8(sp) - 80002b46: 0521 add a0,a0,8 - 80002b48: e42a sd a0,8(sp) - 80002b4a: db4053e3 blez s4,800028f0 - 80002b4e: 8452 mv s0,s4 - 80002b50: 02000513 li a0,32 - 80002b54: 00000097 auipc ra,0x0 - 80002b58: aca080e7 jalr -1334(ra) # 8000261e - 80002b5c: 3a7d addw s4,s4,-1 - 80002b5e: fe8968e3 bltu s2,s0,80002b4e - 80002b62: b379 j 800028f0 - 80002b64: 6522 ld a0,8(sp) - 80002b66: 00056403 lwu s0,0(a0) - 80002b6a: b71d j 80002a90 - 80002b6c: 6522 ld a0,8(sp) - 80002b6e: 4100 lw s0,0(a0) - 80002b70: 4ca9 li s9,10 - 80002b72: f0045fe3 bgez s0,80002a90 - 80002b76: bd91 j 800029ca - 80002b78: 4501 li a0,0 - 80002b7a: 70f6 ld ra,376(sp) - 80002b7c: 7456 ld s0,368(sp) - 80002b7e: 74b6 ld s1,360(sp) - 80002b80: 7916 ld s2,352(sp) - 80002b82: 69f6 ld s3,344(sp) - 80002b84: 6a56 ld s4,336(sp) - 80002b86: 6ab6 ld s5,328(sp) - 80002b88: 6b16 ld s6,320(sp) - 80002b8a: 7bf2 ld s7,312(sp) - 80002b8c: 7c52 ld s8,304(sp) - 80002b8e: 7cb2 ld s9,296(sp) - 80002b90: 7d12 ld s10,288(sp) - 80002b92: 6df2 ld s11,280(sp) - 80002b94: 6139 add sp,sp,448 - 80002b96: 8082 ret + 80002a5e: c22080e7 jalr -990(ra) # 8000267c + 80002a62: 87a2 mv a5,s0 + 80002a64: 4cc1 li s9,16 + 80002a66: a051 j 80002aea + 80002a68: 6522 ld a0,8(sp) + 80002a6a: 6118 ld a4,0(a0) + 80002a6c: e709 bnez a4,80002a76 + 80002a6e: 00001717 auipc a4,0x1 + 80002a72: b5c70713 add a4,a4,-1188 # 800035ca + 80002a76: 01402533 sgtz a0,s4 + 80002a7a: 0ff7f493 zext.b s1,a5 + 80002a7e: fd348593 add a1,s1,-45 + 80002a82: 00b035b3 snez a1,a1 + 80002a86: 8d6d and a0,a0,a1 + 80002a88: c565 beqz a0,80002b70 + 80002a8a: 853a mv a0,a4 + 80002a8c: 000c8d63 beqz s9,80002aa6 + 80002a90: 019705b3 add a1,a4,s9 + 80002a94: 8666 mv a2,s9 + 80002a96: 853a mv a0,a4 + 80002a98: 00054683 lbu a3,0(a0) + 80002a9c: c689 beqz a3,80002aa6 + 80002a9e: 167d add a2,a2,-1 + 80002aa0: 0505 add a0,a0,1 + 80002aa2: fa7d bnez a2,80002a98 + 80002aa4: 852e mv a0,a1 + 80002aa6: 40a7053b subw a0,a4,a0 + 80002aaa: 00aa0a3b addw s4,s4,a0 + 80002aae: 0d405163 blez s4,80002b70 + 80002ab2: e03a sd a4,0(sp) + 80002ab4: 8452 mv s0,s4 + 80002ab6: 8526 mv a0,s1 + 80002ab8: 00000097 auipc ra,0x0 + 80002abc: bc4080e7 jalr -1084(ra) # 8000267c + 80002ac0: 3a7d addw s4,s4,-1 + 80002ac2: fe8969e3 bltu s2,s0,80002ab4 + 80002ac6: 4a01 li s4,0 + 80002ac8: 05500493 li s1,85 + 80002acc: 6702 ld a4,0(sp) + 80002ace: 00074503 lbu a0,0(a4) + 80002ad2: e545 bnez a0,80002b7a + 80002ad4: a0f9 j 80002ba2 + 80002ad6: 4ca9 li s9,10 + 80002ad8: 4589 li a1,2 + 80002ada: 00b54763 blt a0,a1,80002ae8 + 80002ade: a031 j 80002aea + 80002ae0: 4cc1 li s9,16 + 80002ae2: 4589 li a1,2 + 80002ae4: 00b55363 bge a0,a1,80002aea + 80002ae8: cd69 beqz a0,80002bc2 + 80002aea: 6522 ld a0,8(sp) + 80002aec: 6100 ld s0,0(a0) + 80002aee: 03947533 remu a0,s0,s9 + 80002af2: cc2a sw a0,24(sp) + 80002af4: 4485 li s1,1 + 80002af6: 01946d63 bltu s0,s9,80002b10 + 80002afa: 4485 li s1,1 + 80002afc: 0868 add a0,sp,28 + 80002afe: 03945433 divu s0,s0,s9 + 80002b02: 039475b3 remu a1,s0,s9 + 80002b06: 0485 add s1,s1,1 + 80002b08: c10c sw a1,0(a0) + 80002b0a: 0511 add a0,a0,4 + 80002b0c: ff9479e3 bgeu s0,s9,80002afe + 80002b10: 0004841b sext.w s0,s1 + 80002b14: 01445c63 bge s0,s4,80002b2c + 80002b18: 0ff7fc93 zext.b s9,a5 + 80002b1c: 3a7d addw s4,s4,-1 + 80002b1e: 8566 mv a0,s9 + 80002b20: 00000097 auipc ra,0x0 + 80002b24: b5c080e7 jalr -1188(ra) # 8000267c + 80002b28: ff444ae3 blt s0,s4,80002b1c + 80002b2c: 6522 ld a0,8(sp) + 80002b2e: 0521 add a0,a0,8 + 80002b30: e42a sd a0,8(sp) + 80002b32: 02049513 sll a0,s1,0x20 + 80002b36: 02055413 srl s0,a0,0x20 + 80002b3a: a819 j 80002b50 + 80002b3c: 9d2d addw a0,a0,a1 + 80002b3e: 00000097 auipc ra,0x0 + 80002b42: b3e080e7 jalr -1218(ra) # 8000267c + 80002b46: 0004051b sext.w a0,s0 + 80002b4a: 147d add s0,s0,-1 + 80002b4c: 00a95f63 bge s2,a0,80002b6a + 80002b50: 34fd addw s1,s1,-1 + 80002b52: 02049513 sll a0,s1,0x20 + 80002b56: 8179 srl a0,a0,0x1e + 80002b58: 956a add a0,a0,s10 + 80002b5a: 4108 lw a0,0(a0) + 80002b5c: 05700593 li a1,87 + 80002b60: fcadeee3 bltu s11,a0,80002b3c + 80002b64: 03000593 li a1,48 + 80002b68: bfd1 j 80002b3c + 80002b6a: 05500493 li s1,85 + 80002b6e: b3c5 j 8000294e + 80002b70: 05500493 li s1,85 + 80002b74: 00074503 lbu a0,0(a4) + 80002b78: c50d beqz a0,80002ba2 + 80002b7a: 00170413 add s0,a4,1 + 80002b7e: a821 j 80002b96 + 80002b80: 0ff57513 zext.b a0,a0 + 80002b84: 00000097 auipc ra,0x0 + 80002b88: af8080e7 jalr -1288(ra) # 8000267c + 80002b8c: 00044503 lbu a0,0(s0) + 80002b90: 3a7d addw s4,s4,-1 + 80002b92: 0405 add s0,s0,1 + 80002b94: c519 beqz a0,80002ba2 + 80002b96: fe0cc5e3 bltz s9,80002b80 + 80002b9a: 000c8463 beqz s9,80002ba2 + 80002b9e: 3cfd addw s9,s9,-1 + 80002ba0: b7c5 j 80002b80 + 80002ba2: 6522 ld a0,8(sp) + 80002ba4: 0521 add a0,a0,8 + 80002ba6: e42a sd a0,8(sp) + 80002ba8: db4053e3 blez s4,8000294e + 80002bac: 8452 mv s0,s4 + 80002bae: 02000513 li a0,32 + 80002bb2: 00000097 auipc ra,0x0 + 80002bb6: aca080e7 jalr -1334(ra) # 8000267c + 80002bba: 3a7d addw s4,s4,-1 + 80002bbc: fe8968e3 bltu s2,s0,80002bac + 80002bc0: b379 j 8000294e + 80002bc2: 6522 ld a0,8(sp) + 80002bc4: 00056403 lwu s0,0(a0) + 80002bc8: b71d j 80002aee + 80002bca: 6522 ld a0,8(sp) + 80002bcc: 4100 lw s0,0(a0) + 80002bce: 4ca9 li s9,10 + 80002bd0: f0045fe3 bgez s0,80002aee + 80002bd4: bd91 j 80002a28 + 80002bd6: 4501 li a0,0 + 80002bd8: 70f6 ld ra,376(sp) + 80002bda: 7456 ld s0,368(sp) + 80002bdc: 74b6 ld s1,360(sp) + 80002bde: 7916 ld s2,352(sp) + 80002be0: 69f6 ld s3,344(sp) + 80002be2: 6a56 ld s4,336(sp) + 80002be4: 6ab6 ld s5,328(sp) + 80002be6: 6b16 ld s6,320(sp) + 80002be8: 7bf2 ld s7,312(sp) + 80002bea: 7c52 ld s8,304(sp) + 80002bec: 7cb2 ld s9,296(sp) + 80002bee: 7d12 ld s10,288(sp) + 80002bf0: 6df2 ld s11,280(sp) + 80002bf2: 6139 add sp,sp,448 + 80002bf4: 8082 ret -0000000080002b98 : - 80002b98: 6190 ld a2,0(a1) - 80002b9a: 00a60023 sb a0,0(a2) - 80002b9e: 6188 ld a0,0(a1) - 80002ba0: 0505 add a0,a0,1 - 80002ba2: e188 sd a0,0(a1) - 80002ba4: 8082 ret +0000000080002bf6 : + 80002bf6: 6190 ld a2,0(a1) + 80002bf8: 00a60023 sb a0,0(a2) + 80002bfc: 6188 ld a0,0(a1) + 80002bfe: 0505 add a0,a0,1 + 80002c00: e188 sd a0,0(a1) + 80002c02: 8082 ret -0000000080002ba6 : - 80002ba6: 00a5e6b3 or a3,a1,a0 - 80002baa: 8ed1 or a3,a3,a2 - 80002bac: 0076f713 and a4,a3,7 - 80002bb0: 00c506b3 add a3,a0,a2 - 80002bb4: cf19 beqz a4,80002bd2 - 80002bb6: 02d57963 bgeu a0,a3,80002be8 - 80002bba: 86aa mv a3,a0 - 80002bbc: 00058703 lb a4,0(a1) - 80002bc0: 0585 add a1,a1,1 - 80002bc2: 00168793 add a5,a3,1 - 80002bc6: 167d add a2,a2,-1 - 80002bc8: 00e68023 sb a4,0(a3) - 80002bcc: 86be mv a3,a5 - 80002bce: f67d bnez a2,80002bbc - 80002bd0: a821 j 80002be8 - 80002bd2: 00d57b63 bgeu a0,a3,80002be8 - 80002bd6: 862a mv a2,a0 - 80002bd8: 6198 ld a4,0(a1) - 80002bda: 05a1 add a1,a1,8 - 80002bdc: 00860793 add a5,a2,8 - 80002be0: e218 sd a4,0(a2) - 80002be2: 863e mv a2,a5 - 80002be4: fed7eae3 bltu a5,a3,80002bd8 - 80002be8: 8082 ret +0000000080002c04 : + 80002c04: 00a5e6b3 or a3,a1,a0 + 80002c08: 8ed1 or a3,a3,a2 + 80002c0a: 0076f713 and a4,a3,7 + 80002c0e: 00c506b3 add a3,a0,a2 + 80002c12: cf19 beqz a4,80002c30 + 80002c14: 02d57963 bgeu a0,a3,80002c46 + 80002c18: 86aa mv a3,a0 + 80002c1a: 00058703 lb a4,0(a1) + 80002c1e: 0585 add a1,a1,1 + 80002c20: 00168793 add a5,a3,1 + 80002c24: 167d add a2,a2,-1 + 80002c26: 00e68023 sb a4,0(a3) + 80002c2a: 86be mv a3,a5 + 80002c2c: f67d bnez a2,80002c1a + 80002c2e: a821 j 80002c46 + 80002c30: 00d57b63 bgeu a0,a3,80002c46 + 80002c34: 862a mv a2,a0 + 80002c36: 6198 ld a4,0(a1) + 80002c38: 05a1 add a1,a1,8 + 80002c3a: 00860793 add a5,a2,8 + 80002c3e: e218 sd a4,0(a2) + 80002c40: 863e mv a2,a5 + 80002c42: fed7eae3 bltu a5,a3,80002c36 + 80002c46: 8082 ret -0000000080002bea : - 80002bea: 00c566b3 or a3,a0,a2 - 80002bee: 8a9d and a3,a3,7 - 80002bf0: ce91 beqz a3,80002c0c - 80002bf2: 00c506b3 add a3,a0,a2 - 80002bf6: 04d57063 bgeu a0,a3,80002c36 - 80002bfa: 86aa mv a3,a0 - 80002bfc: 00168713 add a4,a3,1 - 80002c00: 167d add a2,a2,-1 - 80002c02: 00b68023 sb a1,0(a3) - 80002c06: 86ba mv a3,a4 - 80002c08: fa75 bnez a2,80002bfc - 80002c0a: a035 j 80002c36 - 80002c0c: 962a add a2,a2,a0 - 80002c0e: 02c57463 bgeu a0,a2,80002c36 - 80002c12: 0ff5f593 zext.b a1,a1 - 80002c16: 010106b7 lui a3,0x1010 - 80002c1a: 1016869b addw a3,a3,257 # 1010101 - 80002c1e: 02d585b3 mul a1,a1,a3 - 80002c22: 02059693 sll a3,a1,0x20 - 80002c26: 8dd5 or a1,a1,a3 - 80002c28: 86aa mv a3,a0 - 80002c2a: 00868713 add a4,a3,8 - 80002c2e: e28c sd a1,0(a3) - 80002c30: 86ba mv a3,a4 - 80002c32: fec76ce3 bltu a4,a2,80002c2a - 80002c36: 8082 ret +0000000080002c48 : + 80002c48: 00c566b3 or a3,a0,a2 + 80002c4c: 8a9d and a3,a3,7 + 80002c4e: ce91 beqz a3,80002c6a + 80002c50: 00c506b3 add a3,a0,a2 + 80002c54: 04d57063 bgeu a0,a3,80002c94 + 80002c58: 86aa mv a3,a0 + 80002c5a: 00168713 add a4,a3,1 + 80002c5e: 167d add a2,a2,-1 + 80002c60: 00b68023 sb a1,0(a3) + 80002c64: 86ba mv a3,a4 + 80002c66: fa75 bnez a2,80002c5a + 80002c68: a035 j 80002c94 + 80002c6a: 962a add a2,a2,a0 + 80002c6c: 02c57463 bgeu a0,a2,80002c94 + 80002c70: 0ff5f593 zext.b a1,a1 + 80002c74: 010106b7 lui a3,0x1010 + 80002c78: 1016869b addw a3,a3,257 # 1010101 + 80002c7c: 02d585b3 mul a1,a1,a3 + 80002c80: 02059693 sll a3,a1,0x20 + 80002c84: 8dd5 or a1,a1,a3 + 80002c86: 86aa mv a3,a0 + 80002c88: 00868713 add a4,a3,8 + 80002c8c: e28c sd a1,0(a3) + 80002c8e: 86ba mv a3,a4 + 80002c90: fec76ce3 bltu a4,a2,80002c88 + 80002c94: 8082 ret -0000000080002c38 : - 80002c38: 862a mv a2,a0 - 80002c3a: c999 beqz a1,80002c50 - 80002c3c: 00b506b3 add a3,a0,a1 - 80002c40: 862a mv a2,a0 - 80002c42: 00064703 lbu a4,0(a2) - 80002c46: c709 beqz a4,80002c50 - 80002c48: 15fd add a1,a1,-1 - 80002c4a: 0605 add a2,a2,1 - 80002c4c: f9fd bnez a1,80002c42 - 80002c4e: 8636 mv a2,a3 - 80002c50: 40a60533 sub a0,a2,a0 - 80002c54: 8082 ret +0000000080002c96 : + 80002c96: 862a mv a2,a0 + 80002c98: c999 beqz a1,80002cae + 80002c9a: 00b506b3 add a3,a0,a1 + 80002c9e: 862a mv a2,a0 + 80002ca0: 00064703 lbu a4,0(a2) + 80002ca4: c709 beqz a4,80002cae + 80002ca6: 15fd add a1,a1,-1 + 80002ca8: 0605 add a2,a2,1 + 80002caa: f9fd bnez a1,80002ca0 + 80002cac: 8636 mv a2,a3 + 80002cae: 40a60533 sub a0,a2,a0 + 80002cb2: 8082 ret -0000000080002c56 : - 80002c56: 00054603 lbu a2,0(a0) - 80002c5a: 0005c683 lbu a3,0(a1) - 80002c5e: 0505 add a0,a0,1 - 80002c60: 0585 add a1,a1,1 - 80002c62: 00c03733 snez a4,a2 - 80002c66: 00d647b3 xor a5,a2,a3 - 80002c6a: 0017b793 seqz a5,a5 - 80002c6e: 8f7d and a4,a4,a5 - 80002c70: f37d bnez a4,80002c56 - 80002c72: 40d60533 sub a0,a2,a3 - 80002c76: 8082 ret +0000000080002cb4 : + 80002cb4: 00054603 lbu a2,0(a0) + 80002cb8: 0005c683 lbu a3,0(a1) + 80002cbc: 0505 add a0,a0,1 + 80002cbe: 0585 add a1,a1,1 + 80002cc0: 00c03733 snez a4,a2 + 80002cc4: 00d647b3 xor a5,a2,a3 + 80002cc8: 0017b793 seqz a5,a5 + 80002ccc: 8f7d and a4,a4,a5 + 80002cce: f37d bnez a4,80002cb4 + 80002cd0: 40d60533 sub a0,a2,a3 + 80002cd4: 8082 ret -0000000080002c78 : - 80002c78: 4601 li a2,0 - 80002c7a: 00c586b3 add a3,a1,a2 - 80002c7e: 0006c683 lbu a3,0(a3) - 80002c82: 00c50733 add a4,a0,a2 - 80002c86: 00d70023 sb a3,0(a4) - 80002c8a: 0605 add a2,a2,1 - 80002c8c: f6fd bnez a3,80002c7a - 80002c8e: 8082 ret +0000000080002cd6 : + 80002cd6: 4601 li a2,0 + 80002cd8: 00c586b3 add a3,a1,a2 + 80002cdc: 0006c683 lbu a3,0(a3) + 80002ce0: 00c50733 add a4,a0,a2 + 80002ce4: 00d70023 sb a3,0(a4) + 80002ce8: 0605 add a2,a2,1 + 80002cea: f6fd bnez a3,80002cd8 + 80002cec: 8082 ret -0000000080002c90 : - 80002c90: 00150613 add a2,a0,1 - 80002c94: 02000513 li a0,32 - 80002c98: fff64583 lbu a1,-1(a2) - 80002c9c: 00a59763 bne a1,a0,80002caa - 80002ca0: 0605 add a2,a2,1 - 80002ca2: fff64583 lbu a1,-1(a2) - 80002ca6: fea58de3 beq a1,a0,80002ca0 - 80002caa: 02b00513 li a0,43 - 80002cae: 00a58663 beq a1,a0,80002cba - 80002cb2: 02d00513 li a0,45 - 80002cb6: 00a59b63 bne a1,a0,80002ccc - 80002cba: fd358513 add a0,a1,-45 - 80002cbe: 00064583 lbu a1,0(a2) - 80002cc2: 00153693 seqz a3,a0 - 80002cc6: 4501 li a0,0 - 80002cc8: e591 bnez a1,80002cd4 - 80002cca: a015 j 80002cee - 80002ccc: 4681 li a3,0 - 80002cce: 167d add a2,a2,-1 - 80002cd0: 4501 li a0,0 - 80002cd2: cd91 beqz a1,80002cee - 80002cd4: 0605 add a2,a2,1 - 80002cd6: 4729 li a4,10 - 80002cd8: 0ff5f793 zext.b a5,a1 - 80002cdc: 00064583 lbu a1,0(a2) - 80002ce0: 02e50533 mul a0,a0,a4 - 80002ce4: 953e add a0,a0,a5 - 80002ce6: fd050513 add a0,a0,-48 - 80002cea: 0605 add a2,a2,1 - 80002cec: f5f5 bnez a1,80002cd8 - 80002cee: c299 beqz a3,80002cf4 - 80002cf0: 40a00533 neg a0,a0 - 80002cf4: 8082 ret - ... +0000000080002cee : + 80002cee: 00150613 add a2,a0,1 + 80002cf2: 02000513 li a0,32 + 80002cf6: fff64583 lbu a1,-1(a2) + 80002cfa: 00a59763 bne a1,a0,80002d08 + 80002cfe: 0605 add a2,a2,1 + 80002d00: fff64583 lbu a1,-1(a2) + 80002d04: fea58de3 beq a1,a0,80002cfe + 80002d08: 02b00513 li a0,43 + 80002d0c: 00a58663 beq a1,a0,80002d18 + 80002d10: 02d00513 li a0,45 + 80002d14: 00a59b63 bne a1,a0,80002d2a + 80002d18: fd358513 add a0,a1,-45 + 80002d1c: 00064583 lbu a1,0(a2) + 80002d20: 00153693 seqz a3,a0 + 80002d24: 4501 li a0,0 + 80002d26: e591 bnez a1,80002d32 + 80002d28: a015 j 80002d4c + 80002d2a: 4681 li a3,0 + 80002d2c: 167d add a2,a2,-1 + 80002d2e: 4501 li a0,0 + 80002d30: cd91 beqz a1,80002d4c + 80002d32: 0605 add a2,a2,1 + 80002d34: 4729 li a4,10 + 80002d36: 0ff5f793 zext.b a5,a1 + 80002d3a: 00064583 lbu a1,0(a2) + 80002d3e: 02e50533 mul a0,a0,a4 + 80002d42: 953e add a0,a0,a5 + 80002d44: fd050513 add a0,a0,-48 + 80002d48: 0605 add a2,a2,1 + 80002d4a: f5f5 bnez a1,80002d36 + 80002d4c: c299 beqz a3,80002d52 + 80002d4e: 40a00533 neg a0,a0 + 80002d52: 8082 ret -0000000080002cf8
: - 80002cf8: 7135 add sp,sp,-160 - 80002cfa: ed06 sd ra,152(sp) - 80002cfc: e922 sd s0,144(sp) - 80002cfe: e526 sd s1,136(sp) - 80002d00: e14a sd s2,128(sp) - 80002d02: fcce sd s3,120(sp) - 80002d04: f8d2 sd s4,112(sp) - 80002d06: f4d6 sd s5,104(sp) - 80002d08: f0da sd s6,96(sp) - 80002d0a: ecde sd s7,88(sp) - 80002d0c: e8e2 sd s8,80(sp) - 80002d0e: e4e6 sd s9,72(sp) - 80002d10: e0ea sd s10,64(sp) - 80002d12: fc6e sd s11,56(sp) - 80002d14: b822 fsd fs0,48(sp) - 80002d16: 4501 li a0,0 - 80002d18: 4581 li a1,0 - 80002d1a: 6299 lui t0,0x6 - 80002d1c: 3002a073 csrs mstatus,t0 - 80002d20: 00001c17 auipc s8,0x1 - 80002d24: 918c0c13 add s8,s8,-1768 # 80003638 - 80002d28: 10000613 li a2,256 - 80002d2c: 018506b3 add a3,a0,s8 - 80002d30: 00b68023 sb a1,0(a3) - 80002d34: 0505 add a0,a0,1 - 80002d36: 2585 addw a1,a1,1 - 80002d38: fec51ae3 bne a0,a2,80002d2c - 80002d3c: 00000517 auipc a0,0x0 - 80002d40: 7b550513 add a0,a0,1973 # 800034f1 - 80002d44: 45a9 li a1,10 - 80002d46: 00000097 auipc ra,0x0 - 80002d4a: b58080e7 jalr -1192(ra) # 8000289e - 80002d4e: 4901 li s2,0 - 80002d50: 4581 li a1,0 - 80002d52: 00000997 auipc s3,0x0 - 80002d56: 7e698993 add s3,s3,2022 # 80003538 - 80002d5a: 00011517 auipc a0,0x11 - 80002d5e: a1650513 add a0,a0,-1514 # 80013770 - 80002d62: e42a sd a0,8(sp) - 80002d64: 00001517 auipc a0,0x1 - 80002d68: a0850513 add a0,a0,-1528 # 8000376c - 80002d6c: f42a sd a0,40(sp) - 80002d6e: 00001517 auipc a0,0x1 - 80002d72: 9d250513 add a0,a0,-1582 # 80003740 - 80002d76: f02a sd a0,32(sp) - 80002d78: 00001d17 auipc s10,0x1 - 80002d7c: 9f0d0d13 add s10,s10,-1552 # 80003768 - 80002d80: 00001d97 auipc s11,0x1 - 80002d84: 9b8d8d93 add s11,s11,-1608 # 80003738 - 80002d88: 00001b17 auipc s6,0x1 - 80002d8c: 9e8b0b13 add s6,s6,-1560 # 80003770 - 80002d90: f0000453 fmv.w.x fs0,zero - 80002d94: 00000417 auipc s0,0x0 - 80002d98: 79340413 add s0,s0,1939 # 80003527 - 80002d9c: 00000497 auipc s1,0x0 - 80002da0: 76b48493 add s1,s1,1899 # 80003507 - 80002da4: 04000b93 li s7,64 - 80002da8: 10000613 li a2,256 - 80002dac: 854e mv a0,s3 - 80002dae: e82e sd a1,16(sp) - 80002db0: 00000097 auipc ra,0x0 - 80002db4: e3a080e7 jalr -454(ra) # 80002bea - 80002db8: 4a81 li s5,0 - 80002dba: ec4a sd s2,24(sp) - 80002dbc: 00391513 sll a0,s2,0x3 - 80002dc0: 65a2 ld a1,8(sp) - 80002dc2: 00b50933 add s2,a0,a1 - 80002dc6: 8a62 mv s4,s8 - 80002dc8: 7502 ld a0,32(sp) - 80002dca: 6108 ld a0,0(a0) - 80002dcc: 000da583 lw a1,0(s11) - 80002dd0: 000d2603 lw a2,0(s10) - 80002dd4: 76a2 ld a3,40(sp) - 80002dd6: 4294 lw a3,0(a3) - 80002dd8: 006a9713 sll a4,s5,0x6 - 80002ddc: 8ce2 mv s9,s8 - 80002dde: 9762 add a4,a4,s8 - 80002de0: 6599 lui a1,0x6 - 80002de2: 2005859b addw a1,a1,512 # 6200 - 80002de6: 30002673 csrr a2,mstatus - 80002dea: 76e9 lui a3,0xffffa - 80002dec: 9ff6869b addw a3,a3,-1537 # ffffffffffff99ff <_tbss_end+0xffffffff7ffe5a3b> - 80002df0: 8e75 and a2,a2,a3 - 80002df2: 8e4d or a2,a2,a1 - 80002df4: c110 sw a2,0(a0) - 80002df6: 30061073 csrw mstatus,a2 - 80002dfa: 20000593 li a1,512 - 80002dfe: 0c05f5d7 vsetvli a1,a1,e8,m1,ta,ma - 80002e02: 02098087 vle8.v v1,(s3) - 80002e06: 02070107 vle8.v v2,(a4) - 80002e0a: 00093407 fld fs0,0(s2) - 80002e0e: 4501 li a0,0 - 80002e10: cd19 beqz a0,80002e2e - 80002e12: 4505 li a0,1 - 80002e14: cd19 beqz a0,80002e32 - 80002e16: 4509 li a0,2 - 80002e18: cd19 beqz a0,80002e36 - 80002e1a: 450d li a0,3 - 80002e1c: cd19 beqz a0,80002e3a - 80002e1e: 4511 li a0,4 - 80002e20: cd19 beqz a0,80002e3e - 80002e22: 4515 li a0,5 - 80002e24: cd19 beqz a0,80002e42 - 80002e26: 4519 li a0,6 - 80002e28: cd09 beqz a0,80002e42 - 80002e2a: 451d li a0,7 - 80002e2c: c919 beqz a0,80002e42 +0000000080002d54
: + 80002d54: 7155 add sp,sp,-208 + 80002d56: e586 sd ra,200(sp) + 80002d58: e1a2 sd s0,192(sp) + 80002d5a: fd26 sd s1,184(sp) + 80002d5c: f94a sd s2,176(sp) + 80002d5e: f54e sd s3,168(sp) + 80002d60: f152 sd s4,160(sp) + 80002d62: ed56 sd s5,152(sp) + 80002d64: e95a sd s6,144(sp) + 80002d66: e55e sd s7,136(sp) + 80002d68: e162 sd s8,128(sp) + 80002d6a: fce6 sd s9,120(sp) + 80002d6c: f8ea sd s10,112(sp) + 80002d6e: f4ee sd s11,104(sp) + 80002d70: b0a2 fsd fs0,96(sp) + 80002d72: 300025f3 csrr a1,mstatus + 80002d76: c2002673 csrr a2,vl + 80002d7a: c21026f3 csrr a3,vtype + 80002d7e: 00001517 auipc a0,0x1 + 80002d82: 85350513 add a0,a0,-1965 # 800035d1 + 80002d86: ecb2 sd a2,88(sp) + 80002d88: 00000097 auipc ra,0x0 + 80002d8c: b74080e7 jalr -1164(ra) # 800028fc + 80002d90: 4501 li a0,0 + 80002d92: 4581 li a1,0 + 80002d94: 00011617 auipc a2,0x11 + 80002d98: ae460613 add a2,a2,-1308 # 80013878 + 80002d9c: 00001497 auipc s1,0x1 + 80002da0: 9a348493 add s1,s1,-1629 # 8000373f + 80002da4: 10000693 li a3,256 + 80002da8: 00950733 add a4,a0,s1 + 80002dac: 00b70023 sb a1,0(a4) + 80002db0: f0050713 add a4,a0,-256 + 80002db4: e218 sd a4,0(a2) + 80002db6: 0505 add a0,a0,1 + 80002db8: 2585 addw a1,a1,1 + 80002dba: 0621 add a2,a2,8 + 80002dbc: fed516e3 bne a0,a3,80002da8 + 80002dc0: 4501 li a0,0 + 80002dc2: 00001597 auipc a1,0x1 + 80002dc6: 83358593 add a1,a1,-1997 # 800035f5 + 80002dca: e82e sd a1,16(sp) + 80002dcc: 800005b7 lui a1,0x80000 + 80002dd0: 35fd addw a1,a1,-1 # 7fffffff + 80002dd2: e42e sd a1,8(sp) + 80002dd4: 00000597 auipc a1,0x0 + 80002dd8: 7ac58593 add a1,a1,1964 # 80003580 + 80002ddc: e02e sd a1,0(sp) + 80002dde: 00001a97 auipc s5,0x1 + 80002de2: 861a8a93 add s5,s5,-1951 # 8000363f + 80002de6: 00011597 auipc a1,0x11 + 80002dea: a9258593 add a1,a1,-1390 # 80013878 + 80002dee: ec2e sd a1,24(sp) + 80002df0: 00001597 auipc a1,0x1 + 80002df4: a8458593 add a1,a1,-1404 # 80003874 + 80002df8: e8ae sd a1,80(sp) + 80002dfa: 00001597 auipc a1,0x1 + 80002dfe: a4e58593 add a1,a1,-1458 # 80003848 + 80002e02: e4ae sd a1,72(sp) + 80002e04: 00001597 auipc a1,0x1 + 80002e08: a6c58593 add a1,a1,-1428 # 80003870 + 80002e0c: e0ae sd a1,64(sp) + 80002e0e: 00001c17 auipc s8,0x1 + 80002e12: a6ac0c13 add s8,s8,-1430 # 80003878 + 80002e16: f0000453 fmv.w.x fs0,zero + 80002e1a: 00000597 auipc a1,0x0 + 80002e1e: 7f458593 add a1,a1,2036 # 8000360e + 80002e22: fc2e sd a1,56(sp) + 80002e24: 00001417 auipc s0,0x1 + 80002e28: 80a40413 add s0,s0,-2038 # 8000362e + 80002e2c: 04000a13 li s4,64 + 80002e30: 8d2a mv s10,a0 + 80002e32: 45a9 li a1,10 + 80002e34: 6542 ld a0,16(sp) + 80002e36: 00000097 auipc ra,0x0 + 80002e3a: ac6080e7 jalr -1338(ra) # 800028fc + 80002e3e: 4901 li s2,0 + 80002e40: 4681 li a3,0 + 80002e42: 6522 ld a0,8(sp) + 80002e44: 956a add a0,a0,s10 + 80002e46: 02151993 sll s3,a0,0x21 + 80002e4a: 4219d513 sra a0,s3,0x21 + 80002e4e: 050e sll a0,a0,0x3 + 80002e50: 6582 ld a1,0(sp) + 80002e52: 952e add a0,a0,a1 + 80002e54: f82a sd a0,48(sp) + 80002e56: 10000613 li a2,256 + 80002e5a: 8556 mv a0,s5 + 80002e5c: f036 sd a3,32(sp) + 80002e5e: 85b6 mv a1,a3 + 80002e60: 00000097 auipc ra,0x0 + 80002e64: de8080e7 jalr -536(ra) # 80002c48 + 80002e68: 4b01 li s6,0 + 80002e6a: f44a sd s2,40(sp) + 80002e6c: 00391513 sll a0,s2,0x3 + 80002e70: 65e2 ld a1,24(sp) + 80002e72: 00b50db3 add s11,a0,a1 + 80002e76: 8ba6 mv s7,s1 + 80002e78: 6526 ld a0,72(sp) + 80002e7a: 6108 ld a0,0(a0) + 80002e7c: 6586 ld a1,64(sp) + 80002e7e: 418c lw a1,0(a1) + 80002e80: 6646 ld a2,80(sp) + 80002e82: 4210 lw a2,0(a2) + 80002e84: 006b1693 sll a3,s6,0x6 + 80002e88: 8ca6 mv s9,s1 + 80002e8a: 96a6 add a3,a3,s1 + 80002e8c: 6766 ld a4,88(sp) + 80002e8e: 6719 lui a4,0x6 + 80002e90: 2007071b addw a4,a4,512 # 6200 + 80002e94: 300025f3 csrr a1,mstatus + 80002e98: 7669 lui a2,0xffffa + 80002e9a: 9ff6061b addw a2,a2,-1537 # ffffffffffff99ff <_tbss_end+0xffffffff7ffe593b> + 80002e9e: 8df1 and a1,a1,a2 + 80002ea0: 8dd9 or a1,a1,a4 + 80002ea2: c10c sw a1,0(a0) + 80002ea4: 30059073 csrw mstatus,a1 + 80002ea8: 20000713 li a4,512 + 80002eac: 0c077757 vsetvli a4,a4,e8,m1,ta,ma + 80002eb0: 020a8087 vle8.v v1,(s5) + 80002eb4: 02068107 vle8.v v2,(a3) + 80002eb8: 000db407 fld fs0,0(s11) + 80002ebc: 4501 li a0,0 + 80002ebe: 03a50763 beq a0,s10,80002eec + 80002ec2: 4505 li a0,1 + 80002ec4: 03a50763 beq a0,s10,80002ef2 + 80002ec8: 4509 li a0,2 + 80002eca: 03a50763 beq a0,s10,80002ef8 + 80002ece: 450d li a0,3 + 80002ed0: 03a50763 beq a0,s10,80002efe + 80002ed4: 4511 li a0,4 + 80002ed6: 03a50763 beq a0,s10,80002f04 + 80002eda: 4515 li a0,5 + 80002edc: 03a50663 beq a0,s10,80002f08 + 80002ee0: 4519 li a0,6 + 80002ee2: 03a50363 beq a0,s10,80002f08 + 80002ee6: 451d li a0,7 + 80002ee8: 03a50063 beq a0,s10,80002f08 -0000000080002e2e : - 80002e2e: 021111d7 vfadd.vv v3,v1,v2 +0000000080002eec : + 80002eec: 021111d7 vfadd.vv v3,v1,v2 + 80002ef0: a821 j 80002f08 -0000000080002e32 : - 80002e32: 0a1111d7 vfsub.vv v3,v1,v2 +0000000080002ef2 : + 80002ef2: 0a1111d7 vfsub.vv v3,v1,v2 + 80002ef6: a809 j 80002f08 -0000000080002e36 : - 80002e36: 921111d7 vfmul.vv v3,v1,v2 +0000000080002ef8 : + 80002ef8: 921111d7 vfmul.vv v3,v1,v2 + 80002efc: a031 j 80002f08 -0000000080002e3a : - 80002e3a: 821111d7 vfdiv.vv v3,v1,v2 +0000000080002efe : + 80002efe: 821111d7 vfdiv.vv v3,v1,v2 + 80002f02: a019 j 80002f08 -0000000080002e3e : - 80002e3e: 022451d7 vfadd.vf v3,v2,fs0 +0000000080002f04 : + 80002f04: 022451d7 vfadd.vf v3,v2,fs0 -0000000080002e42 : - 80002e42: 020b01a7 vse8.v v3,(s6) - 80002e46: 4c01 li s8,0 - 80002e48: 013c0533 add a0,s8,s3 - 80002e4c: 00054603 lbu a2,0(a0) - 80002e50: 018a0533 add a0,s4,s8 - 80002e54: 00054683 lbu a3,0(a0) - 80002e58: 016c0533 add a0,s8,s6 - 80002e5c: 00054703 lbu a4,0(a0) - 80002e60: 8522 mv a0,s0 - 80002e62: 85a6 mv a1,s1 - 80002e64: 00000097 auipc ra,0x0 - 80002e68: a3a080e7 jalr -1478(ra) # 8000289e - 80002e6c: 0c05 add s8,s8,1 - 80002e6e: fd7c1de3 bne s8,s7,80002e48 - 80002e72: 0a85 add s5,s5,1 - 80002e74: 040a0a13 add s4,s4,64 - 80002e78: 8c66 mv s8,s9 - 80002e7a: 4511 li a0,4 - 80002e7c: f4aa96e3 bne s5,a0,80002dc8 - 80002e80: 6962 ld s2,24(sp) - 80002e82: 0905 add s2,s2,1 - 80002e84: 65c2 ld a1,16(sp) - 80002e86: 2585 addw a1,a1,1 - 80002e88: 10000513 li a0,256 - 80002e8c: f0a91ee3 bne s2,a0,80002da8 - 80002e90: 4501 li a0,0 - 80002e92: 60ea ld ra,152(sp) - 80002e94: 644a ld s0,144(sp) - 80002e96: 64aa ld s1,136(sp) - 80002e98: 690a ld s2,128(sp) - 80002e9a: 79e6 ld s3,120(sp) - 80002e9c: 7a46 ld s4,112(sp) - 80002e9e: 7aa6 ld s5,104(sp) - 80002ea0: 7b06 ld s6,96(sp) - 80002ea2: 6be6 ld s7,88(sp) - 80002ea4: 6c46 ld s8,80(sp) - 80002ea6: 6ca6 ld s9,72(sp) - 80002ea8: 6d06 ld s10,64(sp) - 80002eaa: 7de2 ld s11,56(sp) - 80002eac: 3442 fld fs0,48(sp) - 80002eae: 610d add sp,sp,160 - 80002eb0: 8082 ret +0000000080002f08 : + 80002f08: 020c01a7 vse8.v v3,(s8) + 80002f0c: 0219d513 srl a0,s3,0x21 + 80002f10: 74e2 ld s1,56(sp) + 80002f12: 4589 li a1,2 + 80002f14: 00a5e463 bltu a1,a0,80002f1c + 80002f18: 7542 ld a0,48(sp) + 80002f1a: 6104 ld s1,0(a0) + 80002f1c: 4901 li s2,0 + 80002f1e: 01590533 add a0,s2,s5 + 80002f22: 00054603 lbu a2,0(a0) + 80002f26: 012b8533 add a0,s7,s2 + 80002f2a: 00054683 lbu a3,0(a0) + 80002f2e: 01890533 add a0,s2,s8 + 80002f32: 00054703 lbu a4,0(a0) + 80002f36: 8522 mv a0,s0 + 80002f38: 85a6 mv a1,s1 + 80002f3a: 00000097 auipc ra,0x0 + 80002f3e: 9c2080e7 jalr -1598(ra) # 800028fc + 80002f42: 0905 add s2,s2,1 + 80002f44: fd491de3 bne s2,s4,80002f1e + 80002f48: 0b05 add s6,s6,1 + 80002f4a: 040b8b93 add s7,s7,64 + 80002f4e: 84e6 mv s1,s9 + 80002f50: 4511 li a0,4 + 80002f52: f2ab13e3 bne s6,a0,80002e78 + 80002f56: 7922 ld s2,40(sp) + 80002f58: 0905 add s2,s2,1 + 80002f5a: 7682 ld a3,32(sp) + 80002f5c: 2685 addw a3,a3,1 + 80002f5e: 10000513 li a0,256 + 80002f62: eea91ae3 bne s2,a0,80002e56 + 80002f66: 001d051b addw a0,s10,1 + 80002f6a: 458d li a1,3 + 80002f6c: ecbd62e3 bltu s10,a1,80002e30 + 80002f70: 4501 li a0,0 + 80002f72: 60ae ld ra,200(sp) + 80002f74: 640e ld s0,192(sp) + 80002f76: 74ea ld s1,184(sp) + 80002f78: 794a ld s2,176(sp) + 80002f7a: 79aa ld s3,168(sp) + 80002f7c: 7a0a ld s4,160(sp) + 80002f7e: 6aea ld s5,152(sp) + 80002f80: 6b4a ld s6,144(sp) + 80002f82: 6baa ld s7,136(sp) + 80002f84: 6c0a ld s8,128(sp) + 80002f86: 7ce6 ld s9,120(sp) + 80002f88: 7d46 ld s10,112(sp) + 80002f8a: 7da6 ld s11,104(sp) + 80002f8c: 3406 fld fs0,96(sp) + 80002f8e: 6169 add sp,sp,208 + 80002f90: 8082 ret -0000000080002eb2 : - 80002eb2: 7139 add sp,sp,-64 - 80002eb4: fc06 sd ra,56(sp) - 80002eb6: f822 sd s0,48(sp) - 80002eb8: f426 sd s1,40(sp) - 80002eba: f04a sd s2,32(sp) - 80002ebc: ec4e sd s3,24(sp) - 80002ebe: e852 sd s4,16(sp) - 80002ec0: e456 sd s5,8(sp) - 80002ec2: fff7871b addw a4,a5,-1 - 80002ec6: 4789 li a5,2 - 80002ec8: 8932 mv s2,a2 - 80002eca: 8aae mv s5,a1 - 80002ecc: 842a mv s0,a0 - 80002ece: 00e7ee63 bltu a5,a4,80002eea - 80002ed2: 00371513 sll a0,a4,0x3 - 80002ed6: 00000597 auipc a1,0x0 - 80002eda: 5ca58593 add a1,a1,1482 # 800034a0 - 80002ede: 952e add a0,a0,a1 - 80002ee0: 00053983 ld s3,0(a0) - 80002ee4: 00d04963 bgtz a3,80002ef6 - 80002ee8: a081 j 80002f28 - 80002eea: 00000997 auipc s3,0x0 - 80002eee: 61d98993 add s3,s3,1565 # 80003507 - 80002ef2: 02d05b63 blez a3,80002f28 - 80002ef6: 02069513 sll a0,a3,0x20 - 80002efa: 02055493 srl s1,a0,0x20 - 80002efe: 00000a17 auipc s4,0x0 - 80002f02: 629a0a13 add s4,s4,1577 # 80003527 - 80002f06: 00044603 lbu a2,0(s0) - 80002f0a: 000ac683 lbu a3,0(s5) - 80002f0e: 00094703 lbu a4,0(s2) - 80002f12: 8552 mv a0,s4 - 80002f14: 85ce mv a1,s3 - 80002f16: 00000097 auipc ra,0x0 - 80002f1a: 988080e7 jalr -1656(ra) # 8000289e - 80002f1e: 0405 add s0,s0,1 - 80002f20: 0a85 add s5,s5,1 - 80002f22: 14fd add s1,s1,-1 - 80002f24: 0905 add s2,s2,1 - 80002f26: f0e5 bnez s1,80002f06 - 80002f28: 70e2 ld ra,56(sp) - 80002f2a: 7442 ld s0,48(sp) - 80002f2c: 74a2 ld s1,40(sp) - 80002f2e: 7902 ld s2,32(sp) - 80002f30: 69e2 ld s3,24(sp) - 80002f32: 6a42 ld s4,16(sp) - 80002f34: 6aa2 ld s5,8(sp) - 80002f36: 6121 add sp,sp,64 - 80002f38: 8082 ret +0000000080002f92 : + 80002f92: 7139 add sp,sp,-64 + 80002f94: fc06 sd ra,56(sp) + 80002f96: f822 sd s0,48(sp) + 80002f98: f426 sd s1,40(sp) + 80002f9a: f04a sd s2,32(sp) + 80002f9c: ec4e sd s3,24(sp) + 80002f9e: e852 sd s4,16(sp) + 80002fa0: e456 sd s5,8(sp) + 80002fa2: fff7871b addw a4,a5,-1 + 80002fa6: 4789 li a5,2 + 80002fa8: 8932 mv s2,a2 + 80002faa: 8aae mv s5,a1 + 80002fac: 842a mv s0,a0 + 80002fae: 00e7ee63 bltu a5,a4,80002fca + 80002fb2: 00371513 sll a0,a4,0x3 + 80002fb6: 00000597 auipc a1,0x0 + 80002fba: 5ca58593 add a1,a1,1482 # 80003580 + 80002fbe: 952e add a0,a0,a1 + 80002fc0: 00053983 ld s3,0(a0) + 80002fc4: 00d04963 bgtz a3,80002fd6 + 80002fc8: a081 j 80003008 + 80002fca: 00000997 auipc s3,0x0 + 80002fce: 64498993 add s3,s3,1604 # 8000360e + 80002fd2: 02d05b63 blez a3,80003008 + 80002fd6: 02069513 sll a0,a3,0x20 + 80002fda: 02055493 srl s1,a0,0x20 + 80002fde: 00000a17 auipc s4,0x0 + 80002fe2: 650a0a13 add s4,s4,1616 # 8000362e + 80002fe6: 00044603 lbu a2,0(s0) + 80002fea: 000ac683 lbu a3,0(s5) + 80002fee: 00094703 lbu a4,0(s2) + 80002ff2: 8552 mv a0,s4 + 80002ff4: 85ce mv a1,s3 + 80002ff6: 00000097 auipc ra,0x0 + 80002ffa: 906080e7 jalr -1786(ra) # 800028fc + 80002ffe: 0405 add s0,s0,1 + 80003000: 0a85 add s5,s5,1 + 80003002: 14fd add s1,s1,-1 + 80003004: 0905 add s2,s2,1 + 80003006: f0e5 bnez s1,80002fe6 + 80003008: 70e2 ld ra,56(sp) + 8000300a: 7442 ld s0,48(sp) + 8000300c: 74a2 ld s1,40(sp) + 8000300e: 7902 ld s2,32(sp) + 80003010: 69e2 ld s3,24(sp) + 80003012: 6a42 ld s4,16(sp) + 80003014: 6aa2 ld s5,8(sp) + 80003016: 6121 add sp,sp,64 + 80003018: 8082 ret From 1e37cbd403884095c8b0bb32fe2715956bfdfdcb Mon Sep 17 00:00:00 2001 From: Andrea Marcelli Date: Wed, 9 Jul 2025 15:39:01 +0200 Subject: [PATCH 19/31] Modified the softfloat_8 files to also support nvidia/ofp fp8 types --- softfloat_8/bf16_to_f8_1.c | 202 ++++++++++++++++++++++----- softfloat_8/bf16_to_f8_1_old.c | 23 +-- softfloat_8/bf16_to_f8_2.c | 101 ++++++++++++-- softfloat_8/bf16_to_f8_2_old.c | 20 +-- softfloat_8/bf16_to_i8.c | 15 -- softfloat_8/bf16_to_ui8.c | 15 -- softfloat_8/f8_1_2_recip7_rsqrte7.c | 2 +- softfloat_8/f8_1_classify.c | 27 ++-- softfloat_8/f8_1_div.c | 141 +++++++++++-------- softfloat_8/f8_1_eq.c | 2 +- softfloat_8/f8_1_mul.c | 55 +++++--- softfloat_8/f8_1_sqrt.c | 42 +++--- softfloat_8/f8_1_to_bf16.c | 26 ++-- softfloat_8/f8_1_to_f8_2.c | 28 ++-- softfloat_8/f8_1_to_i32.c | 19 ++- softfloat_8/f8_1_to_ui32.c | 19 ++- softfloat_8/f8_2_add.c | 15 -- softfloat_8/f8_2_classify.c | 15 -- softfloat_8/f8_2_div.c | 17 +-- softfloat_8/f8_2_eq.c | 15 -- softfloat_8/f8_2_le.c | 15 -- softfloat_8/f8_2_lt.c | 15 -- softfloat_8/f8_2_lt_quiet.c | 15 -- softfloat_8/f8_2_max_min.c | 15 -- softfloat_8/f8_2_mul.c | 17 +-- softfloat_8/f8_2_mulAdd.c | 15 -- softfloat_8/f8_2_sqrt.c | 25 +--- softfloat_8/f8_2_sub.c | 15 -- softfloat_8/f8_2_to_bf16.c | 16 --- softfloat_8/f8_2_to_f8_1.c | 52 ++++--- softfloat_8/f8_2_to_i16.c | 15 -- softfloat_8/f8_2_to_i32.c | 15 -- softfloat_8/f8_2_to_i8.c | 15 -- softfloat_8/f8_2_to_ui16.c | 15 -- softfloat_8/f8_2_to_ui32.c | 15 -- softfloat_8/f8_2_to_ui8.c | 15 -- softfloat_8/i16_to_f8_1.c | 2 +- softfloat_8/i16_to_f8_2.c | 17 +-- softfloat_8/i32_to_f8_1.c | 2 +- softfloat_8/i32_to_f8_2.c | 17 +-- softfloat_8/i8_to_bf16.c | 15 -- softfloat_8/internals.h | 14 +- softfloat_8/s_addMagsF8_1.c | 105 ++++++++++---- softfloat_8/s_addMagsF8_2.c | 17 +-- softfloat_8/s_mulAddF8_1.c | 59 +++++--- softfloat_8/s_mulAddF8_2.c | 17 +-- softfloat_8/s_normRoundPackToF8_1.c | 25 +++- softfloat_8/s_normRoundPackToF8_2.c | 19 +-- softfloat_8/s_normSubnormalF8_1Sig.c | 2 +- softfloat_8/s_normSubnormalF8_2Sig.c | 15 -- softfloat_8/s_propagateNaNF8_2UI.c | 15 -- softfloat_8/s_roundPackToF8_1.c | 115 +++++++++++---- softfloat_8/s_roundPackToF8_2.c | 67 ++++++--- softfloat_8/s_subMagsF8_1.c | 72 +++++++--- softfloat_8/s_subMagsF8_2.c | 17 +-- softfloat_8/softfloat_types.h | 7 + softfloat_8/specialize.h | 28 +++- softfloat_8/ui16_to_f8_1.c | 2 +- softfloat_8/ui16_to_f8_2.c | 17 +-- softfloat_8/ui32_to_f8_1.c | 2 +- softfloat_8/ui32_to_f8_2.c | 17 +-- softfloat_8/ui8_to_bf16.c | 15 -- 62 files changed, 900 insertions(+), 889 deletions(-) diff --git a/softfloat_8/bf16_to_f8_1.c b/softfloat_8/bf16_to_f8_1.c index 91da3b16a8..dea0b4ae08 100644 --- a/softfloat_8/bf16_to_f8_1.c +++ b/softfloat_8/bf16_to_f8_1.c @@ -180,39 +180,107 @@ float8_1_t bf16_to_f8_1( float16_t a ) } } } - else if (exp <= 0x86) { // 0x86 is the biggest number in which mantissa is not overflowing - int mask_frac = 0x70; // creates a mask equal to 111_0000 which enables only the mantissa in the core - int mask_precision = 0x8; // creates a mask equal to 000_1000 which enables only the mantissa in the core - int mask_inexact = 0x07; // creates a mask equal to 000_0111 which enables only the mantissa in the core - precision = (frac & mask_precision) >> 3; - inexact = ((frac & mask_inexact) > 0); - exp = exp - 127 + 7; - frac = (frac & mask_frac) >> 4; - uiZ = packToF8_1UI( sign, exp, frac); - } - else if ( exp < 0xFF ) { - exp = 0xE; - frac = 0x7; - uiZ = packToF8_1UI( sign, exp, frac); - inexact = 1; - precision = 1; - overflow = 1; - } - else if (exp == 0xFF) { - if (frac) { - softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); - uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); - uZ.ui = uiZ; - return uZ.f; - } else { - exp = 0xF; - frac = 0x0; + #if E4M3_OFP8 == 1 + else if (exp <= 0x87) { // 0x86 is the biggest number in which mantissa is not overflowing + int mask_frac = 0x70; // creates a mask equal to 111_0000 which enables only the mantissa in the core + int mask_precision = 0x8; // creates a mask equal to 000_1000 which enables only the mantissa in the core + int mask_inexact = 0x07; // creates a mask equal to 000_0111 which enables only the mantissa in the core + precision = (frac & mask_precision) >> 3; + inexact = ((frac & mask_inexact) > 0); + exp = exp - 127 + 7; + frac = (frac & mask_frac) >> 4; + uiZ = packToF8_1UI( sign, exp, frac); - uZ.ui = uiZ; - return uZ.f; } - goto uiZ; - } + else if ( exp < 0xFF ) { + #if OFP8_saturate == 1 + exp = 0xF; + frac = 0x6; + uiZ = packToF8_1UI( sign, exp, frac); + inexact = 1; + precision = 1; + #if OFP8_overflow_flag == 1 + overflow = 1; + #else + overflow = 0; + #endif + uZ.ui = uiZ; + #if OFP8_overflow_flag == 1 + softfloat_raiseFlags(softfloat_flag_overflow | softfloat_flag_inexact); + #else + softfloat_raiseFlags(softfloat_flag_inexact); + #endif + return uZ.f; + #else + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + #endif + } + else if (exp == 0xFF) { + if (frac) { //NaN + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + } else { //inf + #if OFP8_saturate == 1 + exp = 0xF; + frac = 0x6; + uiZ = packToF8_1UI( sign, exp, frac); //max_value + uZ.ui = uiZ; + #if OFP8_overflow_flag == 1 + softfloat_raiseFlags(softfloat_flag_overflow | softfloat_flag_inexact); + #else + softfloat_raiseFlags(softfloat_flag_inexact); + #endif + return uZ.f; + #else + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + #endif + } + goto uiZ; + } + #else + else if (exp <= 0x86) { // 0x86 is the biggest number in which mantissa is not overflowing + int mask_frac = 0x70; // creates a mask equal to 111_0000 which enables only the mantissa in the core + int mask_precision = 0x8; // creates a mask equal to 000_1000 which enables only the mantissa in the core + int mask_inexact = 0x07; // creates a mask equal to 000_0111 which enables only the mantissa in the core + precision = (frac & mask_precision) >> 3; + inexact = ((frac & mask_inexact) > 0); + exp = exp - 127 + 7; + frac = (frac & mask_frac) >> 4; + uiZ = packToF8_1UI( sign, exp, frac); + } + else if ( exp < 0xFF ) { + exp = 0xE; + frac = 0x7; + uiZ = packToF8_1UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + } + else if (exp == 0xFF) { + if (frac) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + return uZ.f; + } else { + exp = 0xF; + frac = 0x0; + uiZ = packToF8_1UI( sign, exp, frac); + uZ.ui = uiZ; + return uZ.f; + } + goto uiZ; + } + #endif + if ((exp == 0xE && expF8_1UI(uiZ + round_f8_1(sign, frac, precision, inexact, overflow)) == 1) || overflow == 1) { softfloat_raiseFlags(softfloat_flag_overflow | softfloat_flag_inexact); } @@ -223,10 +291,74 @@ float8_1_t bf16_to_f8_1( float16_t a ) } } uiZ: - uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); - if (((uZ.ui >> 3) & 0xF) == 0xF) { - softfloat_raiseFlags(softfloat_flag_overflow); - } + + #if E4M3_OFP8 == 1 + #if OFP8_saturate == 1 + #if OFP8_overflow_flag == 1 + + if ((uiZ & 0x7F) == 0x7F ) { + uZ.ui = uiZ; + goto Jumped; + } + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + + Jumped: + if ((((uZ.ui >> 3) & 0xF) == 0xF) && (((uZ.ui >> 0) & 0x7) == 0x7)) { + softfloat_raiseFlags(softfloat_flag_overflow); + uZ.ui = 0x7e | sign<<7; + } + #else + if ((uiZ & 0x7F) == 0x7F) { + uZ.ui = uiZ; + goto Jumped; + } + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + + Jumped: + if ((((uZ.ui >> 3) & 0xF) == 0xF) && (((uZ.ui >> 0) & 0x7) == 0x7)) { + uZ.ui = 0x7e | sign<<7; + } + #endif + #else + #if OFP8_overflow_flag == 1 + if ((uiZ & 0x7F) == 0x7F) { + uZ.ui = uiZ & 0x7F; + goto Jumped; + } + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + Jumped: + if ((((uZ.ui >> 3) & 0xF) == 0xF) && (((uZ.ui >> 0) & 0x7) == 0x7)) { + softfloat_raiseFlags(softfloat_flag_overflow); + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + } + #else + if ((uiZ & 0x7F) == 0x7F) { + uZ.ui = uiZ & 0x7F; + goto Jumped; + } + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + Jumped: + if ((((uZ.ui >> 3) & 0xF) == 0xF) && (((uZ.ui >> 0) & 0x7) == 0x7)) { + softfloat_bf16UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + uZ.ui = uiZ; + } + #endif + #endif + #else + //if ((uiZ & 0x7F) == 0x7F) { + // uZ.ui = uiZ & 0x7F; + // goto Jumped; + //} + uZ.ui = uiZ + round_f8_1(sign, frac, precision, inexact, overflow); + //Jumped: + if (((uZ.ui >> 3) & 0xF) == 0xF) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + #endif + //printf("uiZ = 0x%x, sign = %d, exp = 0x%lx, frac = 0x%x\n", uiZ, sign, exp, frac); return uZ.f; } diff --git a/softfloat_8/bf16_to_f8_1_old.c b/softfloat_8/bf16_to_f8_1_old.c index da59a682c1..cb666395ac 100644 --- a/softfloat_8/bf16_to_f8_1_old.c +++ b/softfloat_8/bf16_to_f8_1_old.c @@ -1,19 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ - #include #include #include "platform.h" @@ -52,17 +36,16 @@ float8_1_t bf16_to_f8_1( float16_t a ) } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - frac8_1 = frac | ((frac & 0x00) != 0); + frac8_1 = frac>>1 | ((frac & 0x3F) != 0); if ( ! (exp | frac8_1) ) { uiZ = packToF8_1UI( sign, 0, 0 ); goto uiZ; } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - return softfloat_roundPackToF8_1( sign, exp - 0x78, frac8_1 | 0x40 ); + return softfloat_roundPackToF8_1( sign, exp - 0x79, frac8_1 | 0x40, (bool) 1 ); //127 - 7 = 120 uiZ: uZ.ui = uiZ; return uZ.f; -} - +} \ No newline at end of file diff --git a/softfloat_8/bf16_to_f8_2.c b/softfloat_8/bf16_to_f8_2.c index 270f950950..c4bf7dfad5 100644 --- a/softfloat_8/bf16_to_f8_2.c +++ b/softfloat_8/bf16_to_f8_2.c @@ -129,12 +129,30 @@ float8_2_t bf16_to_f8_2( float16_t a ) uiZ = packToF8_2UI( sign, exp, frac); } else if ( exp < 0xFF ) { - exp = 0x1E; - frac = 0x3; - uiZ = packToF8_2UI( sign, exp, frac); - inexact = 1; - precision = 1; - overflow = 1; + #if E4M3_OFP8 == 1 + #if OFP8_saturate == 1 + exp = 0x1E; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + #else + exp = 0x1E; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + #endif + #else + exp = 0x1E; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + #endif } else if (exp == 0xFF) { if (frac) { @@ -143,11 +161,29 @@ float8_2_t bf16_to_f8_2( float16_t a ) uZ.ui = uiZ; return uZ.f; } else { - exp = 0x1F; - frac = 0x0; - uiZ = packToF8_2UI( sign, exp, frac); - uZ.ui = uiZ; - return uZ.f; + + #if E4M3_OFP8 == 1 + #if OFP8_saturate == 1 + exp = 0x1E; + frac = 0x3; + uiZ = packToF8_2UI( sign, exp, frac); + inexact = 1; + precision = 1; + overflow = 1; + #else + exp = 0x1F; + frac = 0x0; + uiZ = packToF8_2UI( sign, exp, frac); + uZ.ui = uiZ; + return uZ.f; + #endif + #else + exp = 0x1F; + frac = 0x0; + uiZ = packToF8_2UI( sign, exp, frac); + uZ.ui = uiZ; + return uZ.f; + #endif } goto uiZ; } @@ -161,10 +197,45 @@ float8_2_t bf16_to_f8_2( float16_t a ) } } uiZ: - uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); - if (((uZ.ui >> 2) & 0x1F) == 0x1F) { - softfloat_raiseFlags(softfloat_flag_overflow); - } + + #if E4M3_OFP8 == 1 + #if OFP8_saturate == 1 + #if OFP8_overflow_flag == 1 + if ((uiZ & 0x7F) == 0x7B){ + uZ.ui = uiZ; + if ((((uiZ + round_f8_2(sign, frac, precision, inexact, overflow)) >> 2) & 0x1F) == 0x1F) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + } else { + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + if (((uZ.ui >> 2) & 0x1F) == 0x1F) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + } + #else + if ((uiZ & 0x7F) == 0x7B){ + uZ.ui = uiZ; + } else { + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + } + #endif + #else + #if OFP8_overflow_flag == 1 + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + if (((uZ.ui >> 2) & 0x1F) == 0x1F) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + #else + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + #endif + #endif + #else //IEEE-like + uZ.ui = uiZ + round_f8_2(sign, frac, precision, inexact, overflow); + if (((uZ.ui >> 2) & 0x1F) == 0x1F) { + softfloat_raiseFlags(softfloat_flag_overflow); + } + #endif + //printf("uiZ = 0x%x, sign = %d, exp = 0x%lx, frac = 0x%x\n", uiZ, sign, exp, frac); return uZ.f; } diff --git a/softfloat_8/bf16_to_f8_2_old.c b/softfloat_8/bf16_to_f8_2_old.c index d33fc624f7..5bd7aad236 100644 --- a/softfloat_8/bf16_to_f8_2_old.c +++ b/softfloat_8/bf16_to_f8_2_old.c @@ -1,19 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ - #include #include #include "platform.h" @@ -52,14 +36,14 @@ float8_2_t bf16_to_f8_2( float16_t a ) } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - frac8_2 = frac>>1 | ((frac & 0x01) != 0); + frac8_2 = frac>>1 | ((frac & 0x3F) != 0); if ( ! (exp | frac8_2) ) { uiZ = packToF8_2UI( sign, 0, 0 ); goto uiZ; } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - return softfloat_roundPackToF8_2( sign, exp - 0x71, frac8_2 | 0x40 ); + return softfloat_roundPackToF8_2( sign, exp - 0x71, frac8_2 | 0x40, (bool) 1 ); uiZ: uZ.ui = uiZ; return uZ.f; diff --git a/softfloat_8/bf16_to_i8.c b/softfloat_8/bf16_to_i8.c index de4ec2bb0a..cad0eb665b 100644 --- a/softfloat_8/bf16_to_i8.c +++ b/softfloat_8/bf16_to_i8.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/bf16_to_ui8.c b/softfloat_8/bf16_to_ui8.c index a303651493..532f2e8862 100644 --- a/softfloat_8/bf16_to_ui8.c +++ b/softfloat_8/bf16_to_ui8.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_1_2_recip7_rsqrte7.c b/softfloat_8/f8_1_2_recip7_rsqrte7.c index facd2461a2..e50eef8fdf 100644 --- a/softfloat_8/f8_1_2_recip7_rsqrte7.c +++ b/softfloat_8/f8_1_2_recip7_rsqrte7.c @@ -249,7 +249,7 @@ float8_1_t f8_1_recip7( float8_1_t in) softfloat_roundingMode, sub, &round_abnormal); if (round_abnormal) softfloat_exceptionFlags |= softfloat_flag_inexact | - softfloat_flag_overflow; + softfloat_flag_overflow; //questa flag non so se va bene break; } diff --git a/softfloat_8/f8_1_classify.c b/softfloat_8/f8_1_classify.c index f7c3063be0..247ef32205 100644 --- a/softfloat_8/f8_1_classify.c +++ b/softfloat_8/f8_1_classify.c @@ -30,7 +30,12 @@ uint_fast16_t f8_1_classify( float8_1_t a ) uA.f = a; uiA = uA.ui; - uint_fast16_t infOrNaN = expF8_1UI( uiA ) == 0x0F; + #if E4M3_OFP8 == 1 + uint_fast16_t infOrNaN = 0; + #else + uint_fast16_t infOrNaN = expF8_1UI( uiA ) == 0x0F; + #endif + uint_fast16_t subnormalOrZero = expF8_1UI( uiA ) == 0; bool sign = signF8_1UI( uiA ); bool fracZero = fracF8_1UI( uiA ) == 0; @@ -38,15 +43,15 @@ uint_fast16_t f8_1_classify( float8_1_t a ) bool isSNaN = softfloat_isSigNaNF8_1UI( uiA ); return - ( sign && infOrNaN && fracZero ) << 0 | - ( sign && !infOrNaN && !subnormalOrZero ) << 1 | - ( sign && subnormalOrZero && !fracZero ) << 2 | - ( sign && subnormalOrZero && fracZero ) << 3 | - ( !sign && infOrNaN && fracZero ) << 7 | - ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | - ( !sign && subnormalOrZero && !fracZero ) << 5 | - ( !sign && subnormalOrZero && fracZero ) << 4 | - ( isNaN && isSNaN ) << 8 | - ( isNaN && !isSNaN ) << 9; + ( sign && infOrNaN && fracZero ) << 0 | //-inf + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | //-normal + ( sign && subnormalOrZero && !fracZero ) << 2 | //-subnormal + ( sign && subnormalOrZero && fracZero ) << 3 | //-zero + ( !sign && infOrNaN && fracZero ) << 7 | //+inf + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | //+normal + ( !sign && subnormalOrZero && !fracZero ) << 5 | //+subnormal + ( !sign && subnormalOrZero && fracZero ) << 4 | //+zero + ( isNaN && isSNaN ) << 8 | //signaling NaN + ( isNaN && !isSNaN ) << 9; //quiet NaN } diff --git a/softfloat_8/f8_1_div.c b/softfloat_8/f8_1_div.c index dbbfd0791a..5342f9a9ce 100644 --- a/softfloat_8/f8_1_div.c +++ b/softfloat_8/f8_1_div.c @@ -43,12 +43,12 @@ float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) bool signZ; struct exp8_sig8_1 normExpSig; int_fast8_t expZ; -#ifdef SOFTFLOAT_FAST_DIV16TO8 //?????? dove è definito? serve? +#ifdef SOFTFLOAT_FAST_DIV16TO8 uint_fast16_t sig16A; uint_fast8_t sigZ; #else int index; - uint8_t r0; //??? + uint8_t r0; uint_fast8_t sigZ, rem; #endif uint_fast8_t uiZ; @@ -60,7 +60,7 @@ float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) uiA = uA.ui; signA = signF8_1UI( uiA ); expA = expF8_1UI( uiA ); - sigA = fracF8_1UI( uiA ); //sig con frac è solo 3 bit max + sigA = fracF8_1UI( uiA ); uB.f = b; uiB = uB.ui; signB = signF8_1UI( uiB ); @@ -69,40 +69,65 @@ float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) signZ = signA ^ signB; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( expA == 0x0F ) { - if ( sigA ) goto propagateNaN; + + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 ) goto propagateNaN; + } + if ( expB == 0x0F ) { + if ( sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA ) goto propagateNaN; + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + goto invalid; + } + goto infinity; + } if ( expB == 0x0F ) { if ( sigB ) goto propagateNaN; - goto invalid; + goto zero; } - goto infinity; - } - if ( expB == 0x0F ) { - if ( sigB ) goto propagateNaN; - goto zero; - } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( ! expB ) { - if ( ! sigB ) { - if ( ! (expA | sigA) ) goto invalid; - softfloat_raiseFlags( softfloat_flag_infinite ); - goto infinity; + #if E4M3_OFP8 == 1 + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; // 0/0 + goto propagateNaN; // num/0 + } + normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; } - normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); - expB = normExpSig.exp; - sigB = normExpSig.sig; - } + #else + if ( ! expB ) { + if ( ! sigB ) { + if ( ! (expA | sigA) ) goto invalid; // 0/0 + softfloat_raiseFlags( softfloat_flag_infinite ); + goto infinity; // num/0 + } + normExpSig = softfloat_normSubnormalF8_1Sig( sigB ); + expB = normExpSig.exp; + sigB = normExpSig.sig; + } + #endif + + if ( ! expA ) { - if ( ! sigA ) goto zero; + if ( ! sigA ) goto zero; // 0/num normExpSig = softfloat_normSubnormalF8_1Sig( sigA ); expA = normExpSig.exp; sigA = normExpSig.sig; } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - expZ = expA - expB + 0x6; //uno meno dell'eccesso - sigA |= 0x08; // un uno sul bit meno significativo dell'esponente + expZ = expA - expB + 0x6; + sigA |= 0x08; sigB |= 0x08; #ifdef SOFTFLOAT_FAST_DIV16TO8 if ( sigA < sigB ) { @@ -112,36 +137,36 @@ float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) sig16A = (uint_fast16_t) sigA<<6; } sigZ = sig16A / sigB; - if ( ! (sigZ & 3) ) sigZ |= ((uint_fast16_t) sigB * sigZ != sig16A); // 3 = 'due' bit a 1, 'due' = numero bit esponente meno due -#else - if ( sigA < sigB ) { - --expZ; - sigA <<= 4; //quanto i bit dell'esponente - } else { - sigA <<= 3; //uno meno dei bit dell'esponente - } - index = sigB<<1 & 0xF; //allora, la sigB prima di questa riga ha 4 bit, 3 propri e uno aggiunto riga 90. devo portarlo a 5 bit per metterlo dentro softfloat_approxRecip_1k0s, sempre se va bene - r0 = softfloat_approxRecip_1k0s[index] //r0 esce a 16 bit - - (((uint_fast32_t) softfloat_approxRecip_1k1s[index] - * (sigB & 0x3F)) - >>17); //perchè da un massimo di 21 bit che vengono dalla moltiplicazione devo tornare a 4 (3 mantissa più l'1 implicito davanti) - sigZ = ((uint_fast16_t) sigA * r0)>>8; - rem = (sigA<<17) - sigZ * sigB; //l'ho messa come sopra ma boh, sarà bit mantissa??? - sigZ += (rem * (uint_fast16_t) r0)>>26; //questo numero dipende da quello riga sopra - /*------------------------------------------------------------------------ - *------------------------------------------------------------------------*/ - ++sigZ; //??????? ancora da fare - if ( ! (sigZ & 3) ) { - sigZ &= ~1; - rem = (sigA<<17) - sigZ * sigB; //come riga 113 - if ( rem & 0x80 ) { - sigZ -= 2; - } else { - if ( rem ) sigZ |= 1; - } - } + if ( ! (sigZ & 3) ) sigZ |= ((uint_fast16_t) sigB * sigZ != sig16A); +//#else +// if ( sigA < sigB ) { +// --expZ; +// sigA <<= 4; //quanto i bit dell'esponente +// } else { +// sigA <<= 3; //uno meno dei bit dell'esponente +// } +// index = sigB<<1 & 0xF; //allora, la sigB prima di questa riga ha 4 bit, 3 propri e uno aggiunto riga 90. devo portarlo a 5 bit per metterlo dentro softfloat_approxRecip_1k0s, sempre se va bene +// r0 = softfloat_approxRecip_1k0s[index] //r0 esce a 16 bit +// - (((uint_fast32_t) softfloat_approxRecip_1k1s[index] +// * (sigB & 0x3F)) +// >>17); //perchè da un massimo di 21 bit che vengono dalla moltiplicazione devo tornare a 4 (3 mantissa più l'1 implicito davanti) +// sigZ = ((uint_fast16_t) sigA * r0)>>8; +// rem = (sigA<<17) - sigZ * sigB; //l'ho messa come sopra ma boh, sarà bit mantissa??? +// sigZ += (rem * (uint_fast16_t) r0)>>26; //questo numero dipende da quello riga sopra +// /*------------------------------------------------------------------------ +// *------------------------------------------------------------------------*/ +// ++sigZ; //??????? ancora da fare +// if ( ! (sigZ & 3) ) { +// sigZ &= ~1; +// rem = (sigA<<17) - sigZ * sigB; //come riga 113 +// if ( rem & 0x80 ) { +// sigZ -= 2; +// } else { +// if ( rem ) sigZ |= 1; +// } +// } #endif - return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_1( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ /*------------------------------------------------------------------------ @@ -157,9 +182,13 @@ float8_1_t f8_1_div( float8_1_t a, float8_1_t b ) goto uiZ; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - infinity: - uiZ = packToF8_1UI( signZ, 0x0F, 0 ); - goto uiZ; +#if E4M3_OFP8 == 1 + +#else + infinity: + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + goto uiZ; +#endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ zero: diff --git a/softfloat_8/f8_1_eq.c b/softfloat_8/f8_1_eq.c index d97b7be8e6..b7db14a84e 100644 --- a/softfloat_8/f8_1_eq.c +++ b/softfloat_8/f8_1_eq.c @@ -40,7 +40,7 @@ bool f8_1_eq( float8_1_t a, float8_1_t b ) } return false; } - return (uiA == uiB) || ! (uint8_t) ((uiA | uiB)<<1); + return (uiA == uiB) || ! (uint8_t) ((uiA | uiB)<<1); //the second part of || is used to check if we are in the case +0 = -0 } diff --git a/softfloat_8/f8_1_mul.c b/softfloat_8/f8_1_mul.c index 72aa577831..b727dd35ff 100644 --- a/softfloat_8/f8_1_mul.c +++ b/softfloat_8/f8_1_mul.c @@ -54,18 +54,27 @@ float8_1_t f8_1_mul( float8_1_t a, float8_1_t b ) expB = expF8_1UI( uiB ); sigB = fracF8_1UI( uiB ); signZ = signA ^ signB; - /*------------------------------------------------------------------------ + /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( expA == 0x0F ) { - if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN; - magBits = expB | sigB; - goto infArg; - } - if ( expB == 0x0F ) { - if ( sigB ) goto propagateNaN; - magBits = expA | sigA; - goto infArg; - } + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 || ((expB == 0x0F) && (sigB == 0x07)) ) goto propagateNaN; + } + if ( expB == 0x0F ) { + if ( sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN; + magBits = expB | sigB; + goto infArg; + } + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + magBits = expA | sigA; + goto infArg; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( ! expA ) { @@ -92,7 +101,7 @@ float8_1_t f8_1_mul( float8_1_t a, float8_1_t b ) --expZ; sigZ <<= 1; } - return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_1( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN: @@ -100,14 +109,20 @@ float8_1_t f8_1_mul( float8_1_t a, float8_1_t b ) goto uiZ; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - infArg: - if ( ! magBits ) { - softfloat_raiseFlags( softfloat_flag_invalid ); - uiZ = defaultNaNF8_1UI; - } else { - uiZ = packToF8_1UI( signZ, 0x0F, 0 ); - } - goto uiZ; + #if E4M3_OFP8 == 1 + + #else + infArg: + if ( ! magBits ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + } else { + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + } + goto uiZ; + #endif + + /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ zero: diff --git a/softfloat_8/f8_1_sqrt.c b/softfloat_8/f8_1_sqrt.c index f25ea3ae2e..cad234582a 100644 --- a/softfloat_8/f8_1_sqrt.c +++ b/softfloat_8/f8_1_sqrt.c @@ -48,14 +48,24 @@ float8_1_t f8_1_sqrt( float8_1_t a) sigA = fracF8_1UI( uiA ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( expA == 0x0F ) { - if ( sigA ) { - uiZ = softfloat_propagateNaNF8_1UI( uiA, 0 ); - goto uiZ; + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 ) { + uiZ = softfloat_propagateNaNF8_1UI( uiA, 0 ); + goto uiZ; + } } - if ( ! signA ) return a; - goto invalid; - } + #else + if ( expA == 0x0F ) { + if ( sigA ) { + uiZ = softfloat_propagateNaNF8_1UI( uiA, 0 ); + goto uiZ; + } + if ( ! signA ) return a; + goto invalid; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( signA ) { @@ -64,35 +74,35 @@ float8_1_t f8_1_sqrt( float8_1_t a) } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( ! expA ) { + if ( ! expA ) { //subnormal if ( ! sigA ) return a; switch(sigA){ case 0x1: { - return softfloat_roundPackToF8_1( 0, 1, 0x5A ); + return softfloat_roundPackToF8_1( 0, 1, 0x5A, (bool) 0 ); break; } case 0x2: { - return softfloat_roundPackToF8_1( 0, 2, 0x40 ); + return softfloat_roundPackToF8_1( 0, 2, 0x40, (bool) 0 ); break; } case 0x3: { - return softfloat_roundPackToF8_1( 0, 2, 0x4E ); + return softfloat_roundPackToF8_1( 0, 2, 0x4E, (bool) 0 ); break; } case 0x4: { - return softfloat_roundPackToF8_1( 0, 2, 0x5A ); + return softfloat_roundPackToF8_1( 0, 2, 0x5A, (bool) 0 ); break; } case 0x5: { - return softfloat_roundPackToF8_1( 0, 2, 0x65 ); + return softfloat_roundPackToF8_1( 0, 2, 0x65, (bool) 0 ); break; } case 0x6: { - return softfloat_roundPackToF8_1( 0, 2, 0x6E ); + return softfloat_roundPackToF8_1( 0, 2, 0x6E, (bool) 0 ); break; } case 0x7: { - return softfloat_roundPackToF8_1( 0, 2, 0x77 ); + return softfloat_roundPackToF8_1( 0, 2, 0x77, (bool) 0 ); break; } @@ -108,7 +118,7 @@ float8_1_t f8_1_sqrt( float8_1_t a) sigZ = softfloat_f8_1_sqrt_odd[sigA]; } - return softfloat_roundPackToF8_1( 0, expZ, sigZ ); + return softfloat_roundPackToF8_1( 0, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ invalid: diff --git a/softfloat_8/f8_1_to_bf16.c b/softfloat_8/f8_1_to_bf16.c index 4cc3a7e4e8..e90416e2e6 100644 --- a/softfloat_8/f8_1_to_bf16.c +++ b/softfloat_8/f8_1_to_bf16.c @@ -41,15 +41,25 @@ float16_t f8_1_to_bf16( float8_1_t a ) frac = fracF8_1UI( uiA ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( exp == 0xF ) { - if ( frac ) { - softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); - uiZ = softfloat_commonNaNToBF16UI( &commonNaN ); - } else { - uiZ = packToBF16UI( sign, 0xFF, 0 ); + #if E4M3_OFP8 == 1 + if ( exp == 0xF ) { + if ( frac == 0x07 ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToBF16UI( &commonNaN ); + goto uiZ; + } } - goto uiZ; - } + #else + if ( exp == 0xF ) { + if ( frac ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToBF16UI( &commonNaN ); + } else { + uiZ = packToBF16UI( sign, 0xFF, 0 ); + } + goto uiZ; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( ! exp ) { diff --git a/softfloat_8/f8_1_to_f8_2.c b/softfloat_8/f8_1_to_f8_2.c index 3db40d7504..c1e4839c56 100644 --- a/softfloat_8/f8_1_to_f8_2.c +++ b/softfloat_8/f8_1_to_f8_2.c @@ -42,15 +42,25 @@ float8_2_t f8_1_to_f8_2( float8_1_t a ) frac = fracF8_1UI( uiA ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( exp == 0x0F ) { - if ( frac ) { - softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); - uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); - } else { - uiZ = packToF8_2UI( sign, 0x1F, 0 ); + #if E4M3_OFP8 == 1 + if ( exp == 0x0F ) { + if ( frac == 0x07 ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); + goto uiZ; + } } - goto uiZ; - } + #else + if ( exp == 0x0F ) { + if ( frac ) { + softfloat_f8_1UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_2UI( &commonNaN ); + } else { + uiZ = packToF8_2UI( sign, 0x1F, 0x0 ); + } + goto uiZ; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( ! exp ) { @@ -67,7 +77,7 @@ float8_2_t f8_1_to_f8_2( float8_1_t a ) frac8 = frac << 3; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - return softfloat_roundPackToF8_2( sign, exp + 0x07, frac8 | 0x40 ); + return softfloat_roundPackToF8_2( sign, exp + 0x07, frac8 | 0x40, (bool) 1 ); uiZ: uZ.ui = uiZ; return uZ.f; diff --git a/softfloat_8/f8_1_to_i32.c b/softfloat_8/f8_1_to_i32.c index e76e111632..0bfcb020b5 100644 --- a/softfloat_8/f8_1_to_i32.c +++ b/softfloat_8/f8_1_to_i32.c @@ -40,12 +40,19 @@ int_fast32_t f8_1_to_i32( float8_1_t a, uint_fast8_t roundingMode, bool exact ) frac = fracF8_1UI( uiA ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( exp == 0x0F ) { - softfloat_raiseFlags( softfloat_flag_invalid ); - return - frac ? i32_fromNaN - : sign ? i32_fromNegOverflow : i32_fromPosOverflow; - } + #if E4M3_OFP8 == 1 + if ( exp == 0x0F && frac == 0x07 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; + } + #else + if ( exp == 0x0F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ sig32 = frac; diff --git a/softfloat_8/f8_1_to_ui32.c b/softfloat_8/f8_1_to_ui32.c index 33e56be6d5..6f507cda23 100644 --- a/softfloat_8/f8_1_to_ui32.c +++ b/softfloat_8/f8_1_to_ui32.c @@ -40,12 +40,19 @@ uint_fast32_t f8_1_to_ui32( float8_1_t a, uint_fast8_t roundingMode, bool exact frac = fracF8_1UI( uiA ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( exp == 0x0F ) { - softfloat_raiseFlags( softfloat_flag_invalid ); - return - frac ? ui32_fromNaN - : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow; - } + #if E4M3_OFP8 == 1 + if ( exp == 0x0F && frac == 0x07 ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return i32_fromNaN; + } + #else + if ( exp == 0x0F ) { + softfloat_raiseFlags( softfloat_flag_invalid ); + return + frac ? i32_fromNaN + : sign ? i32_fromNegOverflow : i32_fromPosOverflow; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ sig32 = frac; diff --git a/softfloat_8/f8_2_add.c b/softfloat_8/f8_2_add.c index 6cb0ae9539..dc036e53aa 100644 --- a/softfloat_8/f8_2_add.c +++ b/softfloat_8/f8_2_add.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_classify.c b/softfloat_8/f8_2_classify.c index 32544957b2..b09465eea2 100644 --- a/softfloat_8/f8_2_classify.c +++ b/softfloat_8/f8_2_classify.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_div.c b/softfloat_8/f8_2_div.c index 61a8c55a14..43f4e4edf7 100644 --- a/softfloat_8/f8_2_div.c +++ b/softfloat_8/f8_2_div.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -116,7 +101,7 @@ float8_2_t f8_2_div( float8_2_t a, float8_2_t b ) #else //algorithm #endif - return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_2( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ /*------------------------------------------------------------------------ diff --git a/softfloat_8/f8_2_eq.c b/softfloat_8/f8_2_eq.c index 06826a736d..6f2f382179 100644 --- a/softfloat_8/f8_2_eq.c +++ b/softfloat_8/f8_2_eq.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_le.c b/softfloat_8/f8_2_le.c index 4996ec7951..a0a6cad5ad 100644 --- a/softfloat_8/f8_2_le.c +++ b/softfloat_8/f8_2_le.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_lt.c b/softfloat_8/f8_2_lt.c index d7a3ca4b32..7bdecaa990 100644 --- a/softfloat_8/f8_2_lt.c +++ b/softfloat_8/f8_2_lt.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_lt_quiet.c b/softfloat_8/f8_2_lt_quiet.c index 82caf22ffe..d168a2fd75 100644 --- a/softfloat_8/f8_2_lt_quiet.c +++ b/softfloat_8/f8_2_lt_quiet.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_max_min.c b/softfloat_8/f8_2_max_min.c index 0059ac943a..07268a6baa 100644 --- a/softfloat_8/f8_2_max_min.c +++ b/softfloat_8/f8_2_max_min.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_mul.c b/softfloat_8/f8_2_mul.c index bc86c488b9..26c8aee056 100644 --- a/softfloat_8/f8_2_mul.c +++ b/softfloat_8/f8_2_mul.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -92,7 +77,7 @@ float8_2_t f8_2_mul( float8_2_t a, float8_2_t b ) --expZ; sigZ <<= 1; } - return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_2( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN: diff --git a/softfloat_8/f8_2_mulAdd.c b/softfloat_8/f8_2_mulAdd.c index 599436d952..e94983c97e 100644 --- a/softfloat_8/f8_2_mulAdd.c +++ b/softfloat_8/f8_2_mulAdd.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/f8_2_sqrt.c b/softfloat_8/f8_2_sqrt.c index 025b28c71e..9f1a40892c 100644 --- a/softfloat_8/f8_2_sqrt.c +++ b/softfloat_8/f8_2_sqrt.c @@ -1,19 +1,4 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ - +//solo per prova #include #include #include "platform.h" @@ -69,15 +54,15 @@ float8_2_t f8_2_sqrt( float8_2_t a) if ( ! sigA ) return a; switch(sigA){ case 0x1: { - return softfloat_roundPackToF8_2( 0, 6, 0x40 ); + return softfloat_roundPackToF8_2( 0, 6, 0x40, (bool) 0 ); break; } case 0x2: { - return softfloat_roundPackToF8_2( 0, 6, 0x5A ); + return softfloat_roundPackToF8_2( 0, 6, 0x5A, (bool) 0 ); break; } case 0x3: { - return softfloat_roundPackToF8_2( 0, 6, 0x6E ); + return softfloat_roundPackToF8_2( 0, 6, 0x6E, (bool) 0 ); break; } }; @@ -92,7 +77,7 @@ float8_2_t f8_2_sqrt( float8_2_t a) sigZ = softfloat_f8_2_sqrt_odd[sigA]; } - return softfloat_roundPackToF8_2( 0, expZ, sigZ ); + return softfloat_roundPackToF8_2( 0, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ invalid: diff --git a/softfloat_8/f8_2_sub.c b/softfloat_8/f8_2_sub.c index dc5fb9668c..86786a003f 100644 --- a/softfloat_8/f8_2_sub.c +++ b/softfloat_8/f8_2_sub.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_bf16.c b/softfloat_8/f8_2_to_bf16.c index ec7b3a1d2d..4f726047f7 100644 --- a/softfloat_8/f8_2_to_bf16.c +++ b/softfloat_8/f8_2_to_bf16.c @@ -1,19 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ - #include #include #include "internals.h" diff --git a/softfloat_8/f8_2_to_f8_1.c b/softfloat_8/f8_2_to_f8_1.c index 3e498679cc..f7b08e5289 100644 --- a/softfloat_8/f8_2_to_f8_1.c +++ b/softfloat_8/f8_2_to_f8_1.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -42,13 +27,34 @@ float8_1_t f8_2_to_f8_1( float8_2_t a ) /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( exp == 0x1F ) { - if ( frac ) { - softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); - uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); - } else { - uiZ = packToF8_1UI( sign, 0x0F, 0 ); - } - goto uiZ; + #if E4M3_OFP8 == 1 + + #if OFP8_saturate == 1 + if ( frac ) { + softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + } else { + uiZ = packToF8_1UI( sign, 0x0F, 0x6 ); + } + goto uiZ; + #else + softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + goto uiZ; + #endif + + #else //IEEE-like + + if ( frac ) { + softfloat_f8_2UIToCommonNaN( uiA, &commonNaN ); + uiZ = softfloat_commonNaNToF8_1UI( &commonNaN ); + } else { + uiZ = packToF8_1UI( sign, 0x0F, 0 ); + } + goto uiZ; + + #endif + } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ @@ -59,7 +65,7 @@ float8_1_t f8_2_to_f8_1( float8_2_t a ) } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - return softfloat_roundPackToF8_1( sign, exp - 0x09, frac8 | 0x40 ); + return softfloat_roundPackToF8_1( sign, exp - 0x09, frac8 | 0x40, (bool) 1 ); uiZ: uZ.ui = uiZ; return uZ.f; diff --git a/softfloat_8/f8_2_to_i16.c b/softfloat_8/f8_2_to_i16.c index 4f9aaa0f0c..c6c84b458e 100644 --- a/softfloat_8/f8_2_to_i16.c +++ b/softfloat_8/f8_2_to_i16.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_i32.c b/softfloat_8/f8_2_to_i32.c index 5092ade971..086c9c3c4c 100644 --- a/softfloat_8/f8_2_to_i32.c +++ b/softfloat_8/f8_2_to_i32.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_i8.c b/softfloat_8/f8_2_to_i8.c index 4854cc7163..1767b0d216 100644 --- a/softfloat_8/f8_2_to_i8.c +++ b/softfloat_8/f8_2_to_i8.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_ui16.c b/softfloat_8/f8_2_to_ui16.c index c233d83a4a..e63a58bdd7 100644 --- a/softfloat_8/f8_2_to_ui16.c +++ b/softfloat_8/f8_2_to_ui16.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/f8_2_to_ui32.c b/softfloat_8/f8_2_to_ui32.c index 940074d7f5..bdc970cec0 100644 --- a/softfloat_8/f8_2_to_ui32.c +++ b/softfloat_8/f8_2_to_ui32.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include diff --git a/softfloat_8/f8_2_to_ui8.c b/softfloat_8/f8_2_to_ui8.c index 2fd7a36fcb..8871c35fe5 100644 --- a/softfloat_8/f8_2_to_ui8.c +++ b/softfloat_8/f8_2_to_ui8.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "specialize.h" diff --git a/softfloat_8/i16_to_f8_1.c b/softfloat_8/i16_to_f8_1.c index 7ae67cb7e1..1318f043ee 100644 --- a/softfloat_8/i16_to_f8_1.c +++ b/softfloat_8/i16_to_f8_1.c @@ -43,7 +43,7 @@ float8_1_t i16_to_f8_1( int16_t a ) ? absA>>(-shiftDist) | ((uint32_t) (absA<<(shiftDist & 15)) != 0) : (uint_fast8_t) absA< #include "platform.h" @@ -43,7 +28,7 @@ float8_2_t i16_to_f8_2( int16_t a ) ? absA>>(-shiftDist) | ((uint32_t) (absA<<(shiftDist & 15)) != 0) : (uint_fast8_t) absA<>(-shiftDist) | ((uint32_t) (absA<<(shiftDist & 31)) != 0) : (uint_fast8_t) absA< #include "platform.h" @@ -43,7 +28,7 @@ float8_2_t i32_to_f8_2( int32_t a ) ? absA>>(-shiftDist) | ((uint32_t) (absA<<(shiftDist & 31)) != 0) : (uint_fast8_t) absA< #include "platform.h" diff --git a/softfloat_8/internals.h b/softfloat_8/internals.h index 84e77c82a0..5e3d7a904d 100644 --- a/softfloat_8/internals.h +++ b/softfloat_8/internals.h @@ -38,13 +38,17 @@ union ui8_f8_2 { uint8_t ui; float8_2_t f; }; // 1-5-2 #define fracF8_1UI( a ) ((a) & 0x07) #define packToF8_1UI( sign, exp, sig ) (((uint8_t) (sign)<<7) + ((uint8_t) (exp)<<3) + (sig)) -#define isNaNF8_1UI( a ) (((~(a) & 0x78) == 0) && ((a) & 0x07)) +#if E4M3_OFP8 == 1 + #define isNaNF8_1UI( a ) (((a) & 0x7F) == 0x7F) // Only NaN is 0x7F +#else + #define isNaNF8_1UI( a ) (((~(a) & 0x78) == 0) && ((a) & 0x07)) +#endif struct exp8_sig8_1 { int_fast8_t exp; uint_fast8_t sig; }; struct exp8_sig8_1 softfloat_normSubnormalF8_1Sig( uint_fast8_t ); -float8_1_t softfloat_roundPackToF8_1( bool, int_fast8_t, uint_fast8_t ); -float8_1_t softfloat_normRoundPackToF8_1( bool, int_fast8_t, uint_fast8_t ); +float8_1_t softfloat_roundPackToF8_1( bool, int_fast8_t, uint_fast8_t, bool ); +float8_1_t softfloat_normRoundPackToF8_1( bool, int_fast8_t, uint_fast8_t, bool ); float8_1_t softfloat_addMagsF8_1( uint_fast8_t, uint_fast8_t ); float8_1_t softfloat_subMagsF8_1( uint_fast8_t, uint_fast8_t ); @@ -64,8 +68,8 @@ float8_1_t struct exp8_sig8_2 { int_fast8_t exp; uint_fast8_t sig; }; struct exp8_sig8_2 softfloat_normSubnormalF8_2Sig( uint_fast8_t ); -float8_2_t softfloat_roundPackToF8_2( bool, int_fast8_t, uint_fast8_t ); -float8_2_t softfloat_normRoundPackToF8_2( bool, int_fast8_t, uint_fast8_t ); +float8_2_t softfloat_roundPackToF8_2( bool, int_fast8_t, uint_fast8_t, bool ); +float8_2_t softfloat_normRoundPackToF8_2( bool, int_fast8_t, uint_fast8_t, bool ); float8_2_t softfloat_addMagsF8_2( uint_fast8_t, uint_fast8_t ); float8_2_t softfloat_subMagsF8_2( uint_fast8_t, uint_fast8_t ); diff --git a/softfloat_8/s_addMagsF8_1.c b/softfloat_8/s_addMagsF8_1.c index d0c35f651b..5a9adba454 100644 --- a/softfloat_8/s_addMagsF8_1.c +++ b/softfloat_8/s_addMagsF8_1.c @@ -55,19 +55,37 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) uiZ = uiA + sigB; goto uiZ; } - if ( expA == 0x0F ) { - if ( sigA | sigB ) goto propagateNaN; - uiZ = uiA; - goto uiZ; - } + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 || sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA | sigB ) goto propagateNaN; + uiZ = uiA; + goto uiZ; + } + #endif + signZ = signF8_1UI( uiA ); expZ = expA; sigZ = 0x10 + sigA + sigB; - if ( ! (sigZ & 1) && (expZ < 0x0E) ) { - sigZ >>= 1; - goto pack; - } + + #if E4M3_OFP8 == 1 + if ( ! (sigZ & 1) && (expZ < 0x0F) ) { //PROVA + sigZ >>= 1; + goto pack; + } + #else + if ( ! (sigZ & 1) && (expZ < 0x0E) ) { + sigZ >>= 1; + goto pack; + } + #endif + sigZ <<= 2; + } else { /*-------------------------------------------------------------------- *--------------------------------------------------------------------*/ @@ -75,11 +93,18 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) if ( expDiff < 0 ) { /*exp B > exp A*/ /*---------------------------------------------------------------- *----------------------------------------------------------------*/ - if ( expB == 0x0F ) { - if ( sigB ) goto propagateNaN; - uiZ = packToF8_1UI( signZ, 0x0F, 0 ); - goto uiZ; - } + #if E4M3_OFP8 == 1 + if ( expB == 0x0F ) { + if ( sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + goto uiZ; + } + #endif + if ( expDiff <= -5 ) { uiZ = packToF8_1UI( signZ, expB, sigB ); if ( expA | sigA ) goto addEpsilon; @@ -93,10 +118,18 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) /*---------------------------------------------------------------- *----------------------------------------------------------------*/ uiZ = uiA; - if ( expA == 0x0F ) { - if ( sigA ) goto propagateNaN; - goto uiZ; - } + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + #endif + if ( 5 <= expDiff ) { if ( expB | sigB ) goto addEpsilon; goto uiZ; @@ -108,7 +141,7 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) } sig16Z = ((uint_fast16_t) sigX<<10) + ((uint_fast16_t) sigY<>= 3; - goto pack; - } + #if E4M3_OFP8 == 1 + //if ( ! (sigZ & 0x7) && (expZ < 0x0F) ) { //PROVA //ERRORE!!!!!! PERCHÈ IL MAX NUMBER NON È 7F MA 7E!!!!! + if ( ! (sigZ & 0xF) && (expZ < 0x0F) ) { //PROVA + sigZ >>= 3; + goto pack; + } + #else + if ( ! (sigZ & 0x7) && (expZ < 0x0E) ) { + sigZ >>= 3; + goto pack; + } + #endif } } - return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_1( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN: @@ -139,10 +180,17 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) : softfloat_round_max) ) { ++uiZ; - if ( (uint8_t) (uiZ<<1) == 0xF0 ) { - softfloat_raiseFlags( - softfloat_flag_overflow | softfloat_flag_inexact ); - } + + #if E4M3_OFP8 == 1 + if ( (uint8_t) (uiZ<<1) == 0xFE ) { //!!! + softfloat_raiseFlags( softfloat_flag_inexact ); + } + #else + if ( (uint8_t) (uiZ<<1) == 0xF0 ) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + } + #endif } #ifdef SOFTFLOAT_ROUND_ODD else if ( roundingMode == softfloat_round_odd ) { @@ -159,5 +207,4 @@ float8_1_t softfloat_addMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB) uiZ: uZ.ui = uiZ; return uZ.f; - } diff --git a/softfloat_8/s_addMagsF8_2.c b/softfloat_8/s_addMagsF8_2.c index cebb4f4dfc..ac6f3d0a18 100644 --- a/softfloat_8/s_addMagsF8_2.c +++ b/softfloat_8/s_addMagsF8_2.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -122,7 +107,7 @@ float8_2_t softfloat_addMagsF8_2( uint_fast8_t uiA, uint_fast8_t uiB) } } } - return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_2( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN: diff --git a/softfloat_8/s_mulAddF8_1.c b/softfloat_8/s_mulAddF8_1.c index ab086c82db..bbe742265c 100644 --- a/softfloat_8/s_mulAddF8_1.c +++ b/softfloat_8/s_mulAddF8_1.c @@ -59,24 +59,40 @@ float8_1_t softfloat_mulAddF8_1( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_ signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( expA == 0x0F ) { //controlla se è un NaN o inf - if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN_ABC; - magBits = expB | sigB; - goto infProdArg; - } - if ( expB == 0x0F ) { - if ( sigB ) goto propagateNaN_ABC; - magBits = expA | sigA; - goto infProdArg; - } - if ( expC == 0x0F ) { - if ( sigC ) { - uiZ = 0; - goto propagateNaN_ZC; + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( (sigA == 0x07) || ((expB == 0x0F) && (sigB == 0x07)) ) goto propagateNaN_ABC; } - uiZ = uiC; - goto uiZ; - } + if ( expB == 0x0F ) { + if (sigB == 0x07) goto propagateNaN_ABC; + } + if ( expC == 0x0F ) { + if ( sigC == 0x07 ) { + uiZ = 0; + goto propagateNaN_ZC; + } + } + #else + if ( expA == 0x0F ) { + if ( sigA || ((expB == 0x0F) && sigB) ) goto propagateNaN_ABC; + magBits = expB | sigB; + goto infProdArg; + } + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN_ABC; + magBits = expA | sigA; + goto infProdArg; + } + if ( expC == 0x0F ) { + if ( sigC ) { + uiZ = 0; + goto propagateNaN_ZC; + } + uiZ = uiC; + goto uiZ; + } + #endif /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ if ( ! expA ) { @@ -166,7 +182,7 @@ float8_1_t softfloat_mulAddF8_1( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_ } } roundPack: - return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_1( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN_ABC: @@ -174,7 +190,10 @@ float8_1_t softfloat_mulAddF8_1( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_ goto propagateNaN_ZC; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - infProdArg: +#if E4M3_OFP8 == 1 + +#else +infProdArg: if ( magBits ) { uiZ = packToF8_1UI( signProd, 0x0F, 0 ); if ( expC != 0x0F ) goto uiZ; @@ -183,6 +202,8 @@ float8_1_t softfloat_mulAddF8_1( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_ } softfloat_raiseFlags( softfloat_flag_invalid ); uiZ = defaultNaNF8_1UI; +#endif + propagateNaN_ZC: uiZ = softfloat_propagateNaNF8_1UI( uiZ, uiC ); goto uiZ; diff --git a/softfloat_8/s_mulAddF8_2.c b/softfloat_8/s_mulAddF8_2.c index d3484a4244..dc799a6106 100644 --- a/softfloat_8/s_mulAddF8_2.c +++ b/softfloat_8/s_mulAddF8_2.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -166,7 +151,7 @@ float8_2_t softfloat_mulAddF8_2( uint_fast8_t uiA, uint_fast8_t uiB, uint_fast8_ } } roundPack: - return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_2( signZ, expZ, sigZ, (bool) 0 ); /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ propagateNaN_ABC: diff --git a/softfloat_8/s_normRoundPackToF8_1.c b/softfloat_8/s_normRoundPackToF8_1.c index 3c3e60068a..019afb928e 100644 --- a/softfloat_8/s_normRoundPackToF8_1.c +++ b/softfloat_8/s_normRoundPackToF8_1.c @@ -19,18 +19,29 @@ limitations under the License. #include "platform.h" #include "internals.h" -float8_1_t softfloat_normRoundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig ) +float8_1_t softfloat_normRoundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig, bool conv ) //never used { int_fast8_t shiftDist; union ui8_f8_1 uZ; shiftDist = softfloat_countLeadingZeros8[sig] - 1; exp -= shiftDist; - if ( (3 <= shiftDist) && ((unsigned int) exp < 0x0D) ) { - uZ.ui = packToF8_1UI( sign, sig ? exp : 0, sig<<(shiftDist - 3) ); - return uZ.f; - } else { - return softfloat_roundPackToF8_1( sign, exp, sig< #include #include "platform.h" #include "internals.h" -float8_2_t softfloat_normRoundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig ) +float8_2_t softfloat_normRoundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig, bool conv ) { int_fast8_t shiftDist; union ui8_f8_2 uZ; @@ -30,7 +15,7 @@ float8_2_t softfloat_normRoundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8 uZ.ui = packToF8_2UI( sign, sig ? exp : 0, sig<<(shiftDist - 4) ); return uZ.f; } else { - return softfloat_roundPackToF8_2( sign, exp, sig< #include "platform.h" diff --git a/softfloat_8/s_propagateNaNF8_2UI.c b/softfloat_8/s_propagateNaNF8_2UI.c index 9a59434228..7b0a1ec3d6 100644 --- a/softfloat_8/s_propagateNaNF8_2UI.c +++ b/softfloat_8/s_propagateNaNF8_2UI.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include "platform.h" diff --git a/softfloat_8/s_roundPackToF8_1.c b/softfloat_8/s_roundPackToF8_1.c index fe50c58624..8c2695ae41 100644 --- a/softfloat_8/s_roundPackToF8_1.c +++ b/softfloat_8/s_roundPackToF8_1.c @@ -20,7 +20,7 @@ limitations under the License. #include "internals.h" #include "softfloat.h" -float8_1_t softfloat_roundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig ) +float8_1_t softfloat_roundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t sig, bool conv ) { uint_fast8_t roundingMode; bool roundNearEven; @@ -43,32 +43,99 @@ float8_1_t softfloat_roundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t s roundBits = sig & 0x7; /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - if ( 0x0D <= (unsigned int) exp ) { - if ( exp < 0 ) { - /*---------------------------------------------------------------- - *----------------------------------------------------------------*/ - isTiny = - (softfloat_detectTininess == softfloat_tininess_beforeRounding) - || (exp < -1) || (sig + roundIncrement < 0x80); - sig = softfloat_shiftRightJam32( sig, -exp ); - exp = 0; - roundBits = sig & 0x7; - if ( isTiny && roundBits ) { - softfloat_raiseFlags( softfloat_flag_underflow ); + + #if E4M3_OFP8 == 1 + if ( 0x0E <= (unsigned int) exp ) { //PROVA + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x80); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0x7; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + //} else if ( (0x0E < exp) || (0x80 <= sig + roundIncrement) ) { //Overflow //PROVA + } else if ( (0x0E < exp) || (0x79 <= sig + roundIncrement) ) { //Overflow //PROVA //da calcoli dovrebbe essere 73, ma forse 79 funziona? + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + #if OFP8_saturate == 1 // Saturate on + #if OFP8_saturate_op == 1 // Saturate also the operation results, not only the conversions + #if OFP8_overflow_flag == 1 // The overflow flag is triggered + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x06 ) - ! roundIncrement; //PROVA //Round Increment is not 0 in Round Near Even + goto uiZ; + #else // The overflow flag is not triggered + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x06 ) - ! roundIncrement; //PROVA + goto uiZ; + #endif + #else // Saturate only the conversions + #if OFP8_overflow_flag == 1 // The overflow flag is triggered + if (conv == 1) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x06 ) - ! roundIncrement; //PROVA //Round Increment is not 0 in Round Near Even + goto uiZ; + } else { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x07 ) - ! roundIncrement; //PROVA + goto uiZ; + } + #else // The overflow flag is not triggered + if (conv == 1) { + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x06 ) - ! roundIncrement; //PROVA //Round Increment is not 0 in Round Near Even + goto uiZ; + } else { + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x07 ) - ! roundIncrement; //PROVA + goto uiZ; + } + #endif + #endif + #else // Saturate off + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0x07 ) - ! roundIncrement; //PROVA + goto uiZ; + #endif } - } else if ( (0x0D < exp) || (0x80 <= sig + roundIncrement) ) { - /*---------------------------------------------------------------- - *----------------------------------------------------------------*/ - softfloat_raiseFlags( - softfloat_flag_overflow | softfloat_flag_inexact ); - uiZ = packToF8_1UI( sign, 0x0F, 0 ) - ! roundIncrement; - goto uiZ; } - } - -/*------------------------------------------------------------------------ + #else + if ( 0x0D <= (unsigned int) exp ) { + if ( exp < 0 ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + isTiny = + (softfloat_detectTininess == softfloat_tininess_beforeRounding) + || (exp < -1) || (sig + roundIncrement < 0x80); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0x7; + if ( isTiny && roundBits ) { + softfloat_raiseFlags( softfloat_flag_underflow ); + } + } else if ( (0x0D < exp) || (0x80 <= sig + roundIncrement) ) { + /*---------------------------------------------------------------- + *----------------------------------------------------------------*/ + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_1UI( sign, 0x0F, 0 ) - ! roundIncrement; + goto uiZ; + } + } + #endif + /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ - sig = (sig + roundIncrement)>>3; if ( roundBits ) { softfloat_exceptionFlags |= softfloat_flag_inexact; diff --git a/softfloat_8/s_roundPackToF8_2.c b/softfloat_8/s_roundPackToF8_2.c index 17c9ab7f5c..343875ebe4 100644 --- a/softfloat_8/s_roundPackToF8_2.c +++ b/softfloat_8/s_roundPackToF8_2.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -20,7 +5,7 @@ limitations under the License. #include "internals.h" #include "softfloat.h" -float8_2_t softfloat_roundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig ) +float8_2_t softfloat_roundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t sig, bool conv ) { uint_fast8_t roundingMode; bool roundNearEven; @@ -59,10 +44,52 @@ float8_2_t softfloat_roundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t s } else if ( (0x1D < exp) || (0x80 <= sig + roundIncrement) ) { /*---------------------------------------------------------------- *----------------------------------------------------------------*/ - softfloat_raiseFlags( - softfloat_flag_overflow | softfloat_flag_inexact ); - uiZ = packToF8_2UI( sign, 0x1F, 0 ) - ! roundIncrement; - goto uiZ; + #if OFP8_saturate == 1 // Saturate on + #if OFP8_saturate_op == 1 // Saturate also the operation results, not only the conversions + #if OFP8_overflow_flag == 1 // The overflow flag is triggered + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1E, 0x3 ) - ! roundIncrement; + goto uiZ; + #else // The overflow flag is not triggered + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1E, 0x3 ) - ! roundIncrement; + goto uiZ; + #endif + #else // Saturate only the conversions + #if OFP8_overflow_flag == 1 // The overflow flag is triggered + if (conv == 1) { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1E, 0x3 ) - ! roundIncrement; + goto uiZ; + } else { + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1F, 0 ) - ! roundIncrement; + goto uiZ; + } + #else // The overflow flag is not triggered + if (conv == 1) { + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1E, 0x3 ) - ! roundIncrement; + goto uiZ; + } else { + softfloat_raiseFlags( + softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1F, 0 ) - ! roundIncrement; + goto uiZ; + } + #endif + #endif + #else // Saturate off + softfloat_raiseFlags( + softfloat_flag_overflow | softfloat_flag_inexact ); + uiZ = packToF8_2UI( sign, 0x1F, 0 ) - ! roundIncrement; + goto uiZ; + #endif } } diff --git a/softfloat_8/s_subMagsF8_1.c b/softfloat_8/s_subMagsF8_1.c index d0980f3de1..9df24bc80b 100644 --- a/softfloat_8/s_subMagsF8_1.c +++ b/softfloat_8/s_subMagsF8_1.c @@ -49,12 +49,19 @@ float8_1_t softfloat_subMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB ) if ( ! expDiff ) { /*-------------------------------------------------------------------- *--------------------------------------------------------------------*/ - if ( expA == 0x0F ) { - if ( sigA | sigB ) goto propagateNaN; - softfloat_raiseFlags( softfloat_flag_invalid ); - uiZ = defaultNaNF8_1UI; - goto uiZ; - } + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 || sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA | sigB ) goto propagateNaN; + softfloat_raiseFlags( softfloat_flag_invalid ); + uiZ = defaultNaNF8_1UI; + goto uiZ; + } + #endif + sigDiff = sigA - sigB; if ( ! sigDiff ) { uiZ = @@ -84,11 +91,19 @@ float8_1_t softfloat_subMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB ) /*---------------------------------------------------------------- *----------------------------------------------------------------*/ signZ = ! signZ; - if ( expB == 0x0F ) { - if ( sigB ) goto propagateNaN; - uiZ = packToF8_1UI( signZ, 0x0F, 0 ); - goto uiZ; - } + + #if E4M3_OFP8 == 1 + if ( expB == 0x0F ) { + if ( sigB == 0x07 ) goto propagateNaN; + } + #else + if ( expB == 0x0F ) { + if ( sigB ) goto propagateNaN; + uiZ = packToF8_1UI( signZ, 0x0F, 0 ); + goto uiZ; + } + #endif + if ( expDiff <= -6 ) { uiZ = packToF8_1UI( signZ, expB, sigB ); if ( expA | sigA ) goto subEpsilon; @@ -102,10 +117,18 @@ float8_1_t softfloat_subMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB ) /*---------------------------------------------------------------- *----------------------------------------------------------------*/ uiZ = uiA; - if ( expA == 0x0F ) { - if ( sigA ) goto propagateNaN; - goto uiZ; - } + + #if E4M3_OFP8 == 1 + if ( expA == 0x0F ) { + if ( sigA == 0x07 ) goto propagateNaN; + } + #else + if ( expA == 0x0F ) { + if ( sigA ) goto propagateNaN; + goto uiZ; + } + #endif + if ( 6 <= expDiff ) { if ( expB | sigB ) goto subEpsilon; goto uiZ; @@ -122,12 +145,21 @@ float8_1_t softfloat_subMagsF8_1( uint_fast8_t uiA, uint_fast8_t uiB ) if ( sig16Z & 0xFF ) { sigZ |= 1; } else { - if ( ! (sigZ & 0x7) && ((unsigned int) expZ < 0x0E) ) { - sigZ >>= 3; - goto pack; - } + + #if E4M3_OFP8 == 1 + //if ( ! (sigZ & 0x7) && ((unsigned int) expZ < 0x0F) ) { //PROVA + if ( ! (sigZ & 0xF) && ((unsigned int) expZ < 0x0F) ) { //PROVA + sigZ >>= 3; + goto pack; + } + #else + if ( ! (sigZ & 0x7) && ((unsigned int) expZ < 0x0E) ) { + sigZ >>= 3; + goto pack; + } + #endif } - return softfloat_roundPackToF8_1( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_1( signZ, expZ, sigZ, (bool) 0 ); } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ diff --git a/softfloat_8/s_subMagsF8_2.c b/softfloat_8/s_subMagsF8_2.c index 60451cd3de..4ad3bda2cf 100644 --- a/softfloat_8/s_subMagsF8_2.c +++ b/softfloat_8/s_subMagsF8_2.c @@ -1,18 +1,3 @@ -/*============================================================================ -Copyright 2023 Sapienza University of Rome - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. -=============================================================================*/ #include #include @@ -127,7 +112,7 @@ float8_2_t softfloat_subMagsF8_2( uint_fast8_t uiA, uint_fast8_t uiB ) goto pack; } } - return softfloat_roundPackToF8_2( signZ, expZ, sigZ ); + return softfloat_roundPackToF8_2( signZ, expZ, sigZ, (bool) 0 ); } /*------------------------------------------------------------------------ *------------------------------------------------------------------------*/ diff --git a/softfloat_8/softfloat_types.h b/softfloat_8/softfloat_types.h index c0e4c71b8f..dc4118923d 100644 --- a/softfloat_8/softfloat_types.h +++ b/softfloat_8/softfloat_types.h @@ -19,6 +19,13 @@ limitations under the License. #include +#define E4M3_OFP8 1 //When set to 1, the FP8 will be the OFP/Nvidia one. When set to 0, it will be the ieee-like one. +#define E4M3_isSigNaN 0 //When set to 1, the FP8 OFP8 only NaN will be Signaling. When set to 0, it will be Quiet. +#define OFP8_saturate 0 //When set to 1, the FP8 OFP8 will saturate on conversions. When set to 0, it will overflow to NaN. +#define OFP8_saturate_op 0 //When set to 1, the FP8 OFP8 will saturate on operation also. When set to 0, it will overflow to NaN. + //It only work if also OFP8_saturate is set to 1, as saturation for conversion is needed by the standard. +#define OFP8_overflow_flag 0 //When set to 1, the OFP8 set the overflow flag when saturating. When set to 0, it will not. + typedef struct { uint8_t v; } float8_1_t; // 1-4-3 typedef struct { uint8_t v; } float8_2_t; // 1-5-2 diff --git a/softfloat_8/specialize.h b/softfloat_8/specialize.h index 49f00ae2f3..f5b3cf1389 100644 --- a/softfloat_8/specialize.h +++ b/softfloat_8/specialize.h @@ -22,6 +22,7 @@ limitations under the License. #include "softfloat/specialize.h" #include "primitiveTypes.h" #include "softfloat.h" +#include "softfloat_types.h" #ifdef __cplusplus extern "C" { @@ -46,7 +47,11 @@ extern "C" { /*---------------------------------------------------------------------------- | The bit pattern for a default generated 8-bit floating-point NaN. *----------------------------------------------------------------------------*/ -#define defaultNaNF8_1UI 0x7C +#if E4M3_OFP8 == 1 + #define defaultNaNF8_1UI 0x7F +#else + #define defaultNaNF8_1UI 0x7C +#endif #define defaultNaNF8_2UI 0x7E #define defaultNaNBF16UI 0x7FC0 @@ -55,7 +60,15 @@ extern "C" { | 8-bit floating-point signaling NaN. | Note: This macro evaluates its argument more than once. *----------------------------------------------------------------------------*/ -#define softfloat_isSigNaNF8_1UI( uiA ) ((((uiA) & 0x7C) == 0x78) && ((uiA) & 0x03)) +#if E4M3_OFP8 == 1 + #if E4M3_isSigNaN == 1 + #define softfloat_isSigNaNF8_1UI( uiA ) (((uiA) & 0x7F) == 0x7F) // Only NaN is 0x7F and signaling + #else + #define softfloat_isSigNaNF8_1UI( uiA ) 0 // Only NaN is quiet + #endif +#else + #define softfloat_isSigNaNF8_1UI( uiA ) ((((uiA) & 0x7C) == 0x78) && ((uiA) & 0x03)) +#endif #define softfloat_isSigNaNF8_2UI( uiA ) ((((uiA) & 0x7E) == 0x7C) && ((uiA) & 0x01)) /*---------------------------------------------------------------------------- @@ -64,7 +77,16 @@ extern "C" { | location pointed to by `zPtr'. If the NaN is a signaling NaN, the invalid | exception is raised. *----------------------------------------------------------------------------*/ -#define softfloat_f8_1UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x04) ) softfloat_raiseFlags( softfloat_flag_invalid ) +#if E4M3_OFP8 == 1 + #if E4M3_isSigNaN == 1 + #define softfloat_f8_1UIToCommonNaN( uiA, zPtr ) softfloat_raiseFlags( softfloat_flag_invalid ) // Only NaN is 0x7F and signaling + #else + #define softfloat_f8_1UIToCommonNaN( uiA, zPtr ) // Only NaN is quiet + #endif +#else + #define softfloat_f8_1UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x04) ) softfloat_raiseFlags( softfloat_flag_invalid ) +#endif + #define softfloat_f8_2UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x02) ) softfloat_raiseFlags( softfloat_flag_invalid ) //#define softfloat_bf16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x40) ) softfloat_raiseFlags( softfloat_flag_invalid ) diff --git a/softfloat_8/ui16_to_f8_1.c b/softfloat_8/ui16_to_f8_1.c index 0f96e6fadf..de62a36236 100644 --- a/softfloat_8/ui16_to_f8_1.c +++ b/softfloat_8/ui16_to_f8_1.c @@ -38,7 +38,7 @@ float8_1_t ui16_to_f8_1( uint16_t a ) (shiftDist < 0) ? a>>(-shiftDist) | ((uint16_t) (a<<(shiftDist & 15)) != 0) : (uint_fast8_t) a< #include "platform.h" @@ -38,7 +23,7 @@ float8_2_t ui16_to_f8_2( uint16_t a ) (shiftDist < 0) ? a>>(-shiftDist) | ((uint16_t) (a<<(shiftDist & 15)) != 0) : (uint_fast8_t) a<>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0) : (uint_fast8_t) a< #include "platform.h" @@ -38,7 +23,7 @@ float8_2_t ui32_to_f8_2( uint32_t a ) (shiftDist < 0) ? a>>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0) : (uint_fast8_t) a< #include "platform.h" From fa701b55ed873ac6196db823f00ad6d3a0bf7de8 Mon Sep 17 00:00:00 2001 From: aesash Date: Fri, 11 Jul 2025 12:14:33 +0200 Subject: [PATCH 20/31] changed macro name --- softfloat_8/s_roundPackToF8_1.c | 2 +- softfloat_8/s_roundPackToF8_2.c | 2 +- softfloat_8/softfloat_types.h | 10 +++++----- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/softfloat_8/s_roundPackToF8_1.c b/softfloat_8/s_roundPackToF8_1.c index 8c2695ae41..a59a959eb3 100644 --- a/softfloat_8/s_roundPackToF8_1.c +++ b/softfloat_8/s_roundPackToF8_1.c @@ -63,7 +63,7 @@ float8_1_t softfloat_roundPackToF8_1( bool sign, int_fast8_t exp, uint_fast8_t s /*---------------------------------------------------------------- *----------------------------------------------------------------*/ #if OFP8_saturate == 1 // Saturate on - #if OFP8_saturate_op == 1 // Saturate also the operation results, not only the conversions + #if OFP8_saturate_arith == 1 // Saturate also the operation results, not only the conversions #if OFP8_overflow_flag == 1 // The overflow flag is triggered softfloat_raiseFlags( softfloat_flag_overflow | softfloat_flag_inexact ); diff --git a/softfloat_8/s_roundPackToF8_2.c b/softfloat_8/s_roundPackToF8_2.c index 343875ebe4..4c128e2203 100644 --- a/softfloat_8/s_roundPackToF8_2.c +++ b/softfloat_8/s_roundPackToF8_2.c @@ -45,7 +45,7 @@ float8_2_t softfloat_roundPackToF8_2( bool sign, int_fast8_t exp, uint_fast8_t s /*---------------------------------------------------------------- *----------------------------------------------------------------*/ #if OFP8_saturate == 1 // Saturate on - #if OFP8_saturate_op == 1 // Saturate also the operation results, not only the conversions + #if OFP8_saturate_arith == 1 // Saturate also the operation results, not only the conversions #if OFP8_overflow_flag == 1 // The overflow flag is triggered softfloat_raiseFlags( softfloat_flag_overflow | softfloat_flag_inexact ); diff --git a/softfloat_8/softfloat_types.h b/softfloat_8/softfloat_types.h index dc4118923d..08c8400299 100644 --- a/softfloat_8/softfloat_types.h +++ b/softfloat_8/softfloat_types.h @@ -19,12 +19,12 @@ limitations under the License. #include -#define E4M3_OFP8 1 //When set to 1, the FP8 will be the OFP/Nvidia one. When set to 0, it will be the ieee-like one. -#define E4M3_isSigNaN 0 //When set to 1, the FP8 OFP8 only NaN will be Signaling. When set to 0, it will be Quiet. -#define OFP8_saturate 0 //When set to 1, the FP8 OFP8 will saturate on conversions. When set to 0, it will overflow to NaN. -#define OFP8_saturate_op 0 //When set to 1, the FP8 OFP8 will saturate on operation also. When set to 0, it will overflow to NaN. +#define E4M3_OFP8 1 //When set to 1, the FP8 will be the OFP/Nvidia one. When set to 0, it will be the ieee-like one. +#define E4M3_isSigNaN 0 //When set to 1, the FP8 OFP8 only NaN will be Signaling. When set to 0, it will be Quiet. +#define OFP8_saturate 0 //When set to 1, the FP8 OFP8 will saturate on conversions. When set to 0, it will overflow to NaN. +#define OFP8_saturate_arith 0 //When set to 1, the FP8 OFP8 will saturate on operation also. When set to 0, it will overflow to NaN. //It only work if also OFP8_saturate is set to 1, as saturation for conversion is needed by the standard. -#define OFP8_overflow_flag 0 //When set to 1, the OFP8 set the overflow flag when saturating. When set to 0, it will not. +#define OFP8_overflow_flag 1 //When set to 1, the OFP8 set the overflow flag when saturating. When set to 0, it will not. typedef struct { uint8_t v; } float8_1_t; // 1-4-3 typedef struct { uint8_t v; } float8_2_t; // 1-5-2 From 4c27d5c08b6281a61e68e2851699a05e2349f213 Mon Sep 17 00:00:00 2001 From: aesash Date: Fri, 18 Jul 2025 18:19:17 +0200 Subject: [PATCH 21/31] --- riscv/csrs.cc | 2 +- softfloat_8/softfloat_types.h | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 6ded33ce5d..e42ea5aba7 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1605,7 +1605,7 @@ bool vxsat_csr_t::unlogged_write(const reg_t val) noexcept { } vfp8_csr_t::vfp8_csr_t(processor_t* const proc, const reg_t addr, vectorUnit_t* vu) - : vector_csr_t(proc, addr, /*mask*/ 1, /*init*/ 0), vu(vu) {} + : vector_csr_t(proc, addr, /*mask*/ 7, /*init*/ 0), vu(vu) {} reg_t vfp8_csr_t::read() const noexcept { return vu->altfp; diff --git a/softfloat_8/softfloat_types.h b/softfloat_8/softfloat_types.h index 08c8400299..dc4118923d 100644 --- a/softfloat_8/softfloat_types.h +++ b/softfloat_8/softfloat_types.h @@ -19,12 +19,12 @@ limitations under the License. #include -#define E4M3_OFP8 1 //When set to 1, the FP8 will be the OFP/Nvidia one. When set to 0, it will be the ieee-like one. -#define E4M3_isSigNaN 0 //When set to 1, the FP8 OFP8 only NaN will be Signaling. When set to 0, it will be Quiet. -#define OFP8_saturate 0 //When set to 1, the FP8 OFP8 will saturate on conversions. When set to 0, it will overflow to NaN. -#define OFP8_saturate_arith 0 //When set to 1, the FP8 OFP8 will saturate on operation also. When set to 0, it will overflow to NaN. +#define E4M3_OFP8 1 //When set to 1, the FP8 will be the OFP/Nvidia one. When set to 0, it will be the ieee-like one. +#define E4M3_isSigNaN 0 //When set to 1, the FP8 OFP8 only NaN will be Signaling. When set to 0, it will be Quiet. +#define OFP8_saturate 0 //When set to 1, the FP8 OFP8 will saturate on conversions. When set to 0, it will overflow to NaN. +#define OFP8_saturate_op 0 //When set to 1, the FP8 OFP8 will saturate on operation also. When set to 0, it will overflow to NaN. //It only work if also OFP8_saturate is set to 1, as saturation for conversion is needed by the standard. -#define OFP8_overflow_flag 1 //When set to 1, the OFP8 set the overflow flag when saturating. When set to 0, it will not. +#define OFP8_overflow_flag 0 //When set to 1, the OFP8 set the overflow flag when saturating. When set to 0, it will not. typedef struct { uint8_t v; } float8_1_t; // 1-4-3 typedef struct { uint8_t v; } float8_2_t; // 1-5-2 From 784704e723443b9a52436768afa3122447f7b1d9 Mon Sep 17 00:00:00 2001 From: aesash Date: Mon, 21 Jul 2025 16:32:37 +0200 Subject: [PATCH 22/31] made modifications to the make in order to make it compile the .so without bost, and thus avoiding UVM errors when using DPI --- Makefile.in | 10 ++++++---- spike_main/spike_main.mk.in | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/Makefile.in b/Makefile.in index 66d087b0c8..bad006ed4b 100644 --- a/Makefile.in +++ b/Makefile.in @@ -123,7 +123,8 @@ all-link-flags := $(mcppbs-LDFLAGS) $(LDFLAGS) comma := , LD := $(CXX) -LIBS := @LIBS@ @BOOST_ASIO_LIB@ @BOOST_REGEX_LIB@ +BOOST_LIBS := @BOOST_ASIO_LIB@ @BOOST_REGEX_LIB@ +LIBS := $(filter-out -lboost_system -lboost_regex,@LIBS@) -static-libgcc -static-libstdc++ LINK := $(LD) -L. $(all-link-flags) -Wl,-rpath,$(install_libs_dir) $(patsubst -L%,-Wl$(comma)-rpath$(comma)%,$(filter -L%,$(LDFLAGS))) # Library creation @@ -264,7 +265,7 @@ $$($(2)_test_objs) : %.o : %.cc $(COMPILE) -c $$< $$($(2)_test_exes) : %-utst : %.t.o $$($(2)_test_libnames) - $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_test_libnames) $(LIBS) + $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_test_libnames) $(LIBS) $$($(2)_extra_libs) $(2)_deps += $$($(2)_test_deps) $(2)_junk += \ @@ -287,12 +288,13 @@ $(2)_prog_exes := $$(patsubst %.cc, %, $$($(2)_prog_srcs)) $(2)_prog_libs := $(1) $$($(2)_reverse_deps) $(2)_prog_libnames := $$(patsubst %, lib%.a, $$($(2)_prog_libs)) $(2)_prog_libarg := $$(patsubst %, -l%, $$($(2)_prog_libs)) +$(2)_extra_libs ?= $$($(2)_prog_objs) : %.o : %.cc $(COMPILE) -c $$< $$($(2)_prog_exes) : % : %.o $$($(2)_prog_libnames) - $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_prog_libnames) $(LIBS) + $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_prog_libnames) $(LIBS) $$($(2)_extra_libs) $(2)_deps += $$($(2)_prog_deps) $(2)_junk += $$($(2)_prog_objs) $$($(2)_prog_deps) $$($(2)_prog_exes) @@ -307,7 +309,7 @@ $$($(2)_install_prog_objs) : %.o : %.cc $$($(2)_gen_hdrs) $(COMPILE) -c $$< $$($(2)_install_prog_exes) : % : %.o $$($(2)_prog_libnames) - $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_prog_libnames) $(LIBS) + $(LINK) $$($(2)_LDFLAGS) -o $$@ $$< $$($(2)_prog_libnames) $(LIBS) $$($(2)_extra_libs) $(2)_deps += $$($(2)_install_prog_deps) $(2)_junk += \ diff --git a/spike_main/spike_main.mk.in b/spike_main/spike_main.mk.in index 981b960e75..2b3f887158 100644 --- a/spike_main/spike_main.mk.in +++ b/spike_main/spike_main.mk.in @@ -22,3 +22,4 @@ spike_main_CFLAGS = -fPIC -I/usr/share/verilator/include -I/usr/share/verilator/ # This hack adds all symbols from extension.o to spike's dynamic symbol # table, which is required for dynamically loaded --extension libraries spike_main_LDFLAGS = extension.o +spike_main_extra_libs = $(BOOST_LIBS) \ No newline at end of file From 0bd1c6289fa06824882e160eb60d884f9c2aa7a9 Mon Sep 17 00:00:00 2001 From: aesash Date: Mon, 21 Jul 2025 16:34:02 +0200 Subject: [PATCH 23/31] updated spike_dpi.cc with new abilities and fixing bugs --- spike_main/spike_dpi.cc | 261 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 248 insertions(+), 13 deletions(-) diff --git a/spike_main/spike_dpi.cc b/spike_main/spike_dpi.cc index c2465629f8..82b70c678e 100644 --- a/spike_main/spike_dpi.cc +++ b/spike_main/spike_dpi.cc @@ -8,6 +8,9 @@ #include #include #include +#include +#include "decode_macros.h" +#include "disasm.h" /* Temporarily turn all private members of Spike classes into public so we * can call sim_t::step() (kept private upstream). */ @@ -23,22 +26,42 @@ #include "debug_module.h" /* debug_module_config_t */ #include "encoding.h" /* CSR_MIP constant */ +/* User-selected ISA string (from --isa option) */ +static std::string g_isa_override; +static std::unique_ptr g_cfg; + +/* Simple memory allocator copied from spike_main */ +static std::vector> +make_mems(const std::vector& layout) +{ + std::vector> mems; + mems.reserve(layout.size()); + for (const auto& cfg : layout) + mems.emplace_back(cfg.get_base(), new mem_t(cfg.get_size())); + return mems; +} + /* --------------------------------------------------------------------- */ /* Helper: build sim_t */ /* --------------------------------------------------------------------- */ static std::unique_ptr -build_sim(const std::vector& argv) +build_sim(const std::vector& argv, + std::vector> mems) { - static auto cfg = std::make_unique(); // default-initialised + if (!g_cfg) + g_cfg = std::make_unique(); + + if (!g_isa_override.empty()) + g_cfg->isa = g_isa_override.c_str(); return std::make_unique( // Call the sim_t constructor - cfg.get(), // halted_at_reset = false + g_cfg.get(), // halted_at_reset = false false, - std::vector>{}, // no extra mem + std::move(mems), // main memory std::vector{}, // no extra IO argv, // command-line arguments debug_module_config_t{}, nullptr, // default DM - false, nullptr, // no DTB + true, nullptr, // no DTB false, nullptr, // no socket server std::nullopt); // unlimited trace } @@ -51,19 +74,123 @@ class SpikeDpiWrapper { SpikeDpiWrapper(int argc, const char* const* argv) { std::vector av(argv, argv + argc); - sim = build_sim(av); + if (!g_cfg) + g_cfg = std::make_unique(); + mems = make_mems(g_cfg->mem_layout); + sim = build_sim(av, mems); if (!sim) throw std::runtime_error("Spike initialisation failed"); } + ~SpikeDpiWrapper() + { + for (auto& m : mems) + delete m.second; + } + /* One-instruction stepping (sim_t::step() is normally private). */ - void step(uint64_t n = 1) { sim->step(n); } + void step(uint64_t n = 1) + { + if (!started) { + sim->start(); + started = true; + } + + bool prev_debug = sim->debug; + sim->set_debug(true); + //sim->set_procs_debug(true); + sim->step(n); + sim->set_debug(prev_debug); + //sim->set_procs_debug(prev_debug); + } /* Run until HTIF exit. */ void run() { sim->run(); } int exit_code() const { return sim->exit_code(); } /* read current PC of core 0 */ - uint64_t pc() const { return sim->get_core(0)->get_state()->pc; } + + /* read PC of an arbitrary hart */ + uint64_t pc(unsigned hart) const + { + if (hart >= sim->get_cfg().nprocs()) + return 0; + return sim->get_core(hart)->get_state()->pc; + } + + /* Dump integer registers of a hart */ + void dump_regs(unsigned hart) const + { + if (hart >= sim->get_cfg().nprocs()) + return; + auto* core = sim->get_core(hart); + int max_xlen = core->get_isa().get_max_xlen(); + std::ostringstream oss; + oss << "HART " << hart << " RegisterFile:" << std::hex << std::setfill('0'); + for (int r = 0; r < NXPR; ++r) { + if (r % 4 == 0) oss << "\n"; + oss << std::setw(4) << xpr_name[r] << ": 0x" + << std::setw(max_xlen/4) << zext(core->get_state()->XPR[r], max_xlen) + << ' '; + } + std::cout << oss.str() << std::dec << std::endl; + } + + /* Dump CSR registers of a hart */ + void dump_csrs(unsigned hart) const + { + if (hart >= sim->get_cfg().nprocs()) + return; + auto* core = sim->get_core(hart); + std::ostringstream oss; + oss << "HART " << hart << " CSRs:"; + for (const auto& it : core->get_state()->csrmap) { + oss << "\n" << csr_name(it.first) << "(0x" << std::hex << it.first + << ") : 0x" << it.second->read(); + } + std::cout << oss.str() << std::dec << std::endl; + } + + /* Return XPR register value */ + uint64_t get_reg(unsigned hart, unsigned reg) const + { + if (hart >= sim->get_cfg().nprocs() || reg >= NXPR) + return 0; + return sim->get_core(hart)->get_state()->XPR[reg]; + } + + /* Return floating-point register as 64-bit value (low bits) */ + uint64_t get_freg(unsigned hart, unsigned reg) const + { + if (hart >= sim->get_cfg().nprocs() || reg >= NFPR) + return 0; + return sim->get_core(hart)->get_state()->FPR[reg].v[0]; + } + + /* Copy vector register contents into buffer */ + void get_vreg(unsigned hart, unsigned reg, void* dest) const + { + if (hart >= sim->get_cfg().nprocs() || reg >= NVPR) + return; + auto* core = sim->get_core(hart); + size_t len = core->VU.vlenb; + std::memcpy(dest, + (uint8_t*)core->VU.reg_file + reg * len, + len); + } + + /* Lookup CSR by name and return value */ + uint64_t get_csr(unsigned hart, const char* name) const + { + if (hart >= sim->get_cfg().nprocs()) + return 0; + auto* core = sim->get_core(hart); + for (int i = 0; i < NCSR; ++i) { + const char* n = csr_name(i); + if (n && std::strcmp(n, name) == 0) + return core->get_csr(i); + } + return 0; + } /* ---------------- Memory helpers ---------------- */ int load_u64(uint64_t* dst, uint64_t addr) @@ -100,6 +227,8 @@ class SpikeDpiWrapper { private: std::unique_ptr sim; + std::vector> mems; + bool started = false; }; /* Single global instance */ @@ -114,13 +243,31 @@ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) std::vector toks; std::string cur; for (const char* p = argv_flat; *p; ++p) { - if (*p == ' ') { if (!cur.empty()) { toks.push_back(cur); cur.clear(); } } - else cur.push_back(*p); + if (*p == ' ') { + if (!cur.empty()) { + toks.push_back(cur); + cur.clear(); + } + } else { + cur.push_back(*p); + } + } + if (!cur.empty()) + toks.push_back(cur); + + std::vector args; + /* Build argv for Spike. argv[0] should always be program name so + * that htif option parsing works. Strip --isa here and remember it. */ + for (const auto& t : toks) { + if (t.rfind("--isa=", 0) == 0) + g_isa_override = t.substr(6); + else + args.push_back(t); } - if (!cur.empty()) toks.push_back(cur); std::vector c_argv; - for (auto& s : toks) c_argv.push_back(s.c_str()); + for (auto& s : args) + c_argv.push_back(s.c_str()); g_spike = std::make_unique(c_argv.size(), c_argv.data()); } @@ -129,7 +276,47 @@ extern "C" void start_execution() { g_spike->run(); extern "C" void do_step(unsigned long long n) { g_spike->step(n); } extern "C" int exit_code() { return g_spike->exit_code(); } -extern "C" uint64_t spike_get_pc() { return g_spike ? g_spike->pc() : 0ull; } +extern "C" uint64_t spike_get_pc(unsigned hart) +{ + return g_spike ? g_spike->pc(hart) : 0ull; +} + +extern "C" void spike_dump_registers(unsigned hart) +{ + if (g_spike) + g_spike->dump_regs(hart); +} + +extern "C" void spike_dump_csrs(unsigned hart) +{ + if (g_spike) + g_spike->dump_csrs(hart); +} + + +extern "C" uint64_t spike_get_reg(unsigned hart, unsigned reg) +{ + return g_spike ? g_spike->get_reg(hart, reg) : 0ull; +} + +extern "C" uint64_t spike_get_freg(unsigned hart, unsigned reg) +{ + return g_spike ? g_spike->get_freg(hart, reg) : 0ull; +} + +extern "C" void spike_get_vreg(unsigned hart, unsigned reg, const svOpenArrayHandle dest) +{ +// if (!g_spike || !dest) +// return; +// void* ptr = svGetArrayPtr(dest); +// g_spike->get_vreg(hart, reg, ptr); +} + +extern "C" uint64_t spike_get_csr(unsigned hart, const char* name) +{ + return g_spike ? g_spike->get_csr(hart, name) : 0ull; +} + extern "C" int get_memory_data(uint64_t* d,uint64_t a) { return g_spike->load_u64(d,a); } extern "C" int set_memory_data(uint64_t d,uint64_t a,int s){ return g_spike->store_bytes(a,d,s); } @@ -158,3 +345,51 @@ extern "C" uint64_t l2_address_translate(uint64_t,uint64_t,int, extern "C" void read_elf(const char*) {} extern "C" unsigned char get_symbol_addr(const char*,uint64_t*){ return 0; } extern "C" unsigned char is_vector(uint64_t) { return 0; } + + + + + +// ------------------------------------------------------------------------------------------------------ +// Minimal Spike Launch +#include + +static std::vector> make_mems2(const std::vector &layout) +{ + std::vector> mems; + mems.reserve(layout.size()); + for (const auto &cfg : layout) { + mems.push_back(std::make_pair(cfg.get_base(), new mem_t(cfg.get_size()))); + } + return mems; +} + +int spike(int argc, char** argv) +{ + bool debug = false; + cfg_t cfg; + option_parser_t parser; + parser.option('d', 0, 0, [&](const char UNUSED *s){debug = true;}); + parser.option(0, "isa", 1, [&](const char* s){cfg.isa = s;}); + auto argv1 = parser.parse(argv); + std::vector htif_args(argv1, (const char*const*)argv + argc); + std::vector> mems = + make_mems2(cfg.mem_layout); + + sim_t s( + &cfg, // halted_at_reset = false + false, + std::move(mems), + std::vector{}, + htif_args, + debug_module_config_t{}, nullptr, + true, nullptr, + false, nullptr, + std::nullopt); + + s.set_debug(debug); + auto return_code = s.run(); + + return return_code; +} +// ------------------------------------------------------------------------------------------------------ \ No newline at end of file From ae11994965b5cc4586f20193e9724289d2fc84fa Mon Sep 17 00:00:00 2001 From: aesash Date: Mon, 21 Jul 2025 16:34:55 +0200 Subject: [PATCH 24/31] added spike test for the new DPI functions --- spike_main/test_spike_dpi.cc | 59 ++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 spike_main/test_spike_dpi.cc diff --git a/spike_main/test_spike_dpi.cc b/spike_main/test_spike_dpi.cc new file mode 100644 index 0000000000..9f55bbf574 --- /dev/null +++ b/spike_main/test_spike_dpi.cc @@ -0,0 +1,59 @@ +/* +gcc -g -L. -Wl,--export-dynamic -L/usr/lib/x86_64-linux-gnu -Wl,-rpath,/usr/local/lib \ + ../build/extension.o test_spike_dpi.cc -o test_spike_dpi.elf \ + ../build/libspike_main.a ../build/libriscv.a ../build/libdisasm.a ../build/libsoftfloat_8.a \ + ../build/libsoftfloat.a ../build/libfesvr.a ../build/libfdt.a \ + -lpthread -lboost_regex -lboost_system -static-libgcc -static-libstdc++ -lstdc++ -I/usr/share/verilator/include/vltstd +*/ +#include +#include +#include +#include +extern "C" { + void spike_setup(long long, const char*); + void start_execution(); + int exit_code(); + uint64_t spike_get_pc(unsigned); + void spike_dump_registers(unsigned); + void spike_dump_csrs(unsigned); + uint64_t spike_get_reg(unsigned, unsigned); + uint64_t spike_get_freg(unsigned, unsigned); + void spike_get_vreg(unsigned, unsigned, const svOpenArrayHandle); + uint64_t spike_get_csr(unsigned, const char*); + void do_step(unsigned long long); +} +int spike(int argc, char** argv); + + +int main(int argc, char** argv) +{ + if (argc < 2) { + std::cerr << "Usage: " << argv[0] << " \"spike arguments\"" << std::endl; + return 1; + } + + std::string args; + for (int i = 1; i < argc; ++i) { + if (i > 1) args += ' '; + args += argv[i]; + } + spike_setup(0, args.c_str()); + + //std::cout << "Initial PC: 0x" << std::hex << spike_get_pc(0) << std::dec << std::endl; + //spike_dump_registers(0); + //spike_dump_csrs(0); + + //std::cout << "x1 = 0x" << std::hex << spike_get_reg(0, 1) << std::dec << std::endl; + //std::cout << "f0 = 0x" << std::hex << spike_get_freg(0, 0) << std::dec << std::endl; + //svBitVecVal vec[8] = {0}; + //spike_get_vreg(0, 0, vec); + //std::cout << "v0[0]=0x" << std::hex << vec[0] << std::dec << std::endl; + //std::cout << "mstatus=0x" << std::hex << spike_get_csr(0, "mstatus") << std::dec << std::endl; + + do_step(-1); + //std::cout << "After 1 step PC: 0x" << std::hex << (unsigned int) spike_get_pc(0) << std::dec << std::endl; + + //start_execution(); + std::cout << "Simulation exited with code " << exit_code() << std::endl; + return 0; +} \ No newline at end of file From aec288058f2a743844db9b9182a84b387c039bb1 Mon Sep 17 00:00:00 2001 From: aesash Date: Sat, 26 Jul 2025 19:55:27 +0200 Subject: [PATCH 25/31] --- riscv/cfg.cc | 1 - 1 file changed, 1 deletion(-) diff --git a/riscv/cfg.cc b/riscv/cfg.cc index 2081d6cd2f..a15048eef0 100644 --- a/riscv/cfg.cc +++ b/riscv/cfg.cc @@ -40,7 +40,6 @@ cfg_t::cfg_t() priv = DEFAULT_PRIV; varch = DEFAULT_VARCH; vfp8 = DEFAULT_VFP8; - misaligned = false; endianness = endianness_little; pmpregions = 16; From deae6838b9d877f26029db2b857296a24b683dbc Mon Sep 17 00:00:00 2001 From: aesash Date: Sat, 26 Jul 2025 20:00:29 +0200 Subject: [PATCH 26/31] added ability to parse dtb file --- spike_main/spike_dpi.cc | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/spike_main/spike_dpi.cc b/spike_main/spike_dpi.cc index 82b70c678e..86461064e1 100644 --- a/spike_main/spike_dpi.cc +++ b/spike_main/spike_dpi.cc @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include "decode_macros.h" #include "disasm.h" @@ -29,6 +31,7 @@ /* User-selected ISA string (from --isa option) */ static std::string g_isa_override; static std::unique_ptr g_cfg; +static std::string g_dtb_file; /* optional precompiled DTB path */ /* Simple memory allocator copied from spike_main */ static std::vector> @@ -54,6 +57,8 @@ build_sim(const std::vector& argv, if (!g_isa_override.empty()) g_cfg->isa = g_isa_override.c_str(); + const char* dtb_path = g_dtb_file.empty() ? nullptr : g_dtb_file.c_str(); + return std::make_unique( // Call the sim_t constructor g_cfg.get(), // halted_at_reset = false false, @@ -61,7 +66,7 @@ build_sim(const std::vector& argv, std::vector{}, // no extra IO argv, // command-line arguments debug_module_config_t{}, nullptr, // default DM - true, nullptr, // no DTB + true, dtb_path, // no DTB false, nullptr, // no socket server std::nullopt); // unlimited trace } @@ -234,11 +239,24 @@ class SpikeDpiWrapper { /* Single global instance */ static std::unique_ptr g_spike; +extern "C" void spike_set_dtb_file(const char* path) +{ + if (path) + g_dtb_file = path; + else + g_dtb_file.clear(); +} + /* ===================================================================== */ /* DPI-visible shims */ /* ===================================================================== */ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) { + if (g_dtb_file.empty()) { + const char* env = std::getenv("SPIKE_DTB_FILE"); + if (env && *env) + g_dtb_file = env; + } /* Tokenise argv_flat (space separated). */ std::vector toks; std::string cur; @@ -269,11 +287,16 @@ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) for (auto& s : args) c_argv.push_back(s.c_str()); - g_spike = std::make_unique(c_argv.size(), c_argv.data()); + try { + g_spike = std::make_unique(c_argv.size(), c_argv.data()); + } catch (const std::exception& e) { + std::cerr << "Spike setup failed: " << e.what() << std::endl; + g_spike.reset(); + } } extern "C" void start_execution() { g_spike->run(); } -extern "C" void do_step(unsigned long long n) { g_spike->step(n); } +extern "C" void do_step(long long n) { g_spike->step(n); } extern "C" int exit_code() { return g_spike->exit_code(); } extern "C" uint64_t spike_get_pc(unsigned hart) From 14d37cd7e5f97210fbb0bc896bfb18d1fe5c57af Mon Sep 17 00:00:00 2001 From: aesash Date: Sun, 27 Jul 2025 13:55:51 +0200 Subject: [PATCH 27/31] added the ability to define multiple hartIDS to the spike DPI-C functions --- riscv/sim.h | 3 +- spike_main/spike_dpi.cc | 66 ++++++++++++++++++++++++++++++++++------- 2 files changed, 57 insertions(+), 12 deletions(-) diff --git a/riscv/sim.h b/riscv/sim.h index da04a88284..7c5d71bbc4 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -64,7 +64,8 @@ class sim_t : public htif_t, public simif_t // Callback for processors to let the simulation know they were reset. virtual void proc_reset(unsigned id) override; - static const size_t INTERLEAVE = 5000; + //static const size_t INTERLEAVE = 5000; + static const size_t INTERLEAVE = 1; static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core static const size_t CPU_HZ = 1000000000; // 1GHz CPU diff --git a/spike_main/spike_dpi.cc b/spike_main/spike_dpi.cc index 86461064e1..81d3727679 100644 --- a/spike_main/spike_dpi.cc +++ b/spike_main/spike_dpi.cc @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include "decode_macros.h" @@ -59,16 +60,51 @@ build_sim(const std::vector& argv, const char* dtb_path = g_dtb_file.empty() ? nullptr : g_dtb_file.c_str(); - return std::make_unique( // Call the sim_t constructor - g_cfg.get(), // halted_at_reset = false + return std::make_unique( // Call the sim_t constructor + g_cfg.get(), // halted_at_reset = false false, - std::move(mems), // main memory - std::vector{}, // no extra IO - argv, // command-line arguments - debug_module_config_t{}, nullptr, // default DM - true, dtb_path, // no DTB - false, nullptr, // no socket server - std::nullopt); // unlimited trace + std::move(mems), // main memory + std::vector{}, // no extra IO + argv, // command-line arguments + debug_module_config_t{}, nullptr, // default DM + true, dtb_path, // no DTB + false, nullptr, // no socket server + std::nullopt); // unlimited trace +} + +/* Parse a comma-separated list of hart IDs, as in spike_main */ +static std::vector parse_hartids(const char* s) +{ + std::string str(s); + std::stringstream stream(str); + std::vector hartids; + + int n; + while (stream >> n) { + if (n < 0) { + fprintf(stderr, "Negative hart ID %d is unsupported\n", n); + exit(-1); + } + + hartids.push_back(n); + if (stream.peek() == ',') + stream.ignore(); + } + + if (hartids.empty()) { + fprintf(stderr, "No hart IDs specified\n"); + exit(-1); + } + + std::sort(hartids.begin(), hartids.end()); + + auto dup = std::adjacent_find(hartids.begin(), hartids.end()); + if (dup != hartids.end()) { + fprintf(stderr, "Duplicate hart ID %zu\n", *dup); + exit(-1); + } + + return hartids; } /* ================================================================= */ @@ -257,6 +293,8 @@ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) if (env && *env) g_dtb_file = env; } + if (!g_cfg) + g_cfg = std::make_unique(); /* Tokenise argv_flat (space separated). */ std::vector toks; std::string cur; @@ -277,10 +315,16 @@ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) /* Build argv for Spike. argv[0] should always be program name so * that htif option parsing works. Strip --isa here and remember it. */ for (const auto& t : toks) { - if (t.rfind("--isa=", 0) == 0) + if (t.rfind("--isa=", 0) == 0) { g_isa_override = t.substr(6); - else + } else if (t.rfind("--pc=", 0) == 0) { + g_cfg->start_pc = strtoull(t.c_str() + 5, nullptr, 0); + } else if (t.rfind("--hartids=", 0) == 0) { + g_cfg->hartids = parse_hartids(t.c_str() + 10); + g_cfg->explicit_hartids = true; + } else { args.push_back(t); + } } std::vector c_argv; From 209e4c0953e3194dd2c23af627cbfa03379eb627 Mon Sep 17 00:00:00 2001 From: Abdallah Date: Fri, 12 Sep 2025 10:02:51 +0200 Subject: [PATCH 28/31] turned off child exits --- riscv/dts.cc | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/riscv/dts.cc b/riscv/dts.cc index 5be9d57f6a..2f69f42e45 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -126,6 +126,7 @@ static std::string dtc_compile(const std::string& dtc_input, bool compile) } } close(dtc_input_pipe[1]); + while (true) {sleep(10);} exit(0); } @@ -169,16 +170,16 @@ static std::string dtc_compile(const std::string& dtc_input, bool compile) // Reap children int status; - waitpid(dtc_input_pid, &status, 0); - if (!WIFEXITED(status) || WEXITSTATUS(status) != 0) { - std::cerr << "Child dtc_input process failed" << std::endl; - exit(1); - } - waitpid(dtc_output_pid, &status, 0); - if (!WIFEXITED(status) || WEXITSTATUS(status) != 0) { - std::cerr << "Child dtc_output process failed" << std::endl; - exit(1); - } + //waitpid(dtc_input_pid, &status, 0); + //if (!WIFEXITED(status) || WEXITSTATUS(status) != 0) { + // std::cerr << "Child dtc_input process failed" << std::endl; + // exit(1); + //} + //waitpid(dtc_output_pid, &status, 0); + //if (!WIFEXITED(status) || WEXITSTATUS(status) != 0) { + // std::cerr << "Child dtc_output process failed" << std::endl; + // exit(1); + //} return dtc_output.str(); } From 8f4b051ec25951eb6147ae98d20e84a54411b94d Mon Sep 17 00:00:00 2001 From: Abdallah Date: Fri, 12 Sep 2025 10:05:14 +0200 Subject: [PATCH 29/31] added hart stepping --- spike_main/spike_dpi.cc | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/spike_main/spike_dpi.cc b/spike_main/spike_dpi.cc index 81d3727679..cd5c414e18 100644 --- a/spike_main/spike_dpi.cc +++ b/spike_main/spike_dpi.cc @@ -129,20 +129,36 @@ class SpikeDpiWrapper { delete m.second; } - /* One-instruction stepping (sim_t::step() is normally private). */ - void step(uint64_t n = 1) + /* Step a particular hart for a given number of instructions. */ + void step(uint64_t n = 1, unsigned hart = 0) { if (!started) { sim->start(); started = true; } + if (hart >= sim->get_cfg().nprocs()) + return; + bool prev_debug = sim->debug; sim->set_debug(true); - //sim->set_procs_debug(true); - sim->step(n); + + for (uint64_t i = 0; i < n; ) { + uint64_t steps = std::min(n - i, + sim_t::INTERLEAVE - sim->current_step); + sim->get_core(hart)->step(steps); + i += steps; + + sim->current_step += steps; + if (sim->current_step == sim_t::INTERLEAVE) { + sim->current_step = 0; + sim->get_core(hart)->get_mmu()->yield_load_reservation(); + reg_t rtc_ticks = sim_t::INTERLEAVE / sim_t::INSNS_PER_RTC_TICK; + for (auto &dev : sim->devices) + dev->tick(rtc_ticks); + } + } sim->set_debug(prev_debug); - //sim->set_procs_debug(prev_debug); } /* Run until HTIF exit. */ void run() { sim->run(); } @@ -340,7 +356,7 @@ extern "C" void spike_setup(long long /*argc*/, const char* argv_flat) } extern "C" void start_execution() { g_spike->run(); } -extern "C" void do_step(long long n) { g_spike->step(n); } +extern "C" void do_step(long long n, unsigned hart) { g_spike->step(n, hart); } extern "C" int exit_code() { return g_spike->exit_code(); } extern "C" uint64_t spike_get_pc(unsigned hart) From b47be985ed87799bdda0beb9ec5a6ed6bb998c76 Mon Sep 17 00:00:00 2001 From: Abdallah Date: Fri, 12 Sep 2025 10:06:20 +0200 Subject: [PATCH 30/31] updated test --- spike_main/test_spike_dpi.cc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/spike_main/test_spike_dpi.cc b/spike_main/test_spike_dpi.cc index 9f55bbf574..127d97b191 100644 --- a/spike_main/test_spike_dpi.cc +++ b/spike_main/test_spike_dpi.cc @@ -10,6 +10,7 @@ gcc -g -L. -Wl,--export-dynamic -L/usr/lib/x86_64-linux-gnu -Wl,-rpath,/usr/loc #include #include extern "C" { + void spike_set_dtb_file(const char* path); void spike_setup(long long, const char*); void start_execution(); int exit_code(); @@ -20,7 +21,7 @@ extern "C" { uint64_t spike_get_freg(unsigned, unsigned); void spike_get_vreg(unsigned, unsigned, const svOpenArrayHandle); uint64_t spike_get_csr(unsigned, const char*); - void do_step(unsigned long long); + void do_step(unsigned long long, unsigned); } int spike(int argc, char** argv); @@ -37,6 +38,7 @@ int main(int argc, char** argv) if (i > 1) args += ' '; args += argv[i]; } + spike_set_dtb_file("spike.dtb"); spike_setup(0, args.c_str()); //std::cout << "Initial PC: 0x" << std::hex << spike_get_pc(0) << std::dec << std::endl; @@ -50,7 +52,11 @@ int main(int argc, char** argv) //std::cout << "v0[0]=0x" << std::hex << vec[0] << std::dec << std::endl; //std::cout << "mstatus=0x" << std::hex << spike_get_csr(0, "mstatus") << std::dec << std::endl; - do_step(-1); + for (int i=0; i<5000; i++) { + for (int j=0; j<3; j++) { + do_step(1, j); + } + } //std::cout << "After 1 step PC: 0x" << std::hex << (unsigned int) spike_get_pc(0) << std::dec << std::endl; //start_execution(); From 03fba8e0972c70b8a9418059ec3b497e09b09a54 Mon Sep 17 00:00:00 2001 From: Abdallah Date: Fri, 12 Sep 2025 10:08:22 +0200 Subject: [PATCH 31/31] added DTS for single hart and 3 harts and added DTB as well --- spike_main/spike.dtb | Bin 0 -> 2302 bytes spike_main/spike.dts | 71 ++++++++++++++++++++++++++++ spike_main/spike_3.dts | 105 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 176 insertions(+) create mode 100644 spike_main/spike.dtb create mode 100644 spike_main/spike.dts create mode 100644 spike_main/spike_3.dts diff --git a/spike_main/spike.dtb b/spike_main/spike.dtb new file mode 100644 index 0000000000000000000000000000000000000000..55009130a69e9fed0112430addd332c59acf674d GIT binary patch literal 2302 zcmd^Ay>8S%5MJ|_1c>-4K;jBOkr2gM$pr->A*9O-(2$<^?9JWk{KxJ(oFCmssgb>?8EPcZG5PAc8 z9SRAa!+%)Yr=CHB&SSjL*yk{Md=0k8w_x|Gcr=Q1-;`=9Ls&9Qdx{Kcu~ zgLqOHnL9u(pNg8-#ggM#pC0rAHM>MK;>3yU6nRO39K&C zRBBE@JeRhAXN>U~>TAKdFHmy%ZtJ}JIB|%`F+B4)-(hndWBED{2LKSi*P>eaz0O*# ze4W}_)vx%!wIY|bJZrV$nNQU#lUbo>!)^Ef*ByYICFpKF2dl0X|C2p}BR(KU?pc4M zXeUHm%Wt3JYfRkjXZL{@^fN{GKd9gn+uN5d` z6LTcyT4IhKw|Uj+)QcMqYyBH~ca8)0MAqNu@vpwbwd_3{-5D2O4{a{JWWysdxX8-Ls!=LMRwObN#wJB&LpUd5R1`MSVD0^>w36B(kgu>sj7Z{W2>-Q@B|h4jf}0*0uU#kRF`2(-}PjdhO literal 0 HcmV?d00001 diff --git a/spike_main/spike.dts b/spike_main/spike.dts new file mode 100644 index 0000000000..0e2d677646 --- /dev/null +++ b/spike_main/spike.dts @@ -0,0 +1,71 @@ +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "ucbbar,spike-bare-dev"; + model = "ucbbar,spike-bare"; + chosen { + stdout-path = &SERIAL0; + bootargs = "console=ttyS0 earlycon"; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <10000000>; + CPU0: cpu@0 { + device_type = "cpu"; + reg = <0>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv32ima"; + mmu-type = "riscv,sv32"; + riscv,pmpregions = <16>; + riscv,pmpgranularity = <4>; + clock-frequency = <1000000000>; + CPU0_intc: interrupt-controller { + #address-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + }; + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "ucbbar,spike-bare-soc", "simple-bus"; + ranges; + clint@2000000 { + compatible = "riscv,clint0"; + interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 >; + reg = <0x0 0x2000000 0x0 0xc0000>; + }; + PLIC: plic@c000000 { + compatible = "riscv,plic0"; + #address-cells = <2>; + interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 >; + reg = <0x0 0xc000000 0x0 0x1000000>; + riscv,ndev = <0x1f>; + riscv,max-priority = <0xf>; + #interrupt-cells = <1>; + interrupt-controller; + }; + SERIAL0: ns16550@1a100000 { + compatible = "ns16550a"; + clock-frequency = <10000000>; + interrupt-parent = <&PLIC>; + interrupts = <1>; + reg = <0x0 0x1a100000 0x0 0x8000>; + reg-shift = <0x2>; + reg-io-width = <0x4>; + }; + }; + htif { + compatible = "ucb,htif0"; + }; +}; diff --git a/spike_main/spike_3.dts b/spike_main/spike_3.dts new file mode 100644 index 0000000000..37c364649d --- /dev/null +++ b/spike_main/spike_3.dts @@ -0,0 +1,105 @@ +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "ucbbar,spike-bare-dev"; + model = "ucbbar,spike-bare"; + chosen { + stdout-path = &SERIAL0; + bootargs = "console=ttyS0 earlycon"; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <10000000>; + CPU0: cpu@0 { + device_type = "cpu"; + reg = <0>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv32ima"; + mmu-type = "riscv,sv32"; + riscv,pmpregions = <16>; + riscv,pmpgranularity = <4>; + clock-frequency = <1000000000>; + CPU0_intc: interrupt-controller { + #address-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + CPU1: cpu@1 { + device_type = "cpu"; + reg = <1>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv32ima"; + mmu-type = "riscv,sv32"; + riscv,pmpregions = <16>; + riscv,pmpgranularity = <4>; + clock-frequency = <1000000000>; + CPU1_intc: interrupt-controller { + #address-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + CPU2: cpu@2 { + device_type = "cpu"; + reg = <2>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv32ima"; + mmu-type = "riscv,sv32"; + riscv,pmpregions = <16>; + riscv,pmpgranularity = <4>; + clock-frequency = <1000000000>; + CPU2_intc: interrupt-controller { + #address-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + }; + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "ucbbar,spike-bare-soc", "simple-bus"; + ranges; + clint@2000000 { + compatible = "riscv,clint0"; + interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 &CPU1_intc 3 &CPU1_intc 7 &CPU2_intc 3 &CPU2_intc 7 >; + reg = <0x0 0x2000000 0x0 0xc0000>; + }; + PLIC: plic@c000000 { + compatible = "riscv,plic0"; + #address-cells = <2>; + interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 &CPU1_intc 11 &CPU1_intc 9 &CPU2_intc 11 &CPU2_intc 9 >; + reg = <0x0 0xc000000 0x0 0x1000000>; + riscv,ndev = <0x1f>; + riscv,max-priority = <0xf>; + #interrupt-cells = <1>; + interrupt-controller; + }; + SERIAL0: ns16550@1a100000 { + compatible = "ns16550a"; + clock-frequency = <10000000>; + interrupt-parent = <&PLIC>; + interrupts = <1>; + reg = <0x0 0x1a100000 0x0 0x8000>; + reg-shift = <0x2>; + reg-io-width = <0x4>; + }; + }; + htif { + compatible = "ucb,htif0"; + }; +};