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Add instret_overflow test
See riscv/riscv-isa-manual#1255 cc @Timmmm
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isa/rv32mi/Makefrag

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@@ -17,5 +17,6 @@ rv32mi_sc_tests = \
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sh-misaligned \
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sw-misaligned \
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zicntr \
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instret_overflow \
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rv32mi_p_tests = $(addprefix rv32mi-p-, $(rv32mi_sc_tests))

isa/rv32mi/instret_overflow.S

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# See LICENSE for license details.
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#include "riscv_test.h"
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#undef RVTEST_RV64M
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#define RVTEST_RV64M RVTEST_RV32M
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#define __MACHINE_MODE
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#include "../rv64mi/instret_overflow.S"

isa/rv64mi/Makefrag

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@@ -18,5 +18,6 @@ rv64mi_sc_tests = \
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sw-misaligned \
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sd-misaligned \
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zicntr \
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instret_overflow \
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rv64mi_p_tests = $(addprefix rv64mi-p-, $(rv64mi_sc_tests))

isa/rv64mi/instret_overflow.S

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# See LICENSE for license details.
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#*****************************************************************************
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# minstret_overflow.S
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#-----------------------------------------------------------------------------
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#
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# Test if overflow of instret is handled correctly
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#
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#include "riscv_test.h"
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#include "test_macros.h"
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RVTEST_RV64M
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RVTEST_CODE_BEGIN
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# The value written to instret will be the value read by the following
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# instruction (i.e. the increment is suppressed)
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TEST_CASE(2, a0, 0, csrwi minstret, 0; csrr a0, minstret);
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#if __riscv_xlen == 32
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# Writes to instreth are considered writes to instret and so also
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# suppress the increment
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TEST_CASE(3, a0, 0, li t0, 0xffffffff; csrw minstret, t0; csrw minstreth, t0; nop; csrr a0, minstret);
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TEST_CASE(4, a0, 0, csrr a0, minstreth);
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#endif
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2:
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TEST_PASSFAIL
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.align 2
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.global mtvec_handler
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mtvec_handler:
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j fail
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RVTEST_CODE_END
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.data
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RVTEST_DATA_BEGIN
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TEST_DATA
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RVTEST_DATA_END

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