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Added instructions to handle Rs1 and Rd dependency in load-store bypass sequences. (#602)
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isa/macros/scalar/test_macros.h

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@@ -32,6 +32,13 @@ test_ ## testnum: \
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#define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
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#define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
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#if __riscv_xlen == 64
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#define LOAD_PTR ld
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#define STORE_PTR sd
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#else
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#define LOAD_PTR lw
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#define STORE_PTR sw
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#endif
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#-----------------------------------------------------------------------
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# RV64UI MACROS
@@ -306,6 +313,13 @@ test_ ## testnum: \
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load_inst x2, offset(x2); \
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li x7, result; \
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bne x2, x7, fail; \
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la x2, base; \
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STORE_PTR x2,8(x2); \
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LOAD_PTR x4,8(x2); \
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store_inst x1, offset(x4); \
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bne x4, x2, fail; \
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load_inst x14, offset(x4); \
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bne x14, x7, fail; \
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#define TEST_ST_LD_BYPASS(testnum, load_inst, store_inst, result, offset, base) \
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test_ ## testnum: \

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