diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 92f7ce33f..ad4cd9a53 100755
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -1504,7 +1504,7 @@ def check_triggers(self, tdata1_lsbs, tdata2):
 
         return triggers
 
-    def test(self):
+    def test_trigger(self):
         # If we want this test to run from flash, we can't have any software
         # breakpoints set.
 
@@ -1521,6 +1521,21 @@ def test(self):
         self.gdb.command("delete")
         self.exit()
 
+class McontrolTest(TriggerDmode):
+    def early_applicable(self):
+        return self.target.support_mcontrol
+
+    def test(self):
+        self.test_trigger()
+
+class Mcontrol6Test(TriggerDmode):
+    compile_args = ("-DTRIGGER_TYPE=6", "programs/trigger.S", )
+    def early_applicable(self):
+        return self.target.support_mcontrol6
+
+    def test(self):
+        self.test_trigger()
+
 class RegsTest(GdbSingleHartTest):
     compile_args = ("programs/regs.S", )
     def setup(self):
diff --git a/debug/programs/trigger.S b/debug/programs/trigger.S
index 1e8be07b6..594bf60b0 100644
--- a/debug/programs/trigger.S
+++ b/debug/programs/trigger.S
@@ -8,6 +8,10 @@
 # define LREG lw
 # define SREG sw
 # define REGBYTES 4
+#endif
+
+#ifndef TRIGGER_TYPE
+# define TRIGGER_TYPE 2
 #endif
 
         .global         main
@@ -40,15 +44,15 @@ write_loop:
         j       main_exit
 
 write_store_trigger:
-        /* 2<<60 is for RV64. 2<<28 is for RV32. That's safe because on RV64 bits 28 and 29 are 0. */
-        li      a0, (2<<60) | (2<<28) | (1<<6) | (1<<1)
+        /* TRIGGER_TYPE<<60 is for RV64. TRIGGER_TYPE<<28 is for RV32. That's safe because on RV64 bits 28 and 29 are 0. */
+        li      a0, (TRIGGER_TYPE<<60) | (TRIGGER_TYPE<<28) | (1<<6) | (1<<1)
         li      a1, 0xdeadbee0
         jal     write_triggers
         la      a0, data
         jal     read_triggers
 
 write_load_trigger:
-        li      a0, (2<<60) | (2<<28) | (1<<6) | (1<<0)
+        li      a0, (TRIGGER_TYPE<<60) | (TRIGGER_TYPE<<28) | (1<<6) | (1<<0)
         li      a1, 0xfeedac00
         jal     write_triggers
         la      a0, data
diff --git a/debug/targets.py b/debug/targets.py
index eca02313f..4eac3c6f6 100644
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -148,6 +148,12 @@ class Target:
     # Support set_pmp_deny to create invalid addresses.
     support_set_pmp_deny = False
 
+    # Supports an address/data match trigger of type 2
+    support_mcontrol = True
+
+    # Supports an address/data match trigger of type 6
+    support_mcontrol6 = True
+
     # Internal variables:
     directory = None
     temporary_files = []