Add long_name and description to AES instructions (#615)

* Update aes32dsi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Update aes32dsmi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Update aes32dsi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Updated aes32dsmi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Update aes32dsi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Updated aes32dsmi.yaml

Signed-off-by: M Abdullah <[email protected]>

* Recommitted with pre-commit fix

* Recommitted after pre-commit tests

---------

Signed-off-by: M Abdullah <[email protected]>
Co-authored-by: root <[email protected]>

Author: sudo-abdullah

arch/inst/Zk/aes32dsi.yaml

@@ -3,9 +3,12 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: aes32dsi
-long_name: No synopsis available.
+long_name: AES final round decryption instruction for RV32
 description: |
-  No description available.
+  This instruction sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES
+  SBox operation, and XOR's the result with `rs1`. This instruction must always be implemented such
+  that its execution latency does not depend on the data being operated on.
+
 definedBy:
   anyOf: [Zk, Zkn, Zknd]
 base: 32

arch/inst/Zk/aes32dsmi.yaml

@@ -3,9 +3,12 @@
 $schema: "inst_schema.json#"
 kind: instruction
 name: aes32dsmi
-long_name: No synopsis available.
+long_name: AES middle round decryption instruction for RV32
 description: |
-  No description available.
+  This instruction sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES
+  SBox operation, and a partial inverse MixColumn, before XOR'ing the result with `rs1`. This
+  instruction must always be implemented such that its execution latency does not depend on the
+  data being operated on.
 definedBy:
   anyOf: [Zk, Zkn, Zknd]
 base: 32