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jmawetjmawet
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adress thinkopenly's comments
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4 files changed

+55
-101
lines changed

4 files changed

+55
-101
lines changed

‎spec/std/isa/csr/V/vxrm.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,6 @@ fields:
4141
! 11 ! rod ! round-to-odd (OR bits into LSB, aka "jam") ! \!v[d] & v[d-1:0]\!=0
4242
4343
sw_write(csr_value): |
44-
return csr_value.VALUE & 2b'11;
44+
return csr_value.VALUE & 3;
4545
type: RW-H
4646
reset_value: UNDEFINED_LEGAL

‎spec/std/isa/inst/V/vsetivli.yaml‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -32,20 +32,6 @@ operation(): |
3232
XReg AVL = uimm;
3333
XReg CEIL_AVL_OVER_TWO = (AVL + 1) / 2;
3434
35-
if (AVL < vlmax) {
36-
CSR[vl].VALUE = AVL;
37-
} else if (AVL < 2*vlmax) {
38-
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
39-
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
40-
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
41-
CSR[vl].VALUE = vlmax;
42-
} else {
43-
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
44-
}
45-
} else {
46-
CSR[vl].VALUE = vlmax;
47-
}
48-
4935
XReg new_vtype = vtypei;
5036
if ((new_vtype[xlen() - 1] == 1'b1) # software is setting the illegal bit
5137
|| ((new_vtype & 8'd0) != 0) # reserved bits
@@ -67,6 +53,20 @@ operation(): |
6753
CSR[vtype].VLMUL = new_vtype[2:0];
6854
}
6955
56+
if (AVL < vlmax) {
57+
CSR[vl].VALUE = AVL;
58+
} else if (AVL < 2*vlmax) {
59+
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
60+
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
61+
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
62+
CSR[vl].VALUE = vlmax;
63+
} else {
64+
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
65+
}
66+
} else {
67+
CSR[vl].VALUE = vlmax;
68+
}
69+
7070
X[xd] = CSR[vl].VALUE;
7171
CSR[vstart].VALUE = 0;
7272

‎spec/std/isa/inst/V/vsetvl.yaml‎

Lines changed: 20 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -32,50 +32,13 @@ operation(): |
3232
XReg AVL = xs1;
3333
XReg CEIL_AVL_OVER_TWO = (AVL + 1) / 2;
3434
35-
if (AVL < vlmax) {
36-
CSR[vl].VALUE = AVL;
37-
} else if (AVL < 2*vlmax) {
38-
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
39-
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
40-
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
41-
CSR[vl].VALUE = vlmax;
42-
} else {
43-
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
44-
}
45-
} else {
46-
CSR[vl].VALUE = vlmax;
47-
}
48-
4935
XReg new_vtype = xs2;
50-
if (new_vtype[xlen() - 1] == 1'b1) {
51-
# software is setting the illegal bit
52-
CSR[vtype].VILL = 1;
53-
CSR[vtype].VMA = 0;
54-
CSR[vtype].VTA = 0;
55-
CSR[vtype].VSEW = 0;
56-
CSR[vtype].VLMUL = 0;
57-
} else if ((new_vtype & 8'd0) != 0) {
58-
CSR[vtype].VILL = 1;
59-
CSR[vtype].VMA = 0;
60-
CSR[vtype].VTA = 0;
61-
CSR[vtype].VSEW = 0;
62-
CSR[vtype].VLMUL = 0;
63-
} else if (new_vtype[5] == 1) {
64-
# reserved vsew encoding
65-
CSR[vtype].VILL = 1;
66-
CSR[vtype].VMA = 0;
67-
CSR[vtype].VTA = 0;
68-
CSR[vtype].VSEW = 0;
69-
CSR[vtype].VLMUL = 0;
70-
} else if (new_vtype[2:0] == 3'b100) {
71-
# reserved LMUL
72-
CSR[vtype].VILL = 1;
73-
CSR[vtype].VMA = 0;
74-
CSR[vtype].VTA = 0;
75-
CSR[vtype].VSEW = 0;
76-
CSR[vtype].VLMUL = 0;
77-
} else if (xlen() == 32 && new_vtype[2:0] == 3'b101) {
78-
# reserved LMUL in RV32
36+
if ((new_vtype[xlen() - 1] == 1'b1) # software is setting the illegal bit
37+
|| ((new_vtype & 8'd0) != 0) # reserved bits
38+
|| (new_vtype[5] == 1) # reserved vsew encoding
39+
|| (new_vtype[2:0] == 3'b100) # reserved vlmul encoding
40+
|| (xlen() == 32 && new_vtype[2:0] == 3'b101)) # reserved LMUL in RV32
41+
{
7942
CSR[vtype].VILL = 1;
8043
CSR[vtype].VMA = 0;
8144
CSR[vtype].VTA = 0;
@@ -90,6 +53,20 @@ operation(): |
9053
CSR[vtype].VLMUL = new_vtype[2:0];
9154
}
9255
56+
if (AVL < vlmax) {
57+
CSR[vl].VALUE = AVL;
58+
} else if (AVL < 2*vlmax) {
59+
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
60+
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
61+
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
62+
CSR[vl].VALUE = vlmax;
63+
} else {
64+
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
65+
}
66+
} else {
67+
CSR[vl].VALUE = vlmax;
68+
}
69+
9370
X[xd] = CSR[vl].VALUE;
9471
CSR[vstart].VALUE = 0;
9572

‎spec/std/isa/inst/V/vsetvli.yaml‎

Lines changed: 20 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -32,50 +32,13 @@ operation(): |
3232
XReg AVL = xs1;
3333
XReg CEIL_AVL_OVER_TWO = (AVL + 1) / 2;
3434
35-
if (AVL < vlmax) {
36-
CSR[vl].VALUE = AVL;
37-
} else if (AVL < 2*vlmax) {
38-
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
39-
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
40-
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
41-
CSR[vl].VALUE = vlmax;
42-
} else {
43-
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
44-
}
45-
} else {
46-
CSR[vl].VALUE = vlmax;
47-
}
48-
4935
XReg new_vtype = vtypei;
50-
if (new_vtype[xlen() - 1] == 1'b1) {
51-
# software is setting the illegal bit
52-
CSR[vtype].VILL = 1;
53-
CSR[vtype].VMA = 0;
54-
CSR[vtype].VTA = 0;
55-
CSR[vtype].VSEW = 0;
56-
CSR[vtype].VLMUL = 0;
57-
} else if ((new_vtype & 8'd0) != 0) {
58-
CSR[vtype].VILL = 1;
59-
CSR[vtype].VMA = 0;
60-
CSR[vtype].VTA = 0;
61-
CSR[vtype].VSEW = 0;
62-
CSR[vtype].VLMUL = 0;
63-
} else if (new_vtype[5] == 1) {
64-
# reserved vsew encoding
65-
CSR[vtype].VILL = 1;
66-
CSR[vtype].VMA = 0;
67-
CSR[vtype].VTA = 0;
68-
CSR[vtype].VSEW = 0;
69-
CSR[vtype].VLMUL = 0;
70-
} else if (new_vtype[2:0] == 3'b100) {
71-
# reserved LMUL
72-
CSR[vtype].VILL = 1;
73-
CSR[vtype].VMA = 0;
74-
CSR[vtype].VTA = 0;
75-
CSR[vtype].VSEW = 0;
76-
CSR[vtype].VLMUL = 0;
77-
} else if (xlen() == 32 && new_vtype[2:0] == 3'b101) {
78-
# reserved LMUL in RV32
36+
if ((new_vtype[xlen() - 1] == 1'b1) # software is setting the illegal bit
37+
|| ((new_vtype & 8'd0) != 0) # reserved bits
38+
|| (new_vtype[5] == 1) # reserved vsew encoding
39+
|| (new_vtype[2:0] == 3'b100) # reserved vlmul encoding
40+
|| (xlen() == 32 && new_vtype[2:0] == 3'b101)) # reserved LMUL in RV32
41+
{
7942
CSR[vtype].VILL = 1;
8043
CSR[vtype].VMA = 0;
8144
CSR[vtype].VTA = 0;
@@ -90,6 +53,20 @@ operation(): |
9053
CSR[vtype].VLMUL = new_vtype[2:0];
9154
}
9255
56+
if (AVL < vlmax) {
57+
CSR[vl].VALUE = AVL;
58+
} else if (AVL < 2*vlmax) {
59+
if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "ceil(AVL/2)") {
60+
CSR[vl].VALUE = CEIL_AVL_OVER_TWO;
61+
} else if (RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX == "VLMAX") {
62+
CSR[vl].VALUE = vlmax;
63+
} else {
64+
unpredictable("Implementations may choose a custom value for vl in the case AVL < (2*VLMAX), so long as ceil(AVL/2) <= vl <= VLMAX");
65+
}
66+
} else {
67+
CSR[vl].VALUE = vlmax;
68+
}
69+
9370
X[xd] = CSR[vl].VALUE;
9471
CSR[vstart].VALUE = 0;
9572

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