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Merge pull request #265 from kbroch-rivosinc/dev/kbroch/c-lui-yaml-schema-fix
fix duplicate `not` keyword
2 parents 0fb90ac + 0a71dba commit 3d1039c

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-7
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-7
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arch/inst/C/c.lui.yaml

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@
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c.lui:
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long_name: Load the non-zero 6-bit immediate field into bits 17–12 of the destination register
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description: |
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C.LUI loads the non-zero 6-bit immediate field into bits 17–12 of the destination register, clears the bottom 12 bits, and sign-extends bit 17 into all higher bits of the destination.
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C.LUI expands into `lui rd, imm`.
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C.LUI is only valid when rd≠x0 and rd≠x2, and when the immediate is not equal to zero.
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C.LUI loads the non-zero 6-bit immediate field into bits 17–12 of the destination register, clears the bottom 12 bits, and sign-extends bit 17 into all higher bits of the destination.
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C.LUI expands into `lui rd, imm`.
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C.LUI is only valid when rd≠x0 and rd≠x2, and when the immediate is not equal to zero.
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The code points with imm=0 are reserved; the remaining code points with rd=x0 are HINTs; and the remaining code points with rd=x2 correspond to the C.ADDI16SP instruction
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definedBy:
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anyOf:
@@ -20,8 +20,7 @@ c.lui:
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left_shift: 12
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- name: rd
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location: 11-7
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not: 0
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not: 2
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not: [0, 2]
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access:
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s: always
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u: always
@@ -33,4 +32,3 @@ c.lui:
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}
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X[rd] = imm;
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lib/arch_obj_models/instruction.rb

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,7 @@ def pretty_name
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elsif excludes.size == 1
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"#{name} != #{excludes[0]}"
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else
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"#{name} != {#{excludes[0].join(',')}}"
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"#{name} != {#{excludes.join(',')}}"
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end
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end
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