chore(deps): bump ext/riscv-opcodes from 946eb67 to 767b741 (#1036)

Bumps [ext/riscv-opcodes](https://github.com/riscv/riscv-opcodes) from
`946eb67` to `767b741`.
<details>
<summary>Commits</summary>
<ul>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/767b74181f2ee325a2f6a2606620530d743553d2"><code>767b741</code></a>
Adding support to generate an svg from opcodes (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/364">#364</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/1d4b38c868963b312d3289fbcf41bc11a69872b0"><code>1d4b38c</code></a>
Move Zilsd &amp; Zclsd to ratified extensions directory (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/360">#360</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/dc3dfad509b5274a3bc69a377cd7821550d30b3e"><code>dc3dfad</code></a>
Update csrs.cs: Remove s[ie]deleg (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/362">#362</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/29f3684036e7e46d1bff08a3d830c2b25c2fa60e"><code>29f3684</code></a>
Generate RVV segment load/store instructions for Go (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/361">#361</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/ac5c7ac4aa2928ba75f0040c8c4830fde253151e"><code>ac5c7ac</code></a>
Update Zvkn and Zvks extension according to Crypto Extensions Volume II
(<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/345">#345</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/ddc8b3813f865bba0a805ddc5889e82d04b467ec"><code>ddc8b38</code></a>
Fix lint errors</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/f153a04d58bd13f9d6a23f36360c29a6cfa20dcc"><code>f153a04</code></a>
Adding Zilsd and Zcmlsd extension (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/250">#250</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/c2cd58c7e491534127952a5cd0f098b007048b25"><code>c2cd58c</code></a>
Fix <a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/357">#357</a>
Incorrect data for zext.b (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/358">#358</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/b30cec9d8d37a1f81623edfb8f70d466ef352d18"><code>b30cec9</code></a>
Added tab as a possible delimeter (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/356">#356</a>)</li>
<li><a
href="https://github.com/riscv/riscv-opcodes/commit/9a09c4844f8eb926e4d4f96c6adc097b78d8b945"><code>9a09c48</code></a>
AIA: add IMSIC defines (<a
href="https://redirect.github.com/riscv/riscv-opcodes/issues/354">#354</a>)</li>
<li>Additional commits viewable in <a
href="https://github.com/riscv/riscv-opcodes/compare/946eb673874b3a0f2474d1424dc28bc7ee53c306...767b74181f2ee325a2f6a2606620530d743553d2">compare
view</a></li>
</ul>
</details>
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Signed-off-by: dependabot[bot] <[email protected]>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Co-authored-by: Derek Hower <[email protected]>

Author: dependabot[bot]