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Merge pull request #249 from riscv-software-src/237-create-separate-profile-pdf-for-each-profile-family-release-eg-rva23-not-one-pdf-for-all-profiles-in-a-family-eg-rva
Renamed many CRD and Profile things and now Profiles are generated per profile release (e.g. RVA20.pdf, RVA22,pdf)
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.github/workflows/pages.yml

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@@ -57,18 +57,26 @@ jobs:
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run: mkdir -p _site/htmls
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- name: Copy cfg html
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run: cp -R gen/cfg_html_doc/generic_rv64/html _site/example_cfg
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- name: Create RVA Family PDF Spec
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run: ./do gen:profile[rva]
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- name: Copy RVA Family PDF
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run: cp gen/profile_doc/pdf/rva.pdf _site/pdfs/rva.pdf
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- name: Create MC-1 PDF Spec
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run: ./do gen:crd_pdf[MC-1]
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- name: Copy MC-1 PDF
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run: cp gen/crd_doc/pdf/MC-1.pdf _site/pdfs/MC-1.pdf
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- name: Create MC-1 HTML Spec
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run: ./do gen:crd_html[MC-1]
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- name: Copy MC-1 HTML
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run: cp gen/crd_doc/html/MC-1.html _site/htmls/MC-1.html
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- name: Create RVA20 Profile Release PDF Spec
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run: ./do gen:profile[RVA20]
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- name: Copy RVA20 Profile Release PDF
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run: cp gen/profile_doc/pdf/RVA20.pdf _site/pdfs/RVA20.pdf
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- name: Create RVA22 Profile Release PDF Spec
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run: ./do gen:profile[RVA22]
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- name: Copy RVA22 Profile Release PDF
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run: cp gen/profile_doc/pdf/RVA22.pdf _site/pdfs/RVA22.pdf
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- name: Create RVI20 Profile Release PDF Spec
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run: ./do gen:profile[RVI20]
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- name: Copy RVI20 Profile Release PDF
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run: cp gen/profile_doc/pdf/RVA20.pdf _site/pdfs/RVI20.pdf
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- name: Create MC100 PDF Spec
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run: ./do gen:cert_model_pdf[MC100]
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- name: Copy MC100 PDF
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run: cp gen/certificate_doc/pdf/MC100.pdf _site/pdfs/MC100.pdf
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- name: Create MC100 HTML Spec
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run: ./do gen:cert_model_html[MC100]
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- name: Copy MC100 HTML
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run: cp gen/certificate_doc/html/MC100.html _site/htmls/MC100.html
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- name: Copy manual html
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run: cp -R gen/manual/isa/top/all/html _site/manual
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- name: Setup Pages

.gitignore

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@@ -10,7 +10,6 @@
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diag-ditaa-*
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arch/manual/isa/**/riscv-isa-manual
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gen
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gen_expected
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node_modules
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_site
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images

README.adoc

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@@ -8,8 +8,10 @@ The following artifacts have been generated from the top of the `main` branch:
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* https://riscv-software-src.github.io/riscv-unified-db/example_cfg/html/index.html[configuration-specific documentation]
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* https://riscv-software-src.github.io/riscv-unified-db/ruby/arch_def/index.html[Ruby API documentation (database interface)]
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* https://riscv-software-src.github.io/riscv-unified-db/ruby/idl/index.html[Ruby IDL API documentation (IDL compiler)]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/rva.pdf[RVA Profile Family]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/MC-1.pdf[MC-1 Certification Requirements Document]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/RVI20.pdf[RVI20 Profile Release]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/RVA20.pdf[RVA20 Profile Release]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/RVA22.pdf[RVA22 Profile Release]
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* https://riscv-software-src.github.io/riscv-unified-db/pdfs/MC100.pdf[MC100 Certification Requirements Document]
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== Overview
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Rakefile

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@@ -287,10 +287,12 @@ task :regress do
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ENV["VERSIONS"] = "all"
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Rake::Task["gen:html_manual"].invoke
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Rake::Task["gen:html"].invoke("generic_rv64")
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Rake::Task["gen:crd_pdf"].invoke("MockCRD-1")
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Rake::Task["gen:crd_pdf"].invoke("MC-1")
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Rake::Task["gen:profile"].invoke("MockProfileFamily")
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Rake::Task["gen:profile"].invoke("rva")
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Rake::Task["gen:cert_model_pdf"].invoke("MockCertificateModel")
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Rake::Task["gen:cert_model_pdf"].invoke("MC100")
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Rake::Task["gen:profile"].invoke("MockProfileRelease")
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Rake::Task["gen:profile"].invoke("RVA20")
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Rake::Task["gen:profile"].invoke("RVA22")
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Rake::Task["gen:profile"].invoke("RVI20")
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puts
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puts "Regression test PASSED"

arch/certificate_class/MC.yaml

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MC:
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name: MC
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long_name: Microcontroller Certificate Class
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introduction: |
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This certification class specifies requirements for microcontrollers.
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It targets microcontrollers running low-level software on an RTOS or bare-metal.
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This CRD is not intended for the smallest possible microcontrollers but rather for applications
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benefiting from a standardized microcontroller.
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See the https://docs.google.com/document/d/133SZKc18tLsQcT1o6gEmBUkjwrtg2ow63me54RQ1jiY[RISC-V CRDs]
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document for information relevant to all RISC-V CRDs.
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naming_scheme: |
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The MC (M = Microcontroller, C = Certificate) has the following naming scheme (suffixes after MC
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are optional but in the below order):
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MC<model>[v<version>]
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Where:
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* Left & right square braces denote optional.
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* \<model> is a 3 digit integer. It is changed only when mandatory extensions are added to a CRD.
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** The one's digit is incremented when a small mandatory extension is added (e.g., Zicond)
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** The ten's digit is incremented when a medium mandatory extension is addded (e.g., PMP)
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** The hundreds's digit is incremented when a large mandatory extension is addded (e.g., V or H)
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* \<version> is a semantic version (see semver.org) formatted as <major>[.<minor>.[patch]]. If \<version> is omitted, the reference applies equally to all versions.
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** A <major> release indicates support for a new optional extension.
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** A <minor> release indicates one or more of the following changes to the certification tests associated with the CRD.
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*** Fix test bug or increase test coverage
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*** Add more allowed parameter values
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*** Support new extension version
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** A <patch> release indicates just CRD specification changes without any difference in functional behavior
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mandatory_priv_modes:
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- M
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MockCertificateClass:
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name: MockCertificateClass
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long_name: Mock Certificate Class Long Name
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introduction: |
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Here's the Mock Certificate Class introduction.
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naming_scheme: |
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Here's the Mock Certificate Class naming scheme.
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mandatory_priv_modes:
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- M
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description: Here's the Mock Certificate Class description.

arch/crd/MC-1.yaml renamed to arch/certificate_model/MC100.yaml

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# yaml-language-server: $schema=../../schemas/testplan_schema.json
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MC-1:
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name: MC-1
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long_name: LONG NAME
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family: Microcontroller
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# semantic version within the CRD family
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version: "1.0"
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MC100:
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name: MC100
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long_name: Basic Microcontroller Certificate
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class: MC
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model: 100
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# Semantic versions within the model
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versions:
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- version: "1.0.0"
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# XLEN used by rakefile
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base: 32
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revision_history:
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- revision: "0.7"
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date: 2024-07-29
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changes:
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- First version after moving non-microcontroller content in this document to a new document
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called “RISC-V CRDs (Certification Requirement Documents)”
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- Change MC-1 Unpriv ISA spec from
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- Change MC100 Unpriv ISA spec from
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“https://riscv.org/wp-content/uploads/2016/06/riscv-spec-v2.1.pdf[riscv-spec-v2.1], May 31,
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2016” to https://github.com/riscv/riscv-isa-manual/releases/tag/Ratified-IMAFDQC since the
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former isn't ratified by the latter is the oldest ratified version.
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- Supporting multiple MC versions to support customers wanting to certify existing microcontrollers not using the latest version of ratified standards.
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- Changed versioning scheme to use major.minor.patch instead of 3-digit major & minor.
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- Added a table showing the mapping from MC version to ISA manuals.
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- Reluctantly made interrupts OUT OF SCOPE for MC-1 since only the CLINT interrupt controller
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was ratified at that time and isn’t anticipated to be the interrupt controller used by MC-1 implementations.
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- Reluctantly made interrupts OUT OF SCOPE for MC100 since only the CLINT interrupt controller
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was ratified at that time and isn’t anticipated to be the interrupt controller used by MC100 implementations.
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- Clarified MANDATORY behaviors for mie and mip CSRs
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- Removed canonical discovery recipe because the OPT-* options directly inform the certification
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tests and certification reference model of the status of the various options. Also, canonical
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changes:
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- Initial version
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# XLEN used by rakefile
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base: 32
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description: |
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MC-1 can be though of as a minimal 32-bit RISC-V processor with M-mode support:
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MC100 can be though of as minimal 32-bit RISC-V processors with M-mode support:
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* The Unprivileged ISA is RV32I with a few extensions suitable for a basic microcontroller
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* The M-mode features are those listed as mandatory in the RISC-V Privileged ISA manual.
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* The M-mode features are those listed as mandatory in the associated RISC-V Privileged ISA manual
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Key features not included in MC-1 (i.e., OUT OF SCOPE):
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Key features not included in MC100 (i.e., OUT OF SCOPE):
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* Interrupt Controller (e.g., CLIC, CLINT, PLIC)
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* Features for modes other than M-mode
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* PMP
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* Debug & trace (TBD)
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# Specification versions
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tsc_profile: null # None for MC-1
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tsc_profile: null # None for MC100
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unpriv_isa_manual_revision: "20191213"
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priv_isa_manual_revision: "20190608-Priv-MSU-Ratified"
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debug_manual_revision: "0.13.2"

arch/crd/MockCRD-1.yaml renamed to arch/certificate_model/MockCertificateModel.yaml

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# yaml-language-server: $schema=../../schemas/testplan_schema.json
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MockCRD-1:
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name: MockCRD-1
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long_name: Mock CRD Long Name
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family: MockCRDFamily
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MockCertificateModel:
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name: MockCertificateModel
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long_name: Mock Certificate Model Long Name
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class: MockCertificateClass
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model: MockModel
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# XLEN used by rakefile
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base: 64
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# semantic version within the CRD family
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version: "1.0"
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# Semantic versions within the model
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versions:
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- version: "1.0.0"
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- version: "1.1.0"
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revision_history:
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- revision: "0.1"
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M_MODE_ENDIANESS:
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schema:
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const: little
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# XXX Uncomment when GitHub issue #XXX is fixed.
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#schema:
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#- when:
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# version: "=1.0.0"
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# then:
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# const: little
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#- when:
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# version: "=1.1.0"
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# then:
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# enum: [little, big]
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XLEN:
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schema:
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const: 64

arch/crd_family/Microcontroller.yaml

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arch/crd_family/MockCRDFamily.yaml

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