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docs(dcsr): add STEPIE, STOPCOUNT, and STOPTIME params
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+79
-7
lines changed

2 files changed

+79
-7
lines changed

arch/csr/dcsr.yaml

Lines changed: 42 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -127,34 +127,70 @@ fields:
127127
reset_value: 0
128128
STEPIE:
129129
location: 11
130-
type: RW
131130
description: |
132131
0 (interrupts disabled):: Interrupts (including NMI) are disabled during single stepping with step set.
133132
This value should be supported.
134133
1 (interrupts enabled):: Interrupts (including NMI) are enabled during single stepping with step set.
135134
Implementations may hard wire this bit to 0. In that case interrupt behavior can be emulated by the
136135
debugger. The debugger must not change the value of this bit while the hart is running.
137-
reset_value: 0
136+
type(): |
137+
if (DCSR_STEPIE_TYPE == "tied-to-0" || DCSR_STEPIE_TYPE == "tied-to-1") {
138+
return CsrFieldType::RO;
139+
} else if (DCSR_STEPIE_TYPE == "rw") {
140+
return CsrFieldType::RW;
141+
}
142+
reset_value(): |
143+
if (DCSR_STEPIE_TYPE == "tied-to-0") {
144+
return 0;
145+
} else if (DCSR_STEPIE_TYPE == "tied-to-1") {
146+
return 1;
147+
} else if (DCSR_STEPIE_TYPE == "rw") {
148+
return UNDEFINED_LEGAL;
149+
}
138150
STOPCOUNT:
139151
location: 10
140-
type: RW
141152
description: |
142153
0 (normal):: Increment counters as usual.
143154
1 (freeze):: Don’t increment any hart-local counters while in Debug Mode or on ebreak instructions
144155
that cause entry into Debug Mode. These counters include the instret CSR. On single-hart cores cycle
145156
should be stopped, but on multi-hart cores it must keep incrementing.
146157
An implementation may hardwire this bit to 0 or 1.
147-
reset_value: UNDEFINED_LEGAL
158+
type(): |
159+
if (DCSR_STOPCOUNT_TYPE == "tied-to-0" || DCSR_STOPCOUNT_TYPE == "tied-to-1") {
160+
return CsrFieldType::RO;
161+
} else if (DCSR_STOPCOUNT_TYPE == "rw") {
162+
return CsrFieldType::RW;
163+
}
164+
reset_value(): |
165+
if (DCSR_STOPCOUNT_TYPE == "tied-to-0") {
166+
return 0;
167+
} else if (DCSR_STOPCOUNT_TYPE == "tied-to-1") {
168+
return 1;
169+
} else if (DCSR_STOPCOUNT_TYPE == "rw") {
170+
return UNDEFINED_LEGAL;
171+
}
148172
STOPTIME:
149173
location: 9
150-
type: RW
151174
description: |
152175
0 (normal):: time continues to reflect mtime.
153176
1 (freeze):: time is frozen at the time that Debug Mode was entered. When leaving Debug Mode,
154177
time will reflect the latest value of mtime again.
155178
While all harts have stoptime=1 and are in Debug Mode, mtime is allowed to stop incrementing.
156179
An implementation may hardwire this bit to 0 or 1.
157-
reset_value: UNDEFINED_LEGAL
180+
type(): |
181+
if (DCSR_STOPTIME_TYPE == "tied-to-0" || DCSR_STOPTIME_TYPE == "tied-to-1") {
182+
return CsrFieldType::RO;
183+
} else if (DCSR_STOPTIME_TYPE == "rw") {
184+
return CsrFieldType::RW;
185+
}
186+
reset_value(): |
187+
if (DCSR_STOPTIME_TYPE == "tied-to-0") {
188+
return 0;
189+
} else if (DCSR_STOPTIME_TYPE == "tied-to-1") {
190+
return 1;
191+
} else if (DCSR_STOPTIME_TYPE == "rw") {
192+
return UNDEFINED_LEGAL;
193+
}
158194
CAUSE:
159195
location: 8-6
160196
type: RO

arch/ext/Sdext.yaml

Lines changed: 37 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ type: privileged
1010
versions:
1111
- version: "1.0.0"
1212
state: ratified
13-
ratification_date: null
13+
ratification_date: 2025-02
1414
params:
1515
DCSR_MPRVEN_TYPE:
1616
schema:
@@ -24,3 +24,39 @@ params:
2424
* 'tied-to-0': tied to 0
2525
* 'tied-to-1': tied to 1
2626
* 'rw': read-write
27+
DCSR_STEPIE_TYPE:
28+
schema:
29+
type: string
30+
enum: [tied-to-0, tied-to-1, rw]
31+
description: |
32+
Implementation of dcsr.STEPIE is optional.
33+
It may be tied to either 0 or 1.
34+
35+
Behavior of the dcsr.STEPIE bit:
36+
* 'tied-to-0': tied to 0
37+
* 'tied-to-1': tied to 1
38+
* 'rw': read-write
39+
DCSR_STOPCOUNT_TYPE:
40+
schema:
41+
type: string
42+
enum: [tied-to-0, tied-to-1, rw]
43+
description: |
44+
Implementation of dcsr.STOPCOUNT is optional.
45+
It may be tied to either 0 or 1.
46+
47+
Behavior of the dcsr.STOPCOUNT bit:
48+
* 'tied-to-0': tied to 0
49+
* 'tied-to-1': tied to 1
50+
* 'rw': read-write
51+
DCSR_STOPTIME_TYPE:
52+
schema:
53+
type: string
54+
enum: [tied-to-0, tied-to-1, rw]
55+
description: |
56+
Implementation of dcsr.STOPTIME is optional.
57+
It may be tied to either 0 or 1.
58+
59+
Behavior of the dcsr.STOPTIME bit:
60+
* 'tied-to-0': tied to 0
61+
* 'tied-to-1': tied to 1
62+
* 'rw': read-write

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