ISS running riscv-tests; most instructions pass, couple bugs left

Author: Derek Hower

.devcontainer/Dockerfile

@@ -24,6 +24,7 @@ RUN apt-get install -y --no-install-recommends g++
 RUN apt-get install -y --no-install-recommends clang-format
 RUN apt-get install -y --no-install-recommends clang-tidy
 RUN apt-get install -y --no-install-recommends libelf-dev
+RUN apt-get install -y --no-install-recommends gcc-riscv64-unknown-elf
 RUN apt-get clean autoclean
 RUN apt-get autoremove -y
 RUN rm -rf /var/lib/{apt,dpkg,cache,log}/*

.gitmodules

@@ -7,3 +7,6 @@
 [submodule "ext/riscv-isa-manual"]
 	path = ext/riscv-isa-manual
 	url = https://github.com/riscv/riscv-isa-manual
+[submodule "ext/riscv-tests"]
+	path = ext/riscv-tests
+	url = https://github.com/riscv-software-src/riscv-tests.git

arch/ext/S.yaml

@@ -72,6 +72,31 @@ params:
     extra_validation: |
       assert SXLEN == 32 if XLEN == 32
       assert (SXLEN != 32) if UXLEN != 32
+  REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT:
+    description: |
+      When true, `mtval` is written with the virtual address of a load when it causes a
+      `LoadPageFault`.
+
+      WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`.
+    schema:
+      type: boolean
+  REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT:
+    description: |
+      When true, `mtval` is written with the virtual address of a store when it causes a
+      `StoreAmoPageFault`.
+
+      WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`.
+    schema:
+      type: boolean
+  REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT:
+    description: |
+      When true, `mtval` is written with the virtual PC of an instructino when fetch causes an
+      `InstructionPageFault`.
+
+      WHen false, `mtval` is written with 0 when an instruction fetch causes an
+      `InstructionPageFault`.
+    schema:
+      type: boolean
   REPORT_VA_IN_STVAL_ON_BREAKPOINT:
     description: |
       When true, `stval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`).

arch/ext/Sm.yaml

@@ -377,31 +377,6 @@ params:
       `InstructionAccessFault`.
     schema:
       type: boolean
-  REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT:
-    description: |
-      When true, `mtval` is written with the virtual address of a load when it causes a
-      `LoadPageFault`.
-
-      WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`.
-    schema:
-      type: boolean
-  REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT:
-    description: |
-      When true, `mtval` is written with the virtual address of a store when it causes a
-      `StoreAmoPageFault`.
-
-      WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`.
-    schema:
-      type: boolean
-  REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT:
-    description: |
-      When true, `mtval` is written with the virtual PC of an instructino when fetch causes an
-      `InstructionPageFault`.
-
-      WHen false, `mtval` is written with 0 when an instruction fetch causes an
-      `InstructionPageFault`.
-    schema:
-      type: boolean
   REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION:
     description: |
       When true, `mtval` is written with the encoding of an instruction that causes an

arch/inst/I/addi.yaml

@@ -22,7 +22,7 @@ access:
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = X[rs1] + imm;
+operation(): X[rd] = X[rs1] + $signed(imm);
 
 sail(): |
   {

arch/inst/I/andi.yaml

@@ -22,7 +22,7 @@ access:
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = X[rs1] & imm;
+operation(): X[rd] = X[rs1] & $signed(imm);
 
 sail(): |
   {

arch/inst/I/auipc.yaml

@@ -23,7 +23,7 @@ access:
   vs: always
   vu: always
 data_independent_timing: true
-operation(): X[rd] = $pc + imm;
+operation(): X[rd] = $pc + $signed(imm);
 
 sail(): |
   {

arch/inst/I/beq.yaml

@@ -31,7 +31,7 @@ operation(): |
   XReg rhs = X[rs2];
 
   if (lhs == rhs) {
-    jump_halfword($pc + imm);
+    jump_halfword($pc + $signed(imm));
   }
 
 sail(): |

arch/inst/I/bge.yaml

@@ -31,7 +31,7 @@ operation(): |
   XReg rhs = X[rs2];
 
   if ($signed(lhs) >= $signed(rhs)) {
-    jump_halfword($pc + imm);
+    jump_halfword($pc + $signed(imm));
   }
 
 sail(): |

arch/inst/I/bgeu.yaml

@@ -31,7 +31,7 @@ operation(): |
   XReg rhs = X[rs2];
 
   if (lhs >= rhs) {
-    jump_halfword($pc + imm);
+    jump_halfword($pc + $signed(imm));
   }
 
 sail(): |