Merge branch 'main' into main

Author: dhower-qc

arch/inst/A/lr.w.yaml

@@ -45,7 +45,8 @@ lr.w:
      Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
      LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
      with both bits clear, but may result in lower performance.
-  definedBy: A
+  definedBy:
+    anyOf: [A, Zalrsc]
   assembly: xd, xs1
   encoding:
     match: 00010--00000-----010-----0101111

arch/inst/A/sc.d.yaml

@@ -96,7 +96,8 @@ sc.d:
     Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
     LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
     with both bits clear, but may result in lower performance.
-  definedBy: A
+  definedBy:
+    anyOf: [A, Zalrsc]
   assembly: xd, xs2, xs1
   encoding:
     match: 00011------------011-----0101111

arch/inst/A/sc.w.yaml

@@ -102,7 +102,8 @@ sc.w:
     Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
     LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
     with both bits clear, but may result in lower performance.
-  definedBy: A
+  definedBy:
+    anyOf: [A, Zalrsc]
   assembly: xd, xs2, xs1
   encoding:
     match: 00011------------010-----0101111

arch/inst/B/andn.yaml

@@ -6,7 +6,7 @@ andn:
     This instruction performs the bitwise logical AND operation between `rs1` and the
     bitwise inversion of `rs2`.
   definedBy:
-    anyOf: [B, Zbb]
+    anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0100000----------111-----0110011

arch/inst/B/clmul.yaml

@@ -5,7 +5,7 @@ clmul:
   description: |
     `clmul` produces the lower half of the 2*XLEN carry-less product
   definedBy:
-    anyOf: [B, Zbc]
+    anyOf: [B, Zbc, Zbkc, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0000101----------001-----0110011

arch/inst/B/clmulh.yaml

@@ -5,7 +5,7 @@ clmulh:
   description: |
     `clmulh` produces the upper half of the 2*XLEN carry-less product
   definedBy:
-    anyOf: [B, Zbc]
+    anyOf: [B, Zbc, Zbkc, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0000101----------011-----0110011

arch/inst/B/orn.yaml

@@ -5,7 +5,7 @@ orn:
   description: |
     This instruction performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
   definedBy:
-    anyOf: [B, Zbb, Zbkb]
+    anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0100000----------110-----0110011

arch/inst/B/rol.yaml

@@ -5,7 +5,7 @@ rol:
   description: |
     This instruction performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
   definedBy:
-    anyOf: [B, Zbb, Zbkb]
+    anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0110000----------001-----0110011

arch/inst/B/rolw.yaml

@@ -6,7 +6,7 @@ rolw:
     This instruction performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2.
     The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
   definedBy:
-    anyOf: [B, Zbb, Zbkb]
+    anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   base: 64
   encoding:

arch/inst/B/ror.yaml

@@ -5,7 +5,7 @@ ror:
   description: |
     This instruction performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
   definedBy:
-    anyOf: [B, Zbb, Zbkb]
+    anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
   assembly: xd, xs1, xs2
   encoding:
     match: 0110000----------101-----0110011