Change several CSRs from unspecified base to base: 32 to comply with the spec. This is required for several use cases like Go risc-v support which relies only on 64-bit spec, thus being able to filter rv32 CSRs is mandatory. (#532)

AFOliveira · dhower-qc · web-flow · commit ed76b6a90635 · 2025-03-26T15:13:34.000Z
Signed-off-by: Afonso Oliveira &lt;Afonso.Oliveira@synopsys.com&gt;
Co-authored-by: Derek Hower &lt;134728312+dhower-qc@users.noreply.github.com&gt;
diff --git a/arch/csr/H/henvcfgh.yaml b/arch/csr/H/henvcfgh.yaml
@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: henvcfgh
 address: 0x61A
+base: 32
 long_name: most-significant 32 bits of Hypervisor Environment Configuration
 description: |
   The henvcfgh CSR is a 32-bit read/write register for the most-significant 32 bits of `henvcfg`.
diff --git a/arch/csr/Zihpm/hpmcounter10h.yaml b/arch/csr/Zihpm/hpmcounter10h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter10h
 long_name: User-mode Hardware Performance Counter 7, high half
 address: 0xC8A
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter10h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter11h.yaml b/arch/csr/Zihpm/hpmcounter11h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter11h
 long_name: User-mode Hardware Performance Counter 8, high half
 address: 0xC8B
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter11h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter12h.yaml b/arch/csr/Zihpm/hpmcounter12h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter12h
 long_name: User-mode Hardware Performance Counter 9, high half
 address: 0xC8C
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter12h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter13h.yaml b/arch/csr/Zihpm/hpmcounter13h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter13h
 long_name: User-mode Hardware Performance Counter 10, high half
 address: 0xC8D
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter13h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter14h.yaml b/arch/csr/Zihpm/hpmcounter14h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter14h
 long_name: User-mode Hardware Performance Counter 11, high half
 address: 0xC8E
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter14h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter15h.yaml b/arch/csr/Zihpm/hpmcounter15h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter15h
 long_name: User-mode Hardware Performance Counter 12, high half
 address: 0xC8F
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter15h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter16h.yaml b/arch/csr/Zihpm/hpmcounter16h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter16h
 long_name: User-mode Hardware Performance Counter 13, high half
 address: 0xC90
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter16h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter17h.yaml b/arch/csr/Zihpm/hpmcounter17h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter17h
 long_name: User-mode Hardware Performance Counter 14, high half
 address: 0xC91
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter17h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter18h.yaml b/arch/csr/Zihpm/hpmcounter18h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter18h
 long_name: User-mode Hardware Performance Counter 15, high half
 address: 0xC92
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter18h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter19h.yaml b/arch/csr/Zihpm/hpmcounter19h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter19h
 long_name: User-mode Hardware Performance Counter 16, high half
 address: 0xC93
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter19h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter20h.yaml b/arch/csr/Zihpm/hpmcounter20h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter20h
 long_name: User-mode Hardware Performance Counter 17, high half
 address: 0xC94
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter20h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter21h.yaml b/arch/csr/Zihpm/hpmcounter21h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter21h
 long_name: User-mode Hardware Performance Counter 18, high half
 address: 0xC95
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter21h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter22h.yaml b/arch/csr/Zihpm/hpmcounter22h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter22h
 long_name: User-mode Hardware Performance Counter 19, high half
 address: 0xC96
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter22h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter23h.yaml b/arch/csr/Zihpm/hpmcounter23h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter23h
 long_name: User-mode Hardware Performance Counter 20, high half
 address: 0xC97
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter23h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter24h.yaml b/arch/csr/Zihpm/hpmcounter24h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter24h
 long_name: User-mode Hardware Performance Counter 21, high half
 address: 0xC98
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter24h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter25h.yaml b/arch/csr/Zihpm/hpmcounter25h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter25h
 long_name: User-mode Hardware Performance Counter 22, high half
 address: 0xC99
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter25h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter26h.yaml b/arch/csr/Zihpm/hpmcounter26h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter26h
 long_name: User-mode Hardware Performance Counter 23, high half
 address: 0xC9A
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter26h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter27h.yaml b/arch/csr/Zihpm/hpmcounter27h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter27h
 long_name: User-mode Hardware Performance Counter 24, high half
 address: 0xC9B
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter27h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter28h.yaml b/arch/csr/Zihpm/hpmcounter28h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter28h
 long_name: User-mode Hardware Performance Counter 25, high half
 address: 0xC9C
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter28h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter29h.yaml b/arch/csr/Zihpm/hpmcounter29h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter29h
 long_name: User-mode Hardware Performance Counter 26, high half
 address: 0xC9D
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter29h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter30h.yaml b/arch/csr/Zihpm/hpmcounter30h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter30h
 long_name: User-mode Hardware Performance Counter 27, high half
 address: 0xC9E
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter30h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter31h.yaml b/arch/csr/Zihpm/hpmcounter31h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter31h
 long_name: User-mode Hardware Performance Counter 28, high half
 address: 0xC9F
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter31h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter3h.yaml b/arch/csr/Zihpm/hpmcounter3h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter3h
 long_name: User-mode Hardware Performance Counter 0, high half
 address: 0xC83
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter3h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter4h.yaml b/arch/csr/Zihpm/hpmcounter4h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter4h
 long_name: User-mode Hardware Performance Counter 1, high half
 address: 0xC84
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter4h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter5h.yaml b/arch/csr/Zihpm/hpmcounter5h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter5h
 long_name: User-mode Hardware Performance Counter 2, high half
 address: 0xC85
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter5h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter6h.yaml b/arch/csr/Zihpm/hpmcounter6h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter6h
 long_name: User-mode Hardware Performance Counter 3, high half
 address: 0xC86
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter6h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter7h.yaml b/arch/csr/Zihpm/hpmcounter7h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter7h
 long_name: User-mode Hardware Performance Counter 4, high half
 address: 0xC87
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter7h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter8h.yaml b/arch/csr/Zihpm/hpmcounter8h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter8h
 long_name: User-mode Hardware Performance Counter 5, high half
 address: 0xC88
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter8h`.
 
diff --git a/arch/csr/Zihpm/hpmcounter9h.yaml b/arch/csr/Zihpm/hpmcounter9h.yaml
@@ -7,6 +7,7 @@ kind: csr
 name: hpmcounter9h
 long_name: User-mode Hardware Performance Counter 6, high half
 address: 0xC89
+base: 32
 description: |
   Alias for M-mode CSR `mhpmcounter9h`.
 
diff --git a/arch/csr/menvcfgh.yaml b/arch/csr/menvcfgh.yaml
@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: menvcfgh
 address: 0x31A
+base: 32
 long_name: Machine Environment Configuration
 description: Contains bits to enable/disable extensions
 priv_mode: M
diff --git a/arch/csr/mseccfgh.yaml b/arch/csr/mseccfgh.yaml
@@ -4,6 +4,7 @@ $schema: "csr_schema.json#"
 kind: csr
 name: mseccfgh
 long_name: Most significant 32 bits of Machine Security Configuration
+base: 32
 address: 0x757
 priv_mode: M
 length: 32
diff --git a/arch/csr/timeh.yaml b/arch/csr/timeh.yaml
@@ -5,6 +5,7 @@ kind: csr
 name: timeh
 long_name: High-half timer for RDTIME Instruction
 address: 0xC81
+base: 32
 description: |
   [when,"TIME_CSR_IMPLEMENTED == false"]
   This CSR does not exist, and access will cause an IllegalInstruction exception.
