Change Zicntr in MC100 from mandatory to optional since it is now just "recommended"

[james-ball-qualcomm]

Some small microcontrollers don't spend the area to implement Zicntr and so our MC100 certificate which is intended to be suitable for the smallest microcontrollers needs to change it from mandatory to optional.

Discussed in Requirements WG in https://lists.riscv.org/g/csc-requirements/topic/116005126

[ThinkOpenly]

Reading the linked discussion, I don't see any closure other than a reference to "Allen said so". Is there some reasonably official reference for the change?

[james-ball-qualcomm]

@allenjbaum , is there a GitHub issue in the ISA manual repo related to this change? That would be ideal to track this.

[james-ball-qualcomm]

Or an older "published" version of the ISA manual that has it as mandatory because it is "recommended" now.

[allenjbaum]

The latter. Originally, there was no zicntr extension at all.

…

On Wed, Oct 29, 2025 at 9:40 AM james-ball-qualcomm < ***@***.***> wrote: *james-ball-qualcomm* left a comment (riscv-software-src/riscv-unified-db#1216) <#1216 (comment)> Or an older "published" version of the ISA manual that has it as mandatory because it is "recommended" now. — Reply to this email directly, view it on GitHub <#1216 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AHPXVJQYQBFRQPNHYLSHKVT32DUXXAVCNFSM6AAAAACKSGBR3WVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZTINRSGU4TINBVGM> . You are receiving this because you were mentioned.Message ID: ***@***.***>