Add a generator for QEMU

[AnimeshAgarwal28]

Is your feature request related to a problem? Please describe.

QEMU carries large, hand-maintained instruction maps (insn32.decode, instmap.h), dozens of insn_trans/trans_*.c.inc files), CSR tables (cpu_bits.h), disassembler tables in riscv.c, plus related headers and XML descriptions (disas/riscv-xthead.h, gdb-xml/riscv-*.xml). New extensions need manual maintenance of QEMU.

Describe the solution you'd like

Start by partially generating these files, for instance opcodes table in riscv.c (some code from #1072 can possibly be borrowed). List down what is feasible right now to be generated (and what information is missing from UDB).