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@ayosher ayosher commented Mar 31, 2025

changes:
- Fix IDL code sign extension logic for qc.e.lb and qc.e.lh instructions
- Fix IDL code sign extension logic for qc.ext and qc.extd instructions
- Fix IDL code sign extension logic for qc.extdpr, qc.extdprh and qc.extdr instructions
- Fix IDL code and description increasing shift to 6 bit for qc.extdr and qc.extdur instructions
- Fix IDL code and description increasing shift to 6 bit for qc.extdpr and qc.extdprh instructions
- Fix IDL code and description increasing shift to 6 bit for qc.extdupr and qc.extduprh instructions
- Fix IDL code sign extension logic for qc.lieq instruction
- Fix wrong mantissa bit selection in qc.norm, qc.normu and qc.normeu instructions
- Fix wrong exponent calculation in qc.normeu instruction
- Fix IDL code and description of qc.setwm instruction to state that number of words written 0..31.
- Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mret and qc.c.mnret instructions

ayosher added 6 commits April 2, 2025 13:10
… for several instructions: qc.e.lb,qc.e.lh,qc.ext,qc.extd,qc.extdpr,qc.extdprh,qc.extdr,qc.lieq

Signed-off-by: Albert Yosher <[email protected]>
…t to 6 bit for all dual-register bitfield extraction instructions, where shift and width of bitfield are in register

Signed-off-by: Albert Yosher <[email protected]>
… qc.normu and qc.normeu instructions

Signed-off-by: Albert Yosher <[email protected]>
…struction to state that number of words written 0..31.

Signed-off-by: Albert Yosher <[email protected]>
…ompatibility for qc.c.mret and qc.c.mnret instructions

Signed-off-by: Albert Yosher <[email protected]>
@ayosher ayosher changed the title [WIP] Xqci Extension v0.9 Xqci Extension v0.9 Apr 2, 2025
@ayosher ayosher added this pull request to the merge queue Apr 3, 2025
Merged via the queue into main with commit e41d001 Apr 3, 2025
14 checks passed
@ayosher ayosher deleted the Xqciv0p9 branch April 3, 2025 18:59
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3 participants