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Description
The reason use t2 rather than t1 is it could prevent disturb PLT too much - so t2 is better choice than t1 - however I found we need to defined new PLT stub, also tweak little bit for _dl_runtime_resolve[2] - so it already need to adjust few things.
PLT already need to define new stubs sequence, and _dl_runtime_resolve also need to update too, so the reason using t2 is not really so strong, BUT the price is we need to change the expansion of tail, which is make assembler inconsistently here.
Also we found that may cause more problem than our expect on using t2 (riscv-non-isa/riscv-elf-psabi-doc#425 (comment)) at psABI PR.
So again, I think we should reconsider using t1 rather than t2 for landing pad label register - also I believe it's not big disturb to the ISA spec itself.
[1] #125 (comment)
[2] sifive/riscv-glibc@4d237e2
[3] riscv-non-isa/riscv-asm-manual#93