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changelog.adoc

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[preface]
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== Change Log
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=== version 1.0.0_rc1
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* 2022-4-16
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** The pre-public review version
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=== version 1.0.0_rc3
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* 2022-6-11
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** Revised Copyright and license information
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** Added Andrew Waterman and Krste Asanovic as contributors who did
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the original design and wrote the spec.
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=== version 1.0.0_rc2
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* 2022-5-30
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** Revised the copyright statements to follow section 3.3 in Appendix
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A "INTELLECTUAL PROPERTY RIGHTS POLICY " of the RISC-V Regulations.
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** Correct offsets of PLIC Interrupt Enable Bits memory map.
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=== version 1.0.0_rc1
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* 2022-4-16
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** The pre-public review version
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contributor.adoc

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[Preface]
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== Contributors
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This RISC-V specification has been contributed to directly or indirectly by: +
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The contributor to RISC-V PLIC specification in alphabetical order: +
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Abner Chang <abner.chang@hpe.com> +
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Andrew Waterman <andrew@sifive.com> +
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Robert Balas <balasr@iis.ee.ethz.ch> +
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Drew Barbier <drew@sifive.com> +
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Jeff Scheel <jeff@riscv.org> +
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Jessica Clarke <jrtc27@jrtc27.com> +
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Krste Asanovic <krste@sifive.com> +
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Palmer Dabbelt <palmer@dabbelt.com> +
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Yan <phantom@zju.edu.cn>

licensing.adoc

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[Preface]
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== Copyright and license information
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This RISC-V PLIC specification is
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This RISC-V PLIC specification is © 2017-2022 RISC-V international
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© 2017-2022 RISC-V International
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It is licensed under the Creative Commons Attribution 4.0 International License
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(CC-BY 4.0). The full license text is available at
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This document is released under a Creative Commons Attribution 4.0
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International License. +
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https://creativecommons.org/licenses/by/4.0/.
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Please cite as: “RISC-V Platform-Level Interrupt Controller Specification", RISC-V International
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This document is a derivative of the "The RISC-V Instruction Set Manual, Volume II: Privileged Architecture, Document
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version 1.9.1" released under following license: © 2010–2017 Andrew Waterman,
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Yunsup Lee, Rimas Aviˇzienis, David Patterson, Krste Asanovi ́c.
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Creative Commons Attribution 4.0 International License.
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riscv-plic.adoc

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:description: RISC-V PLIC Specification
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:company: RISC-V.org
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:revdate: 05/2022
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:revnumber: 1.0.0_rc2
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:revdate: 06/2022
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:revnumber: 1.0.0_rc3
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:revremark: This document is in development. Assume everything can change. See http://riscv.org/spec-state for details.
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:url-riscv: http://riscv.org
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:doctype: book

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