From PR #1236:
We eventually need to handle this:
Restricted views of the mip and mie registers appear as the sip and sie registers for supervisor level. If an interrupt is delegated to S-mode by setting a bit in the mideleg register, it becomes visible in the sip register and is maskable using the sie register. Otherwise, the corresponding bits in sip and sie are read�only zero.
I see that as needing "sw_write()" and "sw_read()" methods for each field in sie.
Originally posted by @ThinkOpenly in #1236 (comment)