Update Linux image

Author: Tim Hutt

os-boot/README.md

@@ -1,58 +1,21 @@
 # Booting OS images
 
-The Sail model implements a very simple platform based on the one
-implemented by the Spike reference simulator. It implements a console
-output port similar to Spike's HTIF (host-target interface) mechanism,
-and an interrupt controller based on Spike's CLINT (core-local
-interrupt controller). Console input is not currently supported.
+The Sail model implements a very simple platform based on the one implemented by the Spike reference simulator. It implements Spike's HTIF (Host-Target Interface) which allows console output, and an interrupt controller based on Spike's CLINT (core-local interrupt controller). Console input is not currently supported.
 
-32-bit OS boots require a workaround for the 64-bit HTIF interface,
-which is currently not supported.
+32-bit OS boots require a workaround for the 64-bit HTIF interface, which is currently not supported.
 
-OS boots use device-tree binary blobs generated by the `dtc` compiler,
-installable on Ubuntu and Debian machines with
+## Build your own ELF
 
-```
-sudo apt install device-tree-compiler
+```bash
+make -C linux -j4
 ```
 
-## Booting Linux with the C backend
+This will generate `os-boot/linux/build/fw_payload.elf`.
 
-The C model needs an ELF-version of the BBL (Berkeley-Boot-Loader)
-that contains the Linux kernel as an embedded payload. It also needs
-a DTB (device-tree blob) file describing the platform (say in the file
-`spike.dtb`). Once those are available (see below for suggestions),
-the model should be run as:
+### Boot ELF
 
+```bash
+make -C linux sail
 ```
-$ ./c_emulator/sail_riscv_sim -t console.log -b spike.dtb bbl > execution-trace.log 2>&1 &
-$ tail -f console.log
-```
-
-The `console.log` file contains the console boot messages. For maximum
-performance and benchmarking a model without any execution tracing is
-available on the optimize branch (`git checkout optimize`) of this
-repository. This currently requires the latest Sail built from source.
-
-## Caveats for OS boot
-
-- Some OS toolchains generate obsolete LR/SC instructions with now
-  illegal combinations of `.aq` and `.rl` flags. You can work-around
-  this by changing `riscv_mem.sail` to accept these flags.
 
-- One needs to manually ensure that the DTB used for the C model
-  accurately describes the physical memory map implemented in the C
-  platform. This will not be needed once the C model can generate its
-  own DTB.
-
-## Sample Linux image
-
-`rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl` contains a sample Linux RV64
-image that can be booted as follows, after first generating the
-device-tree blob for a 64MB RV64 machine using `dtc`:
-
-```
-dtc < os-boot/rv64-64mb.dts > os-boot/rv64-64mb.dtb
-./c_emulator/sail_riscv_sim -b os-boot/rv64-64mb.dtb -t /tmp/console.log os-boot/rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl > >(gzip -c > execution-trace.log.gz) 2>&1
-tail -f /tmp/console.log
-```
+You should see the OpenSBI banner after a few seconds. Eventually it will crash when it fails to find an `init` process which the image does not currently include.

os-boot/freebsd-rv64.bbl

@@ -0,0 +1,2 @@
+/build
+/downloads

os-boot/image-notes.txt

@@ -0,0 +1,104 @@
+##### Compilation #####
+
+RISCV_COMPILER_PREFIX := riscv64-buildroot-linux-gnu-
+
+# This is the final bootable OpenSBI + Linux image.
+elf := build/fw_payload.elf
+
+.PHONY: all
+all: $(elf)
+
+# Generic rule to download tools.
+downloads/%.tar.xz: %.url
+	mkdir -p downloads
+	curl --location '$(shell cat $<)' --output $@
+
+# Rules to extract tools. For simplicity we strip the first directory component because it varies.
+build/gcc/bin/$(RISCV_COMPILER_PREFIX)gcc: downloads/gcc.tar.xz
+	mkdir -p build/gcc
+	tar --touch --directory build/gcc --strip-components=1 --extract --file downloads/gcc.tar.xz
+
+build/linux/Makefile: downloads/linux.tar.xz
+	mkdir -p build/linux
+	tar --touch --directory build/linux --strip-components=1 --extract --file downloads/linux.tar.xz
+
+build/opensbi/Makefile: downloads/opensbi.tar.xz
+	mkdir -p build/opensbi
+	tar --touch --directory build/opensbi --strip-components=1 --extract --file downloads/opensbi.tar.xz
+
+CROSS_COMPILE := $(shell pwd)/build/gcc/bin/$(RISCV_COMPILER_PREFIX)
+
+# Rule to build the Linux kernel.
+build/linux/arch/riscv/boot/Image: build/linux/Makefile build/gcc/bin/$(RISCV_COMPILER_PREFIX)gcc
+	$(MAKE) -C build/linux CROSS_COMPILE=$(CROSS_COMPILE) ARCH=riscv defconfig
+	$(MAKE) -C build/linux CROSS_COMPILE=$(CROSS_COMPILE) CONFIG_HVC_RISCV_SBI=y ARCH=riscv Image
+
+# Rule to build OpenSBI, with the Linux kernel embedded in it.
+#
+# FW_TEXT_START is 0 by default which doesn't leave space for the emulator bootloader.
+# 0x80000000 is the default start of Spike's memory.
+$(elf): build/opensbi/Makefile build/linux/arch/riscv/boot/Image build/gcc/bin/$(RISCV_COMPILER_PREFIX)gcc
+	$(MAKE) -C build/opensbi FW_TEXT_START=0x80000000 FW_PAYLOAD=y FW_PAYLOAD_PATH=../linux/arch/riscv/boot/Image PLATFORM=generic CROSS_COMPILE=$(CROSS_COMPILE)
+	cp build/opensbi/build/platform/generic/firmware/fw_payload.elf $(elf)
+
+# Path to Sail emulator.
+SAIL_SIM ?= ../../build/c_emulator/sail_riscv_sim
+
+build/sail.dts: $(SAIL_SIM)
+	mkdir -p build
+	$(SAIL_SIM) --print-device-tree >$@
+
+build/sail.dtb: build/sail.dts
+	mkdir -p build
+	dtc $< -o $@
+
+.PHONY: clean
+clean:
+	rm -rf build
+
+.PHONY: distclean
+distclean:
+	rm -rf build
+	rm -rf downloads
+
+##### Running #####
+
+# Number of instructions to run. The image does not include userspace; there
+# is no 'init' available, so it will crash at that point. It takes about
+# 200 million instructions to get to that point. Execution speed is around
+# 300 kIPS so it takes around 10 minutes. Spike and QEMU are much faster.
+LIMIT_INSTRUCTIONS := 20000000
+
+# Run with the Sail emulator from this repo.
+.PHONY: sail
+sail: build/sail.dtb $(elf) $(SAIL_SIM)
+	$(SAIL_SIM) --no-trace -p -l $(LIMIT_INSTRUCTIONS) --device-tree-blob build/sail.dtb $(elf)
+
+# Run the profiler. This requires gperftools and pprof:
+#
+#     git clone https://github.com/gperftools/gperftools
+#     cd gperftools
+#     # There's CMake support but unfortunately it's broken.
+#     # See https://github.com/gperftools/gperftools/issues/1576
+#     ./autogen.sh
+#     ./configure
+#     make -j4
+#     sudo make install
+#
+#     go install github.com/google/pprof@latest
+#
+.PHONY: sail_profile
+sail_profile: build/sail.dtb $(elf) $(SAIL_SIM)
+	rm -f build/prof.out
+	CPUPROFILE=build/prof.out LD_PRELOAD=/usr/local/lib/libtcmalloc_and_profiler.so $(SAIL_SIM) --no-trace -p -l 2000000 --device-tree-blob build/sail.dtb $(elf)
+	pprof -http : build/prof.out
+
+# Run with Spike: https://github.com/riscv-software-src/riscv-isa-sim
+.PHONY: spike
+spike: $(elf)
+	spike --instructions=$(LIMIT_INSTRUCTIONS) $(elf)
+
+# Run with QEMU.
+.PHONY: qemu
+qemu: $(elf)
+	qemu-system-riscv64 -M virt -m 256M -nographic -bios $(elf)

os-boot/linux-rv64-64mb.bbl

@@ -0,0 +1 @@
+https://toolchains.bootlin.com/downloads/releases/toolchains/riscv64-lp64d/tarballs/riscv64-lp64d--glibc--stable-2024.05-1.tar.xz

os-boot/linux/.gitignore

@@ -0,0 +1 @@
+https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-6.14.4.tar.xz

os-boot/linux/Makefile

@@ -0,0 +1 @@
+https://github.com/riscv-software-src/opensbi/archive/refs/tags/v1.6.tar.gz