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Move to new os-boot with Makefile and CI.
 Fix #580 Signed-off-by: Ariel Xiong <ArielHeleneto@outlook.com>
1 parent da6f449 commit d66a750

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‎.github/workflows/linux.yml‎

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name: Build Linux and openSBI in os-boot
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permissions:
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id-token: write
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attestations: write
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contents: read
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on:
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push:
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paths:
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- ".github/workflows/linux.yml"
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- "os-boot/linux/**"
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pull_request:
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paths:
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- ".github/workflows/linux.yml"
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- "os-boot/linux/**"
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workflow_dispatch:
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jobs:
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build:
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runs-on: ubuntu-latest
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steps:
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- name: Install packages
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run: sudo apt install -y build-essential curl
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- name: Check out repository code
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uses: actions/checkout@v4
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- name: Cache Sources
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uses: actions/cache@v4
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with:
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key: ${{ hashFiles('os-boot/linux/Makefile') }}
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path: os-boot/linux/src/*.tar.xz
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- name: Make ELF
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working-directory: os-boot/linux
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run: make -j$(nproc)
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- name: Upload ELF
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uses: actions/upload-artifact@v4
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id: upload
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with:
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name: os-boot-${{ github.run_id }}
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path: os-boot/linux/build/fw_payload.elf
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- name: Generate Artifact Attestation
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if: github.event_name != 'pull_request'
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uses: actions/attest-build-provenance@v2
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id: attest
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with:
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subject-path: os-boot/linux/build/fw_payload.elf
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show-summary: false
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- name: Upload Paper Work
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working-directory: os-boot
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env:
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ELFURL: ${{ steps.upload.outputs.artifact-url }}
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ATTESTURL: ${{ steps.attest.outputs.attestation-url }}
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run: |
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echo "# os-boot ELF" >> $GITHUB_STEP_SUMMARY
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echo "" >> $GITHUB_STEP_SUMMARY
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echo "The generated [ELF file]("$ELFURL") can be verified from [here]("$ATTESTURL")." >> $GITHUB_STEP_SUMMARY
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echo "" >> $GITHUB_STEP_SUMMARY
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echo "## Header" >> $GITHUB_STEP_SUMMARY
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echo "" >> $GITHUB_STEP_SUMMARY
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echo "\`\`\`" >> $GITHUB_STEP_SUMMARY
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readelf -h linux/build/fw_payload.elf >> $GITHUB_STEP_SUMMARY
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echo "\`\`\`" >> $GITHUB_STEP_SUMMARY
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echo "" >> $GITHUB_STEP_SUMMARY

‎os-boot/README.md‎

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32-bit OS boots require a workaround for the 64-bit HTIF interface,
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which is currently not supported.
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OS boots use device-tree binary blobs generated by the `dtc` compiler,
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installable on Ubuntu and Debian machines with
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## Build your own ELF
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```
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sudo apt install device-tree-compiler
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```bash
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make -C os-boot
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```
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## Booting Linux with the C backend
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This will generate `os-boot/build/platform/generic/firmware/fw_payload.elf`.
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The C model needs an ELF-version of the BBL (Berkeley-Boot-Loader)
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that contains the Linux kernel as an embedded payload. It also needs
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a DTB (device-tree blob) file describing the platform (say in the file
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`spike.dtb`). Once those are available (see below for suggestions),
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the model should be run as:
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### Boot ELF
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```bash
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make sail
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```
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$ ./c_emulator/riscv_sim_<arch> -t console.log -b spike.dtb bbl > execution-trace.log 2>&1 &
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$ tail -f console.log
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```
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The `console.log` file contains the console boot messages. For maximum
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performance and benchmarking a model without any execution tracing is
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available on the optimize branch (`git checkout optimize`) of this
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repository. This currently requires the latest Sail built from source.
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## Caveats for OS boot
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- Some OS toolchains generate obsolete LR/SC instructions with now
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illegal combinations of `.aq` and `.rl` flags. You can work-around
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this by changing `riscv_mem.sail` to accept these flags.
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Use `tail -f /tmp/console.log` to see the terminal log.
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- One needs to manually ensure that the DTB used for the C model
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accurately describes the physical memory map implemented in the C
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platform. This will not be needed once the C model can generate its
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own DTB.
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### Results
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## Sample Linux image
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`rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl` contains a sample Linux RV64
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image that can be booted as follows, after first generating the
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device-tree blob for a 64MB RV64 machine using `dtc`:
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```
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dtc < os-boot/rv64-64mb.dts > os-boot/rv64-64mb.dtb
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./c_emulator/riscv_sim_RV64 -b os-boot/rv64-64mb.dtb -t /tmp/console.log os-boot/rv64-linux-4.15.0-gcc-7.2.0-64mb.bbl > >(gzip -c > execution-trace.log.gz) 2>&1
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tail -f /tmp/console.log
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```
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You should see the OpenSBI banner after a few seconds.

‎os-boot/freebsd-rv64.bbl‎

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‎os-boot/image-notes.txt‎

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‎os-boot/linux-rv64-64mb.bbl‎

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‎os-boot/linux/Makefile‎

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.PHONY: clean all dist-clean spike sail qemu
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elf := build/fw_payload.elf
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all: $(elf)
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RISCV_COMPILER_URL ?= https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2025.01.20/riscv64-glibc-ubuntu-24.04-gcc-nightly-2025.01.20-nightly.tar.xz
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LINUX_VERSION ?= 6.14.4
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OPENSBI_VERSION ?= 1.6
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src/gcc.tar.xz:
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mkdir -p src
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ifeq (, $(wildcard src/gcc.tar.xz))
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curl -L $(RISCV_COMPILER_URL) -o src/gcc.tar.xz
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endif
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build/riscv/bin/riscv64-unknown-linux-gnu-gcc: src/gcc.tar.xz
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mkdir -p build
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tar -m -C build -xf src/gcc.tar.xz
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src/linux.tar.xz:
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mkdir -p src
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ifeq (, $(wildcard src/linux.tar.xz))
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curl -L https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-$(LINUX_VERSION).tar.xz -o src/linux.tar.xz
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endif
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build/linux-$(LINUX_VERSION)/Makefile: src/linux.tar.xz
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mkdir -p build
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tar -m -C build -xf src/linux.tar.xz
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src/opensbi.tar.xz:
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mkdir -p src
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ifeq (, $(wildcard src/opensbi.tar.xz))
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curl -L https://github.com/riscv-software-src/opensbi/archive/refs/tags/v$(OPENSBI_VERSION).tar.gz -o src/opensbi.tar.xz
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endif
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build/opensbi-$(OPENSBI_VERSION)/Makefile: src/opensbi.tar.xz
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mkdir -p build
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tar -m -C build -xf src/opensbi.tar.xz
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CROSS_COMPILE := $(shell pwd)/build/riscv/bin/riscv64-unknown-linux-gnu-
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# Number of instructions to run.
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LIMIT_INSTRUCTIONS ?= 250000
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build/linux-$(LINUX_VERSION)/arch/riscv/boot/Image: build/linux-$(LINUX_VERSION)/Makefile build/riscv/bin/riscv64-unknown-linux-gnu-gcc
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$(MAKE) -C build/linux-$(LINUX_VERSION) CROSS_COMPILE=$(CROSS_COMPILE) ARCH=riscv defconfig
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$(MAKE) -C build/linux-$(LINUX_VERSION) CROSS_COMPILE=$(CROSS_COMPILE) CONFIG_HVC_RISCV_SBI=y ARCH=riscv Image
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# FW_TEXT_START is 0 by default which doesn't leave space for the emulator bootloader.
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# 0x80000000 is the default start of Spike's memory.
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build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf: build/opensbi-$(OPENSBI_VERSION)/Makefile build/linux-$(LINUX_VERSION)/arch/riscv/boot/Image build/riscv/bin/riscv64-unknown-linux-gnu-gcc
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$(MAKE) -C build/opensbi-$(OPENSBI_VERSION) FW_TEXT_START=0x80000000 FW_PAYLOAD=y FW_PAYLOAD_PATH=../linux-$(LINUX_VERSION)/arch/riscv/boot/Image PLATFORM=generic CROSS_COMPILE=$(CROSS_COMPILE)
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$(elf): build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf
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cp build/opensbi-$(OPENSBI_VERSION)/build/platform/generic/firmware/fw_payload.elf $(elf)
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sail.dtb: sail.dts
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dtc < sail.dts -o sail.dtb
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spike: $(elf)
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spike --instructions=$(LIMIT_INSTRUCTIONS) $(elf)
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# Run on Sail.
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sail: sail.dtb $(elf)
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../../build/c_emulator/riscv_sim_rv64d --no-trace -p -l $(LIMIT_INSTRUCTIONS) --device-tree-blob sail.dtb -t /dev/stdout $(elf)
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qemu: $(elf)
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qemu-system-riscv64 -M virt -m 256M -nographic -bios $(elf)
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clean:
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rm -rf build
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rm -f sail.dtb
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dist-clean:
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rm -rf build
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rm -f sail.dtb
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rm -rf src

os-boot/rv64-2gb.dts renamed to os-boot/linux/sail.dts

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#size-cells = <2>;
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compatible = "ucbbar,spike-bare-dev";
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model = "ucbbar,spike-bare";
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chosen {
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bootargs = "console=hvc0 earlycon=sbi";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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status = "okay";
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compatible = "riscv";
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riscv,isa = "rv64imac";
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riscv,isa = "rv64imafd";
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mmu-type = "riscv,sv39";
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riscv,pmpregions = <16>;
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riscv,pmpgranularity = <4>;
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clock-frequency = <1000000000>;
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CPU0_intc: interrupt-controller {
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#address-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "riscv,cpu-intc";

‎os-boot/os-boot-patch.diff‎

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‎os-boot/rv64-2gb-hafnium.dts‎

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