316316#define SKX_UPI_PCI_PMON_CTL0 0x350
317317#define SKX_UPI_PCI_PMON_CTR0 0x318
318318#define SKX_UPI_PCI_PMON_BOX_CTL 0x378
319- #define SKX_PMON_CTL_UMASK_EXT 0xff
319+ #define SKX_UPI_CTL_UMASK_EXT 0xffefff
320320
321321/* SKX M2M */
322322#define SKX_M2M_PCI_PMON_CTL0 0x228
@@ -328,7 +328,7 @@ DEFINE_UNCORE_FORMAT_ATTR(event2, event, "config:0-6");
328328DEFINE_UNCORE_FORMAT_ATTR (event_ext , event , "config:0-7,21" );
329329DEFINE_UNCORE_FORMAT_ATTR (use_occ_ctr , use_occ_ctr , "config:7" );
330330DEFINE_UNCORE_FORMAT_ATTR (umask , umask , "config:8-15" );
331- DEFINE_UNCORE_FORMAT_ATTR (umask_ext , umask , "config:8-15,32-39 " );
331+ DEFINE_UNCORE_FORMAT_ATTR (umask_ext , umask , "config:8-15,32-43,45-55 " );
332332DEFINE_UNCORE_FORMAT_ATTR (qor , qor , "config:16" );
333333DEFINE_UNCORE_FORMAT_ATTR (edge , edge , "config:18" );
334334DEFINE_UNCORE_FORMAT_ATTR (tid_en , tid_en , "config:19" );
@@ -351,7 +351,6 @@ DEFINE_UNCORE_FORMAT_ATTR(filter_cid, filter_cid, "config1:5");
351351DEFINE_UNCORE_FORMAT_ATTR (filter_link , filter_link , "config1:5-8" );
352352DEFINE_UNCORE_FORMAT_ATTR (filter_link2 , filter_link , "config1:6-8" );
353353DEFINE_UNCORE_FORMAT_ATTR (filter_link3 , filter_link , "config1:12" );
354- DEFINE_UNCORE_FORMAT_ATTR (filter_link4 , filter_link , "config1:9-12" );
355354DEFINE_UNCORE_FORMAT_ATTR (filter_nid , filter_nid , "config1:10-17" );
356355DEFINE_UNCORE_FORMAT_ATTR (filter_nid2 , filter_nid , "config1:32-47" );
357356DEFINE_UNCORE_FORMAT_ATTR (filter_state , filter_state , "config1:18-22" );
@@ -3302,7 +3301,6 @@ static struct attribute *skx_uncore_cha_formats_attr[] = {
33023301 & format_attr_inv .attr ,
33033302 & format_attr_thresh8 .attr ,
33043303 & format_attr_filter_tid4 .attr ,
3305- & format_attr_filter_link4 .attr ,
33063304 & format_attr_filter_state5 .attr ,
33073305 & format_attr_filter_rem .attr ,
33083306 & format_attr_filter_loc .attr ,
@@ -3312,7 +3310,6 @@ static struct attribute *skx_uncore_cha_formats_attr[] = {
33123310 & format_attr_filter_opc_0 .attr ,
33133311 & format_attr_filter_opc_1 .attr ,
33143312 & format_attr_filter_nc .attr ,
3315- & format_attr_filter_c6 .attr ,
33163313 & format_attr_filter_isoc .attr ,
33173314 NULL ,
33183315};
@@ -3333,8 +3330,11 @@ static struct extra_reg skx_uncore_cha_extra_regs[] = {
33333330 SNBEP_CBO_EVENT_EXTRA_REG (0x0534 , 0xffff , 0x4 ),
33343331 SNBEP_CBO_EVENT_EXTRA_REG (0x0934 , 0xffff , 0x4 ),
33353332 SNBEP_CBO_EVENT_EXTRA_REG (0x1134 , 0xffff , 0x4 ),
3336- SNBEP_CBO_EVENT_EXTRA_REG (0x2134 , 0xffff , 0x4 ),
3337- SNBEP_CBO_EVENT_EXTRA_REG (0x8134 , 0xffff , 0x4 ),
3333+ SNBEP_CBO_EVENT_EXTRA_REG (0x3134 , 0xffff , 0x4 ),
3334+ SNBEP_CBO_EVENT_EXTRA_REG (0x9134 , 0xffff , 0x4 ),
3335+ SNBEP_CBO_EVENT_EXTRA_REG (0x35 , 0xff , 0x8 ),
3336+ SNBEP_CBO_EVENT_EXTRA_REG (0x36 , 0xff , 0x8 ),
3337+ EVENT_EXTRA_END
33383338};
33393339
33403340static u64 skx_cha_filter_mask (int fields )
@@ -3347,6 +3347,17 @@ static u64 skx_cha_filter_mask(int fields)
33473347 mask |= SKX_CHA_MSR_PMON_BOX_FILTER_LINK ;
33483348 if (fields & 0x4 )
33493349 mask |= SKX_CHA_MSR_PMON_BOX_FILTER_STATE ;
3350+ if (fields & 0x8 ) {
3351+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_REM ;
3352+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_LOC ;
3353+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_ALL_OPC ;
3354+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_NM ;
3355+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_NOT_NM ;
3356+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_OPC0 ;
3357+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_OPC1 ;
3358+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_NC ;
3359+ mask |= SKX_CHA_MSR_PMON_BOX_FILTER_ISOC ;
3360+ }
33503361 return mask ;
33513362}
33523363
@@ -3492,6 +3503,26 @@ static struct intel_uncore_type skx_uncore_irp = {
34923503 .format_group = & skx_uncore_format_group ,
34933504};
34943505
3506+ static struct attribute * skx_uncore_pcu_formats_attr [] = {
3507+ & format_attr_event .attr ,
3508+ & format_attr_umask .attr ,
3509+ & format_attr_edge .attr ,
3510+ & format_attr_inv .attr ,
3511+ & format_attr_thresh8 .attr ,
3512+ & format_attr_occ_invert .attr ,
3513+ & format_attr_occ_edge_det .attr ,
3514+ & format_attr_filter_band0 .attr ,
3515+ & format_attr_filter_band1 .attr ,
3516+ & format_attr_filter_band2 .attr ,
3517+ & format_attr_filter_band3 .attr ,
3518+ NULL ,
3519+ };
3520+
3521+ static struct attribute_group skx_uncore_pcu_format_group = {
3522+ .name = "format" ,
3523+ .attrs = skx_uncore_pcu_formats_attr ,
3524+ };
3525+
34953526static struct intel_uncore_ops skx_uncore_pcu_ops = {
34963527 IVBEP_UNCORE_MSR_OPS_COMMON_INIT (),
34973528 .hw_config = hswep_pcu_hw_config ,
@@ -3510,7 +3541,7 @@ static struct intel_uncore_type skx_uncore_pcu = {
35103541 .box_ctl = HSWEP_PCU_MSR_PMON_BOX_CTL ,
35113542 .num_shared_regs = 1 ,
35123543 .ops = & skx_uncore_pcu_ops ,
3513- .format_group = & snbep_uncore_pcu_format_group ,
3544+ .format_group = & skx_uncore_pcu_format_group ,
35143545};
35153546
35163547static struct intel_uncore_type * skx_msr_uncores [] = {
@@ -3603,8 +3634,8 @@ static struct intel_uncore_type skx_uncore_upi = {
36033634 .perf_ctr_bits = 48 ,
36043635 .perf_ctr = SKX_UPI_PCI_PMON_CTR0 ,
36053636 .event_ctl = SKX_UPI_PCI_PMON_CTL0 ,
3606- .event_mask = SNBEP_QPI_PCI_PMON_RAW_EVENT_MASK ,
3607- .event_mask_ext = SKX_PMON_CTL_UMASK_EXT ,
3637+ .event_mask = SNBEP_PMON_RAW_EVENT_MASK ,
3638+ .event_mask_ext = SKX_UPI_CTL_UMASK_EXT ,
36083639 .box_ctl = SKX_UPI_PCI_PMON_BOX_CTL ,
36093640 .ops = & skx_upi_uncore_pci_ops ,
36103641 .format_group = & skx_upi_uncore_format_group ,
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