@@ -15,14 +15,14 @@ where
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f ( ) ;
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unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. write ( |w| w. cpu_int_thresh ( ) . bits ( 1 ) ) ;
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}
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} else {
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//read current thresh
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let initial = unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. read ( )
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. cpu_int_thresh ( )
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. bits ( )
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//write back old thresh
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unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. write ( |w| w. cpu_int_thresh ( ) . bits ( initial) ) ;
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}
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}
@@ -62,21 +62,21 @@ pub unsafe fn lock<T, R>(ptr: *mut T, ceiling: u8, f: impl FnOnce(&mut T) -> R)
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} else {
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let current = unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. read ( )
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. cpu_int_thresh ( )
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. bits ( )
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} ;
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unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. write ( |w| w. cpu_int_thresh ( ) . bits ( ceiling + 1 ) )
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} //esp32c3 lets interrupts with prio equal to threshold through so we up it by one
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let r = f ( & mut * ptr) ;
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unsafe {
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_thresh
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+ . cpu_int_thresh ( )
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. write ( |w| w. cpu_int_thresh ( ) . bits ( current) )
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}
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r
@@ -91,19 +91,19 @@ pub fn pend(int: Interrupt) {
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match int {
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Interrupt :: FROM_CPU_INTR0 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_0
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+ . cpu_intr_from_cpu_0 ( )
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. write ( |w| w. cpu_intr_from_cpu_0 ( ) . bit ( true ) ) ,
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Interrupt :: FROM_CPU_INTR1 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_1
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+ . cpu_intr_from_cpu_1 ( )
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. write ( |w| w. cpu_intr_from_cpu_1 ( ) . bit ( true ) ) ,
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Interrupt :: FROM_CPU_INTR2 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_2
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+ . cpu_intr_from_cpu_2 ( )
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. write ( |w| w. cpu_intr_from_cpu_2 ( ) . bit ( true ) ) ,
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Interrupt :: FROM_CPU_INTR3 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_3
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+ . cpu_intr_from_cpu_3 ( )
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. write ( |w| w. cpu_intr_from_cpu_3 ( ) . bit ( true ) ) ,
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_ => panic ! ( "Unsupported software interrupt" ) , //should never happen, checked at compile time
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}
@@ -117,19 +117,19 @@ pub fn unpend(int: Interrupt) {
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match int {
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Interrupt :: FROM_CPU_INTR0 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_0
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+ . cpu_intr_from_cpu_0 ( )
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. write ( |w| w. cpu_intr_from_cpu_0 ( ) . bit ( false ) ) ,
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Interrupt :: FROM_CPU_INTR1 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_1
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+ . cpu_intr_from_cpu_1 ( )
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. write ( |w| w. cpu_intr_from_cpu_1 ( ) . bit ( false ) ) ,
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Interrupt :: FROM_CPU_INTR2 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_2
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+ . cpu_intr_from_cpu_2 ( )
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. write ( |w| w. cpu_intr_from_cpu_2 ( ) . bit ( false ) ) ,
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Interrupt :: FROM_CPU_INTR3 => peripherals
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. SYSTEM
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- . cpu_intr_from_cpu_3
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+ . cpu_intr_from_cpu_3 ( )
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. write ( |w| w. cpu_intr_from_cpu_3 ( ) . bit ( false ) ) ,
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_ => panic ! ( "Unsupported software interrupt" ) ,
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}
@@ -152,10 +152,10 @@ pub fn enable(int: Interrupt, prio: u8, cpu_int_id: u8) {
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. write_volatile ( cpu_interrupt_number as u32 ) ;
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//map peripheral interrupt to CPU interrupt
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( * INTERRUPT_CORE0 :: ptr ( ) )
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- . cpu_int_enable
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+ . cpu_int_enable ( )
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. modify ( |r, w| w. bits ( ( 1 << cpu_interrupt_number) | r. bits ( ) ) ) ; //enable the CPU interupt.
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let intr = INTERRUPT_CORE0 :: ptr ( ) ;
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- let intr_prio_base = ( * intr) . cpu_int_pri_0 . as_ptr ( ) ;
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+ let intr_prio_base = ( * intr) . cpu_int_pri_0 ( ) . as_ptr ( ) ;
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intr_prio_base
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. offset ( cpu_interrupt_number)
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