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1 parent 5efbfcb commit 73bc678Copy full SHA for 73bc678
riscv/decode_macros.h
@@ -22,6 +22,7 @@
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#define RS2 READ_REG(insn.rs2())
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#define RS3 READ_REG(insn.rs3())
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#define WRITE_RD(value) WRITE_REG(insn.rd(), value)
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+#define CHECK_RD() CHECK_REG(insn.rd())
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/* 0 : int
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* 1 : floating
riscv/insns/jal.h
@@ -1,3 +1,4 @@
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+CHECK_RD();
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reg_t tmp = npc;
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set_pc(JUMP_TARGET);
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WRITE_RD(tmp);
riscv/insns/jalr.h
set_pc((RS1 + insn.i_imm()) & ~reg_t(1));
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