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Commit 610aded

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Fixing builds
1 parent 6de076b commit 610aded

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3 files changed

+10
-9
lines changed

3 files changed

+10
-9
lines changed

src/control_pipe.rs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ impl<B: UsbBus> ControlPipe<'_, B> {
7070
pub fn handle_setup(&mut self) -> Option<Request> {
7171
let count = match self.ep_out.read(&mut self.buf[..]) {
7272
Ok(count) => {
73-
usb_trace!("Read {count} bytes on EP0-OUT: {:?}", &self.buf[..count]);
73+
usb_trace!("Read {} bytes on EP0-OUT: {:?}", count, &self.buf[..count]);
7474
count
7575
}
7676
Err(UsbError::WouldBlock) => return None,
@@ -91,7 +91,7 @@ impl<B: UsbBus> ControlPipe<'_, B> {
9191
// a stalled state.
9292
self.ep_out.unstall();
9393

94-
usb_debug!("EP0 request received: {req:?}");
94+
usb_debug!("EP0 request received: {:?}", req);
9595

9696
/*sprintln!("SETUP {:?} {:?} {:?} req:{} val:{} idx:{} len:{} {:?}",
9797
req.direction, req.request_type, req.recipient,
@@ -145,13 +145,14 @@ impl<B: UsbBus> ControlPipe<'_, B> {
145145
};
146146

147147
usb_trace!(
148-
"Read {count} bytes on EP0-OUT: {:?}",
148+
"Read {} bytes on EP0-OUT: {:?}",
149+
count,
149150
&self.buf[i..(i + count)]
150151
);
151152
self.i += count;
152153

153154
if self.i >= self.len {
154-
usb_debug!("Request OUT complete: {req:?}");
155+
usb_debug!("Request OUT complete: {:?}", req);
155156
self.state = ControlState::CompleteOut;
156157
return Some(req);
157158
}
@@ -232,7 +233,7 @@ impl<B: UsbBus> ControlPipe<'_, B> {
232233
// There isn't much we can do if the write fails, except to wait for another poll or for
233234
// the host to resend the request.
234235
Err(_err) => {
235-
usb_debug!("Failed to write EP0: {_err:?}");
236+
usb_debug!("Failed to write EP0: {:?}", _err);
236237
return;
237238
}
238239
};

src/device.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -259,21 +259,21 @@ impl<B: UsbBus> UsbDevice<'_, B> {
259259
for i in 1..MAX_ENDPOINTS {
260260
if (ep_setup & bit) != 0 {
261261
for cls in classes.iter_mut() {
262-
usb_trace!("Handling EP{i}-SETUP");
262+
usb_trace!("Handling EP{}-SETUP", i);
263263
cls.endpoint_setup(EndpointAddress::from_parts(
264264
i,
265265
UsbDirection::Out,
266266
));
267267
}
268268
} else if (ep_out & bit) != 0 {
269-
usb_trace!("Handling EP{i}-OUT");
269+
usb_trace!("Handling EP{}-OUT", i);
270270
for cls in classes.iter_mut() {
271271
cls.endpoint_out(EndpointAddress::from_parts(i, UsbDirection::Out));
272272
}
273273
}
274274

275275
if (ep_in_complete & bit) != 0 {
276-
usb_trace!("Handling EP{i}-IN");
276+
usb_trace!("Handling EP{}-IN", i);
277277
for cls in classes.iter_mut() {
278278
cls.endpoint_in_complete(EndpointAddress::from_parts(
279279
i,

src/macros.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
#[cfg(feature = "log")]
1+
#[cfg(all(feature = "log", not(feature = "defmt")))]
22
macro_rules! usb_log {
33
(trace, $($arg:expr),*) => { log::trace!($($arg),*) };
44
(debug, $($arg:expr),*) => { log::trace!($($arg),*) };

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