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robamurobamu
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harmonize entry points
1 parent ce711c9 commit 040977f

21 files changed

+193
-79
lines changed

‎cortex-a-rt/src/lib.rs‎

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -552,25 +552,26 @@ core::arch::global_asm!(
552552
.global _default_start
553553
.type _default_start, %function
554554
_default_start:
555-
556555
// only allow cpu0 through for initialization
557556
// Read MPIDR
558-
mrc p15,0,r1,c0,c0,5
557+
mrc p15, 0, r1, c0, c0, 5
559558
// Extract CPU ID bits. For single-core systems, this should always be 0
560-
and r1, r1, #0x3
561-
cmp r1, #0
562-
beq initialize
563-
wait_loop:
559+
mov r2, #0xFFFF
560+
and r1, r1, r2
561+
cmp r1, #0
562+
beq 1f
563+
0:
564564
wfe
565565
// When Core 0 emits a SEV, the other cores will wake up.
566-
// Load CPU ID, we are CPU0
567-
mrc p15,0,r0,c0,c0,5
566+
// Load CPU ID.
567+
mrc p15, 0, r0, c0, c0, 5
568568
// Extract CPU ID bits.
569-
and r0, r0, #0x3
569+
mov r2, #0xFFFF
570+
and r0, r0, r2
570571
bl boot_core
571572
// Should never returns, loop permanently here.
572573
b .
573-
initialize:
574+
1:
574575
// Set up stacks.
575576
ldr r0, =_stack_top
576577
// Set stack pointer (right after) and mask interrupts for for UND mode (Mode 0x1B)

‎cortex-r-rt/CHANGELOG.md‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
77

88
## [unreleased]
99

10+
## Changed
11+
12+
- Entry point renamed from `kmain` to `boot_core`. `boot_core` expects one argument
13+
which will be the CPU ID.
14+
1015
## Added
1116

1217
- Added ABT und UND mode stack setup.

‎cortex-r-rt/src/lib.rs‎

Lines changed: 55 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -34,13 +34,13 @@
3434
//!
3535
//! ### Functions
3636
//!
37-
//! * `kmain` - the `extern "C"` entry point to your application.
37+
//! * `boot_core` - the `extern "C"` entry point to your application.
3838
//!
3939
//! Expected prototype:
4040
//!
4141
//! ```rust
4242
//! #[unsafe(no_mangle)]
43-
//! extern "C" fn kmain() -> !;
43+
//! extern "C" fn boot_core(cpu_id: u32) -> !;
4444
//! ```
4545
//!
4646
//! * `_svc_handler` - an `extern "C"` function to call when an SVC Exception
@@ -130,7 +130,7 @@
130130
//!
131131
//! * `_vector_table` - the start of the interrupt vector table
132132
//! * `_default_start` - the default Reset handler, that sets up some stacks and
133-
//! calls an `extern "C"` function called `kmain`.
133+
//! calls an `extern "C"` function called `boot_core`.
134134
//! * `_asm_default_fiq_handler` - an FIQ handler that just spins
135135
//! * `_asm_default_handler` - an exception handler that just spins
136136
//! * `_asm_svc_handler` - assembly language trampoline for SVC Exceptions that
@@ -480,7 +480,7 @@ macro_rules! fpu_enable {
480480

481481
// Start-up code for Armv7-R (and Armv8-R once we've left EL2)
482482
//
483-
// We set up our stacks and `kmain` in system mode.
483+
// We set up our stacks and `boot_core` in system mode.
484484
core::arch::global_asm!(
485485
r#"
486486
.section .text.startup
@@ -549,7 +549,10 @@ core::arch::global_asm!(
549549
b 0b
550550
1:
551551
// Jump to application
552-
bl kmain
552+
// Load CPU ID, we are CPU0
553+
ldr r0, =0x0
554+
// Jump to application
555+
bl boot_core
553556
// In case the application returns, loop forever
554557
b .
555558
.size _el1_start, . - _el1_start
@@ -615,6 +618,27 @@ core::arch::global_asm!(
615618
.global _default_start
616619
.type _default_start, %function
617620
_default_start:
621+
// only allow cpu0 through for initialization
622+
// Read MPIDR
623+
mrc p15,0,r1,c0,c0,5
624+
// Extract CPU ID bits by reading affinity level 0.
625+
// For single-core systems, this should always be 0.
626+
mov r2, #0xFFFF
627+
and r1, r1, r2
628+
cmp r1, #0
629+
beq 1f
630+
0:
631+
wfe
632+
// When Core 0 emits a SEV, the other cores will wake up.
633+
// Load CPU ID.
634+
mrc p15,0,r0,c0,c0,5
635+
// Extract CPU ID bits.
636+
mov r2, #0xFFFF
637+
and r0, r0, r2
638+
bl boot_core
639+
// Should never returns, loop permanently here.
640+
b .
641+
1:
618642
ldr pc, =_el1_start
619643
.size _default_start, . - _default_start
620644
"#
@@ -625,7 +649,7 @@ core::arch::global_asm!(
625649
// There's only one Armv8-R CPU (the Cortex-R52) and the FPU is mandatory, so we
626650
// always enable it.
627651
//
628-
// We boot into EL2, set up a stack pointer, and run `kmain` in EL1.
652+
// We boot into EL2, set up a stack pointer, and run `boot_core` in EL1.
629653
#[cfg(arm_architecture = "v8-r")]
630654
core::arch::global_asm!(
631655
r#"
@@ -635,6 +659,27 @@ core::arch::global_asm!(
635659
.global _default_start
636660
.type _default_start, %function
637661
_default_start:
662+
// only allow cpu0 through for initialization
663+
// Read MPIDR
664+
mrc p15,0,r1,c0,c0,5
665+
// Extract CPU ID bits by reading affinity level 0.
666+
// For single-core systems, this should always be 0.
667+
mov r2, #0xFFFF
668+
and r1, r1, r2
669+
cmp r1, #0
670+
beq 1f
671+
0:
672+
wfe
673+
// When Core 0 emits a SEV, the other cores will wake up.
674+
// Load CPU ID
675+
mrc p15, 0, r0, c0, c0, 5
676+
// Extract CPU ID bits.
677+
mov r2, #0xFFFF
678+
and r0, r0, r2
679+
bl boot_core
680+
// Should never returns, loop permanently here.
681+
b .
682+
1:
638683
// Are we in EL2? If not, skip the EL2 setup portion
639684
mrs r0, cpsr
640685
and r0, r0, 0x1F
@@ -651,10 +696,10 @@ core::arch::global_asm!(
651696
orr r0, r0, r1
652697
mcr p15, 4, r0, c1, c0, 1
653698
// Program the SPSR - enter system mode (0x1F) in Arm mode with IRQ, FIQ masked
654-
mov r0, {sys_mode}
655-
msr spsr_hyp, r0
656-
adr r0, 1f
657-
msr elr_hyp, r0
699+
mov r0, {sys_mode}
700+
msr spsr_hyp, r0
701+
adr r0, 1f
702+
msr elr_hyp, r0
658703
dsb
659704
isb
660705
eret

‎examples/mps3-an536/src/bin/generic_timer.rs‎

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,17 @@ use semihosting::println;
1212
///
1313
/// It is called by the start-up code in `cortex-m-rt`.
1414
#[no_mangle]
15-
pub extern "C" fn kmain() {
16-
main();
17-
semihosting::process::exit(0);
15+
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
16+
match cpu_id {
17+
0 => {
18+
main();
19+
}
20+
_ => panic!("unexpected CPU ID {}", cpu_id),
21+
}
1822
}
1923

2024
/// Let's test some timers!
21-
fn main() {
25+
fn main() -> ! {
2226
use cortex_ar::generic_timer::{El1PhysicalTimer, El1VirtualTimer, GenericTimer};
2327
let cntfrq = cortex_ar::register::Cntfrq::read().0;
2428
println!("cntfrq = {:.03} MHz", cntfrq as f32 / 1_000_000.0);
@@ -64,4 +68,5 @@ fn main() {
6468
timer.countdown() as i32
6569
);
6670
}
71+
semihosting::process::exit(0)
6772
}

‎examples/mps3-an536/src/bin/gic.rs‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,13 +24,18 @@ const GICR_BASE_OFFSET: usize = 0x0010_0000usize;
2424
///
2525
/// It is called by the start-up code in `cortex-m-rt`.
2626
#[no_mangle]
27-
pub extern "C" fn kmain() {
28-
main();
27+
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
28+
match cpu_id {
29+
0 => {
30+
main();
31+
}
32+
_ => panic!("unexpected CPU ID {}", cpu_id),
33+
}
2934
}
3035

3136
/// The main function of our Rust application.
3237
///
33-
/// Called by [`kmain`].
38+
/// Called by [boot_core].
3439
fn main() -> ! {
3540
// Get the GIC address by reading CBAR
3641
let periphbase = cortex_ar::register::ImpCbar::read().periphbase();

‎examples/mps3-an536/src/bin/hello.rs‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,18 @@ use semihosting::println;
1212
///
1313
/// It is called by the start-up code in `cortex-m-rt`.
1414
#[no_mangle]
15-
pub extern "C" fn kmain() {
16-
main();
15+
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
16+
match cpu_id {
17+
0 => {
18+
main();
19+
}
20+
_ => panic!("unexpected CPU ID {}", cpu_id),
21+
}
1722
}
1823

1924
/// The main function of our Rust application.
2025
///
21-
/// Called by [`kmain`].
26+
/// Called by [boot_core].
2227
fn main() -> ! {
2328
let x = 1.0f64;
2429
let y = x * 2.0;

‎examples/mps3-an536/src/bin/registers.rs‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,18 @@ use semihosting::println;
1212
///
1313
/// It is called by the start-up code in `cortex-m-rt`.
1414
#[no_mangle]
15-
pub extern "C" fn kmain() {
16-
main();
15+
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
16+
match cpu_id {
17+
0 => {
18+
main();
19+
}
20+
_ => panic!("unexpected CPU ID {}", cpu_id),
21+
}
1722
}
1823

1924
/// The entry-point to the Rust application.
2025
///
21-
/// Called by [`kmain`].
26+
/// Called by [boot_core].
2227
pub fn main() -> ! {
2328
chip_info();
2429
#[cfg(arm_architecture = "v7-r")]

‎examples/mps3-an536/src/bin/svc.rs‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,18 @@ use semihosting::println;
1212
///
1313
/// It is called by the start-up code in `cortex-m-rt`.
1414
#[no_mangle]
15-
pub extern "C" fn kmain() {
16-
main();
15+
pub extern "C" fn boot_core(cpu_id: u32) -> ! {
16+
match cpu_id {
17+
0 => {
18+
main();
19+
}
20+
_ => panic!("unexpected CPU ID {}", cpu_id),
21+
}
1722
}
1823

1924
/// The main function of our Rust application.
2025
///
21-
/// Called by [`kmain`].
26+
/// Called by [boot_core].
2227
pub fn main() -> ! {
2328
let x = 1;
2429
let y = x + 1;

‎examples/versatileab/reference/hello-armv7a-none-eabi.out‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ PANIC: PanicInfo {
33
message: I am an example panic,
44
location: Location {
55
file: "src/bin/hello.rs",
6-
line: 19,
6+
line: 30,
77
col: 5,
88
},
99
can_unwind: true,

‎examples/versatileab/reference/hello-armv7r-none-eabi.out‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ PANIC: PanicInfo {
33
message: I am an example panic,
44
location: Location {
55
file: "src/bin/hello.rs",
6-
line: 19,
6+
line: 30,
77
col: 5,
88
},
99
can_unwind: true,

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