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Commit 0551bf1

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some tabbing fixes
1 parent d20fb7c commit 0551bf1

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3 files changed

+6
-4
lines changed

3 files changed

+6
-4
lines changed

cortex-a-rt/src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -432,7 +432,7 @@ core::arch::global_asm!(
432432
tst r4, {t_bit}
433433
// If not in Thumb mode, branch to not_thumb
434434
beq not_thumb
435-
subs. lr, lr, #2
435+
subs lr, lr, #2
436436
b done
437437
not_thumb:
438438
// Subtract 4 from LR (ARM mode)

cortex-ar/src/register/dfsr.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ impl TryFrom<u8> for DfsrStatus {
3030
}
3131
}
3232
}
33+
3334
/// DFSR (*Data Fault Status Register*)
3435
#[bitbybit::bitfield(u32)]
3536
pub struct Dfsr {
@@ -45,6 +46,7 @@ pub struct Dfsr {
4546
#[bits([0..=3, 10], rw)]
4647
status_raw: u5,
4748
}
49+
4850
impl SysReg for Dfsr {
4951
const CP: u32 = 15;
5052
const CRN: u32 = 5;

cortex-r-rt/src/lib.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -369,7 +369,7 @@ core::arch::global_asm!(
369369
tst r4, {t_bit}
370370
// If not in Thumb mode, branch to not_thumb
371371
beq not_thumb
372-
subs lr, lr, #2
372+
subs lr, lr, #2
373373
b done
374374
not_thumb:
375375
// Subtract 4 from LR (ARM mode)
@@ -399,7 +399,7 @@ done:
399399
.type _asm_default_prefetch_handler, %function
400400
_asm_default_prefetch_handler:
401401
// Subtract 4 from the stored LR, see p.1212 of the ARMv7-A architecture manual.
402-
subs lr, lr, #4
402+
subs lr, lr, #4
403403
// state save from compiled code
404404
srsfd sp!, {abt_mode}
405405
"#,
@@ -424,7 +424,7 @@ done:
424424
.type _asm_default_abort_handler, %function
425425
_asm_default_abort_handler:
426426
// Subtract 8 from the stored LR, see p.1214 of the ARMv7-A architecture manual.
427-
subs lr, lr, #8
427+
subs lr, lr, #8
428428
// state save from compiled code
429429
srsfd sp!, {abt_mode}
430430
"#,

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