More typos and crate renames in the docs

thejpster · thejpster · commit 4469cf45d2eb · 2025-10-29T12:39:15.000Z
diff --git a/aarch32-cpu/build.rs b/aarch32-cpu/build.rs
@@ -1,4 +1,4 @@
-//! # Build script for the Cortex-R library
+//! # Build script for the aarch32-cpu library
 //!
 //! This script only executes when using `cargo` to build the project.
 //!
diff --git a/aarch32-cpu/src/critical_section.rs b/aarch32-cpu/src/critical_section.rs
@@ -1,4 +1,4 @@
-//! Code that implements the `critical-section` traits on Cortex-R or Cortex-A
+//! Code that implements the `critical-section` traits on AArch32
 //!
 //! We have single-core and multi-core versions. Select with the
 //! `critical-section-single-core` and `critical-section-multi-core` features.
diff --git a/aarch32-cpu/src/interrupt.rs b/aarch32-cpu/src/interrupt.rs
@@ -1,4 +1,4 @@
-//! Interrupts on Arm Cortex-R
+//! Interrupts on Arm AArch32
 
 use core::sync::atomic::{compiler_fence, Ordering};
 
diff --git a/aarch32-cpu/src/lib.rs b/aarch32-cpu/src/lib.rs
@@ -1,5 +1,4 @@
-//! CPU/peripheral support for Arm Cortex-R
-
+//! CPU/peripheral support for Arm AArch32
 #![no_std]
 
 mod critical_section;
diff --git a/aarch32-cpu/src/register/armv8r/hvbar.rs b/aarch32-cpu/src/register/armv8r/hvbar.rs
@@ -35,7 +35,7 @@ impl Hvbar {
     ///
     /// # Safety
     ///
-    /// You must supply a correctly-aligned address of a valid Arm Cortex-R
+    /// You must supply a correctly-aligned address of a valid Arm AArch32
     /// Vector Table.
     #[inline]
     pub unsafe fn write(value: Self) {
diff --git a/aarch32-cpu/src/register/armv8r/vbar.rs b/aarch32-cpu/src/register/armv8r/vbar.rs
@@ -34,7 +34,7 @@ impl Vbar {
     ///
     /// # Safety
     ///
-    /// You must supply a correctly-aligned address of a valid Arm Cortex-R
+    /// You must supply a correctly-aligned address of a valid Arm AArch32
     /// Vector Table.
     #[inline]
     pub unsafe fn write(value: Self) {
diff --git a/aarch32-rt-macros/Cargo.toml b/aarch32-rt-macros/Cargo.toml
@@ -4,7 +4,7 @@ authors = [
   "Jonathan Pallant <jonathan.pallant@ferrous-systems.com>",
   "The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
 ]
-description = "Run-Time macros for Arm Cortex-A and Cortex-R"
+description = "Run-Time macros for aarch32-rt"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 name = "aarch32-rt-macros"
diff --git a/aarch32-rt/Cargo.toml b/aarch32-rt/Cargo.toml
@@ -7,7 +7,7 @@ categories = [
     "embedded",
     "no-std",
 ]
-description = "Run-time support for Arm Cortex-R"
+description = "Run-time support for Arm AArch32"
 edition = "2021"
 keywords = [
     "arm",
diff --git a/aarch32-rt/build.rs b/aarch32-rt/build.rs
@@ -1,4 +1,4 @@
-//! # Build script for the Cortex-R Runtime
+//! # Build script for aarch32-rt
 //!
 //! This script only executes when using `cargo` to build the project.
 //!
diff --git a/examples/mps3-an536/Cargo.toml b/examples/mps3-an536/Cargo.toml
@@ -4,7 +4,7 @@ authors = [
 	"The Embedded Devices Working Group Arm Team <arm@teams.rust-embedded.org>"
 ]
 default-run = "hello"
-description = "Examples for MPS3-AN536 device (Arm Cortex-R)"
+description = "Examples for MPS3-AN536 device (Arm Cortex-R52)"
 edition = "2021"
 homepage = "https://github.com/rust-embedded/cortex-ar.git"
 license = "MIT OR Apache-2.0"
diff --git a/examples/mps3-an536/build.rs b/examples/mps3-an536/build.rs
@@ -1,4 +1,4 @@
-//! # Build script for the Cortex-R Examples
+//! # Build script for the MPS3-AN536 Examples
 //!
 //! This script only executes when using `cargo` to build the project.
 //!
diff --git a/examples/mps3-an536/src/bin/fpu-test.rs b/examples/mps3-an536/src/bin/fpu-test.rs
@@ -12,7 +12,7 @@ const MAX_LEN: f32 = BAR.len() as f32;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     const STEPS: u16 = 100;
diff --git a/examples/mps3-an536/src/bin/generic_timer.rs b/examples/mps3-an536/src/bin/generic_timer.rs
@@ -10,7 +10,7 @@ use semihosting::println;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/generic_timer_irq.rs b/examples/mps3-an536/src/bin/generic_timer_irq.rs
@@ -11,7 +11,7 @@ use semihosting::println;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/gic-map.rs b/examples/mps3-an536/src/bin/gic-map.rs
@@ -1,4 +1,4 @@
-//! # GIC example for Arm Cortex-R52 on an MPS2-AN336
+//! # GIC example for Arm Cortex-R52 on an MPS2-AN536
 //!
 //! Uses a run-time map of interrupt handlers.
 
@@ -24,7 +24,7 @@ static INTERRUPT_HANDLERS: critical_section::Mutex<RefCell<LinearMap<IntId, Inte
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/gic-priority-ceiling.rs b/examples/mps3-an536/src/bin/gic-priority-ceiling.rs
@@ -1,4 +1,4 @@
-//! GIC example to implement Priority Ceilings for Arm Cortex-R52 on an MPS2-AN336
+//! GIC example to implement Priority Ceilings for Arm Cortex-R52 on an MPS2-AN536
 
 #![no_std]
 #![no_main]
@@ -21,7 +21,7 @@ const HIGH_PRIORITY: u8 = 0x10;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/gic-static-section-irq.rs b/examples/mps3-an536/src/bin/gic-static-section-irq.rs
@@ -1,4 +1,4 @@
-//! # GIC example for Arm Cortex-R52 on an MPS2-AN336
+//! # GIC example for Arm Cortex-R52 on an MPS2-AN536
 //!
 //! Uses a linker section to store InterruptHandler objects.
 
@@ -18,7 +18,7 @@ const SGI_INTID_HI: IntId = IntId::sgi(4);
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/gic-unified-irq.rs b/examples/mps3-an536/src/bin/gic-unified-irq.rs
@@ -1,4 +1,4 @@
-//! GIC example for Arm Cortex-R52 on an MPS2-AN336
+//! GIC example for Arm Cortex-R52 on an MPS2-AN536
 //!
 //! As a single, unified, `#[irq]` handler.
 
@@ -18,7 +18,7 @@ const SGI_INTID_HI: IntId = IntId::sgi(4);
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let mut board = mps3_an536::Board::new().unwrap();
diff --git a/examples/mps3-an536/src/bin/hello.rs b/examples/mps3-an536/src/bin/hello.rs
@@ -9,7 +9,7 @@ use semihosting::println;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let x = 1.0f64;
diff --git a/examples/mps3-an536/src/bin/registers.rs b/examples/mps3-an536/src/bin/registers.rs
@@ -9,7 +9,7 @@ use semihosting::println;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     chip_info();
diff --git a/examples/mps3-an536/src/bin/smp_test.rs b/examples/mps3-an536/src/bin/smp_test.rs
@@ -57,7 +57,7 @@ const CS_MUTEX_LOOPS: u32 = 1000;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up code in `aarch32-rt`.
 #[entry]
 fn main() -> ! {
     let fpga_led = 0xE020_2000 as *mut u32;
diff --git a/examples/versatileab/build.rs b/examples/versatileab/build.rs
@@ -1,4 +1,4 @@
-//! # Build script for the Cortex-R Examples
+//! # Build script for the VersatileAB Examples
 //!
 //! This script only executes when using `cargo` to build the project.
 //!

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-//! # Build script for the Cortex-R library`
	`1`	`+//! # Build script for the aarch32-cpu library`
`2`	`2`	`//!`
`3`	`3`	//! This script only executes when using `cargo` to build the project.
`4`	`4`	`//!`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		-//! Code that implements the `critical-section` traits on Cortex-R or Cortex-A
	`1`	+//! Code that implements the `critical-section` traits on AArch32
`2`	`2`	`//!`
`3`	`3`	`//! We have single-core and multi-core versions. Select with the`
`4`	`4`	//! `critical-section-single-core` and `critical-section-multi-core` features.
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-//! Interrupts on Arm Cortex-R`
	`1`	`+//! Interrupts on Arm AArch32`
`2`	`2`
`3`	`3`	`use core::sync::atomic::{compiler_fence, Ordering};`
`4`	`4`
Original file line number	Diff line number	Diff line change
`@@ -4,7 +4,7 @@ authors = [`
`4`	`4`	`"Jonathan Pallant <[email protected]>",`
`5`	`5`	`"The Embedded Devices Working Group Arm Team <[email protected]>"`
`6`	`6`	`]`
`7`		`-description = "Run-Time macros for Arm Cortex-A and Cortex-R"`
	`7`	`+description = "Run-Time macros for aarch32-rt"`
`8`	`8`	`edition = "2021"`
`9`	`9`	`license = "MIT OR Apache-2.0"`
`10`	`10`	`name = "aarch32-rt-macros"`
Original file line number	Diff line number	Diff line change
`@@ -7,7 +7,7 @@ categories = [`
`7`	`7`	`"embedded",`
`8`	`8`	`"no-std",`
`9`	`9`	`]`
`10`		`-description = "Run-time support for Arm Cortex-R"`
	`10`	`+description = "Run-time support for Arm AArch32"`
`11`	`11`	`edition = "2021"`
`12`	`12`	`keywords = [`
`13`	`13`	`"arm",`
Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-//! # Build script for the Cortex-R Runtime`
	`1`	`+//! # Build script for aarch32-rt`
`2`	`2`	`//!`
`3`	`3`	//! This script only executes when using `cargo` to build the project.
`4`	`4`	`//!`
Original file line number	Diff line number	Diff line change
`@@ -4,7 +4,7 @@ authors = [`
`4`	`4`	`"The Embedded Devices Working Group Arm Team <[email protected]>"`
`5`	`5`	`]`
`6`	`6`	`default-run = "hello"`
`7`		`-description = "Examples for MPS3-AN536 device (Arm Cortex-R)"`
	`7`	`+description = "Examples for MPS3-AN536 device (Arm Cortex-R52)"`
`8`	`8`	`edition = "2021"`
`9`	`9`	`homepage = "https://github.com/rust-embedded/cortex-ar.git"`
`10`	`10`	`license = "MIT OR Apache-2.0"`