Update to latest arm-gic

Author: jonathanpallant

examples/mps3-an536/Cargo.toml

@@ -19,7 +19,7 @@ version = "0.0.0"
 cortex-ar = { path = "../../cortex-ar", features = ["critical-section-multi-core"] }
 cortex-r-rt = { path = "../../cortex-r-rt" }
 semihosting = { version = "0.1.18", features = ["stdio"] }
-arm-gic = { git = "https://github.com/google/arm-gic.git", rev = "46a8fc1720f5c28fccf4dfb5953b88dab7012e9c", optional = true }
+arm-gic = { version = "0.6.1", optional = true }
 critical-section = "1.2.0"
 
 [build-dependencies]

examples/mps3-an536/src/bin/gic.rs

@@ -10,13 +10,11 @@ use cortex_r_rt::{entry, irq};
 use mps3_an536 as _;
 
 use arm_gic::{
-    gicv3::{Group, SgiTarget},
+    gicv3::{GicV3, Group, InterruptGroup, SgiTarget, SgiTargetGroup},
     IntId,
 };
 use semihosting::println;
 
-type SingleCoreGic = arm_gic::gicv3::GicV3<1>;
-
 /// Offset from PERIPHBASE for GIC Distributor
 const GICD_BASE_OFFSET: usize = 0x0000_0000usize;
 
@@ -42,11 +40,10 @@ fn main() -> ! {
         "Creating GIC driver @ {:010p} / {:010p}",
         gicd_base, gicr_base
     );
-    let mut gic: SingleCoreGic =
-        unsafe { SingleCoreGic::new(gicd_base.cast(), [gicr_base.cast()]) };
+    let mut gic: GicV3 = unsafe { GicV3::new(gicd_base.cast(), gicr_base.cast(), 1, false) };
     println!("Calling git.setup(0)");
     gic.setup(0);
-    SingleCoreGic::set_priority_mask(0x80);
+    GicV3::set_priority_mask(0x80);
 
     // Configure a Software Generated Interrupt for Core 0
     println!("Configure low-prio SGI...");
@@ -70,14 +67,15 @@ fn main() -> ! {
 
     // Send it
     println!("Send lo-prio SGI");
-    SingleCoreGic::send_sgi(
+    GicV3::send_sgi(
         SGI_INTID_LO,
         SgiTarget::List {
             affinity3: 0,
             affinity2: 0,
             affinity1: 0,
             target_list: 0b1,
         },
+        SgiTargetGroup::CurrentGroup1,
     );
 
     for _ in 0..1_000_000 {
@@ -97,7 +95,7 @@ fn dump_cpsr() {
 #[irq]
 fn irq_handler() {
     println!("> IRQ");
-    while let Some(int_id) = SingleCoreGic::get_and_acknowledge_interrupt() {
+    while let Some(int_id) = GicV3::get_and_acknowledge_interrupt(InterruptGroup::Group1) {
         // let's go re-entrant
         unsafe {
             cortex_ar::interrupt::enable();
@@ -108,20 +106,21 @@ fn irq_handler() {
                 "- IRQ got {:?}, sending hi-prio {:?}",
                 SGI_INTID_LO, SGI_INTID_HI
             );
-            SingleCoreGic::send_sgi(
+            GicV3::send_sgi(
                 SGI_INTID_HI,
                 SgiTarget::List {
                     affinity3: 0,
                     affinity2: 0,
                     affinity1: 0,
                     target_list: 0b1,
                 },
+                SgiTargetGroup::CurrentGroup1,
             );
             println!("- IRQ finished sending hi-prio!");
         }
         // turn interrupts off again
         cortex_ar::interrupt::disable();
-        SingleCoreGic::end_interrupt(int_id);
+        GicV3::end_interrupt(int_id, InterruptGroup::Group1);
     }
     println!("< IRQ");
 }