From c8d425da688ea11cac0f73c3619de3bb70ee4ebb Mon Sep 17 00:00:00 2001 From: Jonathan Pallant Date: Mon, 29 Sep 2025 10:07:14 +0100 Subject: [PATCH 1/5] Update arm-targets to 0.3.0 --- arm-targets/CHANGELOG.md | 11 +++++++++-- arm-targets/Cargo.toml | 2 +- cortex-a-rt/Cargo.toml | 2 +- cortex-ar/Cargo.toml | 2 +- cortex-r-rt/Cargo.toml | 2 +- examples/mps3-an536/Cargo.toml | 2 +- examples/versatileab/Cargo.toml | 2 +- 7 files changed, 15 insertions(+), 8 deletions(-) diff --git a/arm-targets/CHANGELOG.md b/arm-targets/CHANGELOG.md index b842230..bdd1267 100644 --- a/arm-targets/CHANGELOG.md +++ b/arm-targets/CHANGELOG.md @@ -7,9 +7,15 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.3.0] + ### Added -- Added support for legacy Arm targets: Armv5TE and Armv4T, including proper arch, isa, and profile handling. +- Support for legacy Arm targets: Armv5TE and Armv4T +- Additional documentation +- ABI type (either EABI or EABIHF) +- Simple CLI tool +- Some unit tests ## [v0.2.0] @@ -26,6 +32,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). Initial release -[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.2.0...HEAD +[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.3.0...HEAD +[v0.3.0]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.2.0...arm-targets-v0.3.0 [v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.1.0...arm-targets-v0.2.0 [v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/arm-targets-v0.1.0 diff --git a/arm-targets/Cargo.toml b/arm-targets/Cargo.toml index be53a4a..5ebd886 100644 --- a/arm-targets/Cargo.toml +++ b/arm-targets/Cargo.toml @@ -12,6 +12,6 @@ readme = "README.md" repository = "https://github.com/rust-embedded/cortex-ar.git" homepage = "https://github.com/rust-embedded/cortex-ar.git" rust-version = "1.59" -version = "0.2.0" +version = "0.3.0" [dependencies] diff --git a/cortex-a-rt/Cargo.toml b/cortex-a-rt/Cargo.toml index 107e2df..5a1610e 100644 --- a/cortex-a-rt/Cargo.toml +++ b/cortex-a-rt/Cargo.toml @@ -26,7 +26,7 @@ eabi-fpu = [] vfp-dp = [] [build-dependencies] -arm-targets = {version = "0.2.0", path = "../arm-targets"} +arm-targets = { version = "0.3.0", path = "../arm-targets" } [package.metadata.docs.rs] targets = ["armv7a-none-eabi"] diff --git a/cortex-ar/Cargo.toml b/cortex-ar/Cargo.toml index d0d2ea3..0a3ec2a 100644 --- a/cortex-ar/Cargo.toml +++ b/cortex-ar/Cargo.toml @@ -34,7 +34,7 @@ defmt = { version = "1", optional = true } serde = { version = "1", features = ["derive"], default-features = false, optional = true } [build-dependencies] -arm-targets = {version = "0.2.0", path = "../arm-targets"} +arm-targets = { version = "0.3.0", path = "../arm-targets" } [features] # Adds a critical-section implementation that only disables interrupts. diff --git a/cortex-r-rt/Cargo.toml b/cortex-r-rt/Cargo.toml index c7f07fb..60cfbb8 100644 --- a/cortex-r-rt/Cargo.toml +++ b/cortex-r-rt/Cargo.toml @@ -32,7 +32,7 @@ cortex-ar-rt-macros = {path = "../cortex-ar-rt-macros", version = "=0.1.0"} eabi-fpu = [] [build-dependencies] -arm-targets = {version = "0.2.0", path = "../arm-targets"} +arm-targets = { version = "0.3.0", path = "../arm-targets" } [package.metadata.docs.rs] targets = ["armv7r-none-eabihf", "armv7r-none-eabihf"] diff --git a/examples/mps3-an536/Cargo.toml b/examples/mps3-an536/Cargo.toml index e29b66b..230cfe1 100644 --- a/examples/mps3-an536/Cargo.toml +++ b/examples/mps3-an536/Cargo.toml @@ -24,7 +24,7 @@ critical-section = "1.2.0" heapless = "0.9.1" [build-dependencies] -arm-targets = {version = "0.2.0", path = "../../arm-targets"} +arm-targets = {version = "0.3.0", path = "../../arm-targets"} [features] eabi-fpu = ["cortex-r-rt/eabi-fpu"] diff --git a/examples/versatileab/Cargo.toml b/examples/versatileab/Cargo.toml index ab34290..a74e7af 100644 --- a/examples/versatileab/Cargo.toml +++ b/examples/versatileab/Cargo.toml @@ -22,7 +22,7 @@ cortex-r-rt = { path = "../../cortex-r-rt" } semihosting = { version = "0.1.18", features = ["stdio"] } [build-dependencies] -arm-targets = { version = "0.2.0", path = "../../arm-targets" } +arm-targets = { version = "0.3.0", path = "../../arm-targets" } [features] eabi-fpu = ["cortex-a-rt/eabi-fpu", "cortex-r-rt/eabi-fpu"] From c119b6bcb4cbfa1d517000a7f04ed350bcf2ad0e Mon Sep 17 00:00:00 2001 From: Jonathan Pallant Date: Mon, 29 Sep 2025 10:09:57 +0100 Subject: [PATCH 2/5] Update cortex-ar to 0.3.0 --- cortex-a-rt/Cargo.toml | 2 +- cortex-ar/CHANGELOG.md | 18 +++++++++++------- cortex-ar/Cargo.toml | 2 +- cortex-r-rt/Cargo.toml | 2 +- 4 files changed, 14 insertions(+), 10 deletions(-) diff --git a/cortex-a-rt/Cargo.toml b/cortex-a-rt/Cargo.toml index 5a1610e..5bd2514 100644 --- a/cortex-a-rt/Cargo.toml +++ b/cortex-a-rt/Cargo.toml @@ -15,7 +15,7 @@ rust-version = "1.83" version = "0.1.1" [dependencies] -cortex-ar = {version = "0.2.0", path = "../cortex-ar"} +cortex-ar = { version = "0.3.0", path = "../cortex-ar" } cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.0" } [features] diff --git a/cortex-ar/CHANGELOG.md b/cortex-ar/CHANGELOG.md index fa90f29..4fe7b46 100644 --- a/cortex-ar/CHANGELOG.md +++ b/cortex-ar/CHANGELOG.md @@ -7,18 +7,21 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.3.0] + - Bumped MSRV for `cortex-ar` to v1.83 to allow compatibility with `arbitrary-int` v2. ### Added - `dmb` data memory barrier in ASM module. -- API for inner cache maintenance as part of the new `cache` module. This includes functions to - completely clean, invalidate or clean & invalidate the L1 data cache or perform data cache - maintenance by MVA (specific address). -- Added new `L1Section::set_section_attrs` and `L1Section::section_attrs` method. Also added - low-level `L1Section::new_with_addr_upper_bits_and_attrs` constructor. +- API for inner cache maintenance as part of the new `cache` module. This + includes functions to completely clean, invalidate or clean & invalidate the + L1 data cache or perform data cache maintenance by MVA (specific address). +- new `L1Section::set_section_attrs` and `L1Section::section_attrs` method, + and low-level `L1Section::new_with_addr_upper_bits_and_attrs` constructor +- `Debug`, `Copy`, `Clone` derives for all system register types - optional `serde` derives behind a `serde` feature gate -- lots of missing `Debug`, `Copy`, `Clone`, `defmt::Format` derives. +- optional `defmt::Format` derives behind a `defmt` feature gate ### Changed @@ -46,6 +49,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). Initial release -[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.2.0...HEAD +[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.3.0...HEAD +[v0.3.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.2.0...cortex-ar-v0.3.0 [v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.1.0...cortex-ar-v0.2.0 [v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-v0.1.0 diff --git a/cortex-ar/Cargo.toml b/cortex-ar/Cargo.toml index 0a3ec2a..43ec4de 100644 --- a/cortex-ar/Cargo.toml +++ b/cortex-ar/Cargo.toml @@ -22,7 +22,7 @@ readme = "README.md" repository = "https://github.com/rust-embedded/cortex-ar.git" homepage = "https://github.com/rust-embedded/cortex-ar.git" rust-version = "1.83" -version = "0.2.0" +version = "0.3.0" [dependencies] arbitrary-int = "2" diff --git a/cortex-r-rt/Cargo.toml b/cortex-r-rt/Cargo.toml index 60cfbb8..6a5a1f5 100644 --- a/cortex-r-rt/Cargo.toml +++ b/cortex-r-rt/Cargo.toml @@ -24,7 +24,7 @@ rust-version = "1.83" version = "0.2.0" [dependencies] -cortex-ar = {version = "0.2.0", path = "../cortex-ar"} +cortex-ar = { version = "0.3.0", path = "../cortex-ar" } cortex-ar-rt-macros = {path = "../cortex-ar-rt-macros", version = "=0.1.0"} [features] From 6e8e54f46fd4c2d12ae121958fa8606d0e34dcf4 Mon Sep 17 00:00:00 2001 From: Jonathan Pallant Date: Mon, 29 Sep 2025 10:12:49 +0100 Subject: [PATCH 3/5] Update cortex-ar-rt-macros to 0.1.1 --- cortex-a-rt/Cargo.toml | 2 +- cortex-ar-rt-macros/CHANGELOG.md | 7 +++++-- cortex-ar-rt-macros/Cargo.toml | 2 +- cortex-r-rt/Cargo.toml | 2 +- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/cortex-a-rt/Cargo.toml b/cortex-a-rt/Cargo.toml index 5bd2514..f36c71e 100644 --- a/cortex-a-rt/Cargo.toml +++ b/cortex-a-rt/Cargo.toml @@ -16,7 +16,7 @@ version = "0.1.1" [dependencies] cortex-ar = { version = "0.3.0", path = "../cortex-ar" } -cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.0" } +cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.1" } [features] # Enable the FPU on start-up, even on a soft-float EABI target diff --git a/cortex-ar-rt-macros/CHANGELOG.md b/cortex-ar-rt-macros/CHANGELOG.md index 5d78f01..7003dbe 100644 --- a/cortex-ar-rt-macros/CHANGELOG.md +++ b/cortex-ar-rt-macros/CHANGELOG.md @@ -7,11 +7,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] -No changes +## [v0.1.1] + +- Correctly note MSRV as 1.83 ## [v0.1.0] Initial release -[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.0...HEAD +[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.1...HEAD +[v0.1.1]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.0...cortex-ar-rt-macros-v0.1.1 [v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-rt-macros-v0.1.0 diff --git a/cortex-ar-rt-macros/Cargo.toml b/cortex-ar-rt-macros/Cargo.toml index 3469b86..e720049 100644 --- a/cortex-ar-rt-macros/Cargo.toml +++ b/cortex-ar-rt-macros/Cargo.toml @@ -12,7 +12,7 @@ readme = "README.md" repository = "https://github.com/rust-embedded/cortex-ar.git" homepage = "https://github.com/rust-embedded/cortex-ar.git" rust-version = "1.83" -version = "0.1.0" +version = "0.1.1" [lib] proc-macro = true diff --git a/cortex-r-rt/Cargo.toml b/cortex-r-rt/Cargo.toml index 6a5a1f5..c6f3efe 100644 --- a/cortex-r-rt/Cargo.toml +++ b/cortex-r-rt/Cargo.toml @@ -25,7 +25,7 @@ version = "0.2.0" [dependencies] cortex-ar = { version = "0.3.0", path = "../cortex-ar" } -cortex-ar-rt-macros = {path = "../cortex-ar-rt-macros", version = "=0.1.0"} +cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.1" } [features] # Enable the FPU on start-up, even on a soft-float EABI target From 6b74db4d463ee5c455f36884757bf3fc7f299a35 Mon Sep 17 00:00:00 2001 From: Jonathan Pallant Date: Mon, 29 Sep 2025 10:15:05 +0100 Subject: [PATCH 4/5] Update cortex-r-rt to 0.2.1 --- cortex-r-rt/CHANGELOG.md | 16 +++++++++++++--- cortex-r-rt/Cargo.toml | 2 +- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/cortex-r-rt/CHANGELOG.md b/cortex-r-rt/CHANGELOG.md index 36e8a64..864a2d4 100644 --- a/cortex-r-rt/CHANGELOG.md +++ b/cortex-r-rt/CHANGELOG.md @@ -7,9 +7,18 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- No changes + +## [v0.2.1] + +### Changed + +- MSRV is now Rust 1.83 +- Uses cortex-ar 0.3 + ## [v0.2.0] -## Added +### Added - Added ABT und UND mode stack setup. - Default exception handlers for undefined, prefetch abort and data abort exceptions @@ -17,7 +26,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Zeroing of registers on start-up - `#[entry]` and `#[exception]` and `#[interrupt]` macros -## Changed +### Changed - Fixed interrupt handler so interrupts can be re-entrant - Default Rust exception handler is now an empty permanent loop instead of a semihosting exit. @@ -28,6 +37,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). Initial release -[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.0...HEAD +[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.1...HEAD +[v0.2.1]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.0...cortex-r-rt-v0.2.1 [v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.1.0...cortex-r-rt-v0.2.0 [v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-r-rt-v0.1.0 diff --git a/cortex-r-rt/Cargo.toml b/cortex-r-rt/Cargo.toml index c6f3efe..e0fbe02 100644 --- a/cortex-r-rt/Cargo.toml +++ b/cortex-r-rt/Cargo.toml @@ -21,7 +21,7 @@ name = "cortex-r-rt" readme = "README.md" repository = "https://github.com/rust-embedded/cortex-r.git" rust-version = "1.83" -version = "0.2.0" +version = "0.2.1" [dependencies] cortex-ar = { version = "0.3.0", path = "../cortex-ar" } From 613da5706a78c1a987faeffc29ef9d13025e7a29 Mon Sep 17 00:00:00 2001 From: Jonathan Pallant Date: Mon, 29 Sep 2025 10:18:46 +0100 Subject: [PATCH 5/5] Update cortex-a-rt to 0.1.2 --- cortex-a-rt/CHANGELOG.md | 7 ++++++- cortex-a-rt/Cargo.toml | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/cortex-a-rt/CHANGELOG.md b/cortex-a-rt/CHANGELOG.md index c6f341c..0d87610 100644 --- a/cortex-a-rt/CHANGELOG.md +++ b/cortex-a-rt/CHANGELOG.md @@ -7,7 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] -No changes +## [v0.1.2] + +### Changed + +- MSRV is now Rust 1.83 +- Uses cortex-ar 0.3 ## [v0.1.1] diff --git a/cortex-a-rt/Cargo.toml b/cortex-a-rt/Cargo.toml index f36c71e..1df611e 100644 --- a/cortex-a-rt/Cargo.toml +++ b/cortex-a-rt/Cargo.toml @@ -12,7 +12,7 @@ readme = "README.md" repository = "https://github.com/rust-embedded/cortex-ar.git" homepage = "https://github.com/rust-embedded/cortex-ar.git" rust-version = "1.83" -version = "0.1.1" +version = "0.1.2" [dependencies] cortex-ar = { version = "0.3.0", path = "../cortex-ar" }