@@ -60,13 +60,13 @@ PROVIDE(__pre_init = DefaultPreInit);
6060/* # Sections */
6161SECTIONS
6262{
63- PROVIDE(_ram_start = ORIGIN(RAM ));
64- PROVIDE(_ram_end = ORIGIN(RAM ) + LENGTH(RAM ));
63+ PROVIDE(_ram_start = ORIGIN({{ram_region}} ));
64+ PROVIDE(_ram_end = ORIGIN({{ram_region}} ) + LENGTH({{ram_region}} ));
6565 PROVIDE(_stack_start = _ram_end);
6666
67- /* ## Sections in FLASH */
67+ /* ## Sections in {{flash_region}} */
6868 /* ### Vector table */
69- .vector_table ORIGIN(FLASH ) :
69+ .vector_table ORIGIN({{flash_region}} ) :
7070 {
7171 __vector_table = .;
7272
@@ -87,7 +87,7 @@ SECTIONS
8787
8888 /* Device specific interrupts */
8989 KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
90- } > FLASH
90+ } > {{flash_region}}
9191
9292 PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
9393
@@ -106,7 +106,7 @@ SECTIONS
106106
107107 . = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
108108 __etext = .;
109- } > FLASH
109+ } > {{flash_region}}
110110
111111 /* ### .rodata */
112112 .rodata : ALIGN(4)
@@ -120,17 +120,17 @@ SECTIONS
120120 section will have the correct alignment. */
121121 . = ALIGN(4);
122122 __erodata = .;
123- } > FLASH
123+ } > {{flash_region}}
124124
125- /* ## Sections in RAM */
125+ /* ## Sections in {{ram_region}} */
126126 /* ### .data */
127127 .data : ALIGN(4)
128128 {
129129 . = ALIGN(4);
130130 __sdata = .;
131131 *(.data .data.*);
132132 . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
133- } > RAM AT>FLASH
133+ } > {{ram_region}} AT>{{flash_region}}
134134 /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
135135 * use the .data loading mechanism by pushing __edata. Note: do not change
136136 * output region or load region in those user sections! */
@@ -143,14 +143,14 @@ SECTIONS
143143 /* ### .gnu.sgstubs
144144 This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
145145 /* Security Attribution Unit blocks must be 32 bytes aligned. */
146- /* Note that this pads the FLASH usage to 32 byte alignment. */
146+ /* Note that this pads the {{flash_region}} usage to 32 byte alignment. */
147147 .gnu.sgstubs : ALIGN(32)
148148 {
149149 . = ALIGN(32);
150150 __veneer_base = .;
151151 *(.gnu.sgstubs*)
152152 . = ALIGN(32);
153- } > FLASH
153+ } > {{flash_region}}
154154 /* Place `__veneer_limit` outside the `.gnu.sgstubs` section because veneers are
155155 * always inserted last in the section, which would otherwise be _after_ the `__veneer_limit` symbol.
156156 */
@@ -165,7 +165,7 @@ SECTIONS
165165 *(.bss .bss.*);
166166 *(COMMON); /* Uninitialized C statics */
167167 . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
168- } > RAM
168+ } > {{ram_region}}
169169 /* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
170170 * use the .bss zeroing mechanism by pushing __ebss. Note: do not change
171171 * output region or load region in those user sections! */
@@ -180,12 +180,12 @@ SECTIONS
180180 *(.uninit .uninit.*);
181181 . = ALIGN(4);
182182 __euninit = .;
183- } > RAM
183+ } > {{ram_region}}
184184
185185 /* Align `__sheap` and `_stack_end` pointers to 4 bytes */
186186 . = ALIGN(4);
187187
188- /* Place the heap start and stack end at the end of allocated RAM */
188+ /* Place the heap start and stack end at the end of allocated {{ram_region}} */
189189 PROVIDE(__sheap = .);
190190 PROVIDE(_stack_end = .);
191191
@@ -209,11 +209,11 @@ SECTIONS
209209
210210/* Do not exceed this mark in the error messages below | */
211211/* # Alignment checks */
212- ASSERT(ORIGIN(FLASH ) % 4 == 0, "
213- ERROR(cortex-m-rt): the start of the FLASH region must be 4-byte aligned");
212+ ASSERT(ORIGIN({{flash_region}} ) % 4 == 0, "
213+ ERROR(cortex-m-rt): the start of the {{flash_region}} region must be 4-byte aligned");
214214
215- ASSERT(ORIGIN(RAM ) % 4 == 0, "
216- ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
215+ ASSERT(ORIGIN({{ram_region}} ) % 4 == 0, "
216+ ERROR(cortex-m-rt): the start of the {{ram_region}} region must be 4-byte aligned");
217217
218218ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
219219BUG(cortex-m-rt): .data is not 4-byte aligned");
@@ -230,7 +230,7 @@ BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
230230ASSERT(_stack_start % 8 == 0, "
231231ERROR(cortex-m-rt): stack start address is not 8-byte aligned.
232232If you have set _stack_start, check it's set to an address which is a multiple of 8 bytes.
233- If you haven't, stack starts at the end of RAM by default. Check that both RAM
233+ If you haven't, stack starts at the end of {{ram_region}} by default. Check that both {{ram_region}}
234234origin and length are set to multiples of 8 in the `memory.x` file.");
235235
236236ASSERT(_stack_end % 4 == 0, "
@@ -273,9 +273,9 @@ ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
273273ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
274274Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
275275
276- ASSERT(_stext >= ORIGIN(FLASH ) && _stext < ORIGIN(FLASH ) + LENGTH(FLASH ), "
277- ERROR(cortex-m-rt): The .text section must be placed inside the FLASH memory.
278- Set _stext to an address within the FLASH region.");
276+ ASSERT(_stext >= ORIGIN({{flash_region}} ) && _stext < ORIGIN({{flash_region}} ) + LENGTH({{flash_region}} ), "
277+ ERROR(cortex-m-rt): The .text section must be placed inside the {{flash_region}} memory.
278+ Set _stext to an address within the {{flash_region}} region.");
279279
280280/* # Other checks */
281281ASSERT(SIZEOF(.got) == 0, "
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