@@ -21,6 +21,12 @@ pub enum RMode {
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}
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impl Fpscr {
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+ /// Creates a `Fspcr` value from raw bits.
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+ #[ inline]
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+ pub fn from_bits ( bits : u32 ) -> Self {
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+ Self { bits }
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+ }
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+
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/// Returns the contents of the register as raw bits
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#[ inline]
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pub fn bits ( self ) -> u32 {
@@ -118,6 +124,7 @@ impl Fpscr {
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}
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/// Read the FPSCR register
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+ #[ inline]
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pub fn read ( ) -> Fpscr {
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match ( ) {
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#[ cfg( all( cortex_m, feature = "inline-asm" ) ) ]
@@ -126,16 +133,15 @@ pub fn read() -> Fpscr {
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unsafe {
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llvm_asm ! ( "vmrs $0, fpscr" : "=r" ( r) :: : "volatile" ) ;
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}
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- Fpscr { bits : r }
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+ Fpscr :: from_bits ( r )
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}
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#[ cfg( all( cortex_m, not( feature = "inline-asm" ) ) ) ]
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( ) => unsafe {
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extern "C" {
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fn __get_FPSCR ( ) -> u32 ;
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}
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-
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- Fpscr { bits : __get_FPSCR ( ) }
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+ Fpscr :: from_bits ( __get_FPSCR ( ) )
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} ,
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#[ cfg( not( cortex_m) ) ]
@@ -144,23 +150,23 @@ pub fn read() -> Fpscr {
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}
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/// Set the value of the FPSCR register
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- pub unsafe fn write ( value : u32 ) {
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+ #[ inline]
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+ pub unsafe fn write ( _fspcr : Fpscr ) {
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match ( ) {
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#[ cfg( all( cortex_m, feature = "inline-asm" ) ) ]
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( ) => {
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- unsafe {
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- llvm_asm ! ( "vmsr fpscr, $0" :: "r" ( value) :: "volatile" ) ;
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- }
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+ let bits = _fspcr. bits ( ) ;
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+ llvm_asm ! ( "vmsr fpscr, $0" :: "r" ( bits) :: "volatile" ) ;
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}
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#[ cfg( all( cortex_m, not( feature = "inline-asm" ) ) ) ]
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- ( ) => unsafe {
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+ ( ) => {
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extern "C" {
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- fn __set_FPSCR ( value : u32 ) ;
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+ fn __set_FPSCR ( bits : u32 ) ;
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}
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- __set_FPSCR ( value ) ;
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- } ,
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+ __set_FPSCR ( _fspcr . bits ( ) ) ;
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+ }
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#[ cfg( not( cortex_m) ) ]
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( ) => unimplemented ! ( ) ,
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