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1 parent b739654 commit 49a6daeCopy full SHA for 49a6dae
src/peripheral/dcb.rs
@@ -4,6 +4,8 @@ use volatile_register::{RW, WO};
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use peripheral::DCB;
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+const BIT_TRACENA: u8 = 24;
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+
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/// Register block
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#[repr(C)]
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pub struct RegisterBlock {
@@ -24,12 +26,12 @@ impl DCB {
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/// soft-reset, only on power reset.
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pub fn enable_trace(&mut self) {
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// set bit 24 / TRACENA
- unsafe { self.demcr.modify(|w| w | (0x01 << 24)); }
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+ unsafe { self.demcr.modify(|w| w | (0x01 << BIT_TRACENA)); }
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}
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/// Disables TRACE. See `DCB::enable_trace()` for more details
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pub fn disable_trace(&mut self) {
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// unset bit 24 / TRACENA
- unsafe { self.demcr.modify(|w| w & !(0x01 << 24)); }
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+ unsafe { self.demcr.modify(|w| w & !(0x01 << BIT_TRACENA)); }
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