Address review comments: fix typo

Author: thejpster

cortex-m/src/lib.rs

@@ -31,7 +31,7 @@
 //! implementation suitable for single-core targets, based on disabling interrupts globally.
 //!
 //! It is **unsound** to enable it on multi-core targets or for code running in unprivileged mode,
-//! and may cause functional problems in systems where some interrupts must be not be disabled
+//! and may cause functional problems in systems where some interrupts must not be disabled
 //! or critical sections are managed as part of an RTOS. In these cases, you should use
 //! a target-specific implementation instead, typically provided by a HAL or RTOS crate.
 //!