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hal: initial SD/MMC implementation
Adds the initial implementation of the `embedded-hal` SD/MMC traits. Includes types and traits useful for handling SD/MMC peripherals.
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‎embedded-hal/src/lib.rs‎

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pub mod delay;
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pub mod digital;
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pub mod i2c;
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pub mod mmc;
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pub mod pwm;
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pub mod spi;
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‎embedded-hal/src/mmc.rs‎

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//! Types and traits for SD/MMC peripherals.
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mod bus_width;
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mod fifo_status;
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mod reset;
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pub mod command;
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pub mod response;
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pub mod tuning;
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pub use bus_width::BusWidth;
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pub use fifo_status::FifoStatus;
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pub use reset::Reset;
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use command::MmcCommand;
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use response::MmcResponse;
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use tuning::TuningMode;
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/// Common operations for DesignWare MMC controllers on JH7110 SoCs.
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pub trait MmcOps {
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/// Associated error type for the SD/MMC trait.
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type Error;
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/// Gets whether the device is a MMC card.
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fn is_mmc(&self) -> bool;
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/// Gets whether the device is a SD card.
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fn is_sd(&self) -> bool {
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!self.is_mmc()
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}
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/// Gets whether the device is configured for SPI mode.
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fn is_spi(&self) -> bool;
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/// Performs bus setup for the SD/MMC device.
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fn setup_bus(&mut self) -> Result<(), Self::Error>;
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/// Performs device initialization sequence.
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fn init(&mut self) -> Result<(), Self::Error>;
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/// Sets the sample phase for the MMC controller.
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fn set_sample_phase(&mut self, sample_phase: u8);
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/// Waits for the FIFO to indicate readiness for read/write operations.
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fn fifo_ready(&self, fifo_status: FifoStatus) -> Result<(), Self::Error>;
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/// Waits for the CMD line to reset (usually during power-up).
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fn wait_for_reset(&mut self, reset: Reset, timeout: u64) -> Result<(), Self::Error>;
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/// Waits for the busy signal to clear for maximum `timeout_us` microseconds.
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fn wait_while_busy(&mut self, timout_us: u64) -> Result<(), Self::Error>;
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/// Writes a SD/MMC command to the card.
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fn write_command<C: MmcCommand>(&mut self, cmd: &C) -> Result<(), Self::Error>;
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/// Reads a SD/MMC response based on the provided command argument.
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///
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/// # Note
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///
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/// `cmd` should match the last call to `write_command`.
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fn read_response<C: MmcCommand, R: MmcResponse>(&mut self, cmd: &C) -> Result<R, Self::Error>;
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/// Reads the raw response bytes from the MMC controller.
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///
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/// # Note
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///
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/// Set `exp_crc` to true if a CRC checksum is expected in the response.
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///
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/// The generic `N` parameter is for the expected length (in bytes) of the response.
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fn response_bytes<const N: usize>(&mut self, exp_crc: bool) -> Result<[u8; N], Self::Error>;
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/// Reads data from the MMC data lines.
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fn read_data(&mut self, data: &mut [u8]) -> Result<(), Self::Error>;
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/// Writes data to the MMC data lines.
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fn write_data(&mut self, data: &[u8]) -> Result<(), Self::Error>;
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/// Requests the card to send a tuning block.
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fn send_tuning(&mut self, bus_width: BusWidth, mode: TuningMode) -> Result<(), Self::Error>;
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/// Executes MMC tuning.
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fn execute_tuning(&mut self, bus_width: BusWidth, mode: TuningMode) -> Result<(), Self::Error>;
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/// Gets the interrupts status as a 32-bit bitfield.
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fn interrupt(&self) -> u32;
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/// Sets the interrupts based on a 32-bit bitfield.
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fn set_interrupt(&mut self, int: u32);
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/// Clear all interrupts.
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fn clear_all_interrupt(&mut self);
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/// Gets the response interrupts status as a 32-bit bitfield.
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fn response_interrupt(&self) -> u32;
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/// Sets the response interrupts based on a 32-bit bitfield.
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fn set_response_interrupt(&mut self, int: u32);
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/// Clear all interrupts.
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fn clear_all_response_interrupt(&mut self);
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}

‎embedded-hal/src/mmc/bus_width.rs‎

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/// Represents the variants of the `bus width` field of the [Argument](super::Argument).
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#[repr(u8)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum BusWidth {
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/// Represents the selection of a 1-bit bus width.
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Bits1 = 0b00,
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/// Represents the selection of a 4-bit bus width.
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Bits4 = 0b10,
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/// Represents the selection of a 8-bit bus width.
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Bits8 = 0b11,
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}
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impl BusWidth {
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/// Creates a new [BusWidth].
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pub const fn new() -> Self {
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Self::Bits1
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}
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}
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impl Default for BusWidth {
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fn default() -> Self {
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Self::new()
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}
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}

‎embedded-hal/src/mmc/command.rs‎

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//! SD/MMC command types.
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use super::response::ResponseType;
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mod types;
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pub use types::*;
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/// Represents common functionality for SD/MMC command types.
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pub trait MmcCommand {
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/// Gets the SD/MMC command type.
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fn command_type(&self) -> CommandType;
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/// Gets the SD/MMC response type expected for the command.
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fn response_type(&self) -> ResponseType;
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/// Gets the SD/MMC command argument.
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///
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/// # Note
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///
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/// Returns `0` for commands that do not expect an argument.
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fn argument(&self) -> u32;
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/// Gets the SD/MMC command argument.
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///
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/// # Note
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///
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/// No effect for commands that do not expect an argument.
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fn set_argument(&mut self, arg: u32);
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/// Gets the CRC-7 of the command.
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fn crc(&self) -> u8;
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/// Sets the CRC-7 of the command.
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fn set_crc(&mut self, crc: u8);
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}

‎embedded-hal/src/mmc/command/types.rs‎

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/// Represents SD/MMC command types.
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#[repr(C)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum CommandType {
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/// Addressed commands: point-to-point, no data transfer on DAT.
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Ac = 0,
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/// Addressed commands: point-to-point, data transfer on DAT.
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Adtc = 1,
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/// Broadcast commands no response. Only available if all CMD lines connected.
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Bc = 2,
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/// Broadcast commands with response. Only available if all CMD lines separated.
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Bcr = 3,
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}

‎embedded-hal/src/mmc/fifo_status.rs‎

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//! FIFO status types.
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/// Represents the FIFO status of the host controller.
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#[repr(u8)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum FifoStatus {
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/// MMC FIFO is empty.
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Empty = 0,
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/// MMC FIFO is full.
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Full = 1,
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}
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impl FifoStatus {
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/// Creates a new [FifoStatus].
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pub const fn new() -> Self {
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Self::Empty
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}
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}
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impl Default for FifoStatus {
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fn default() -> Self {
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Self::new()
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}
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}

‎embedded-hal/src/mmc/reset.rs‎

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//! SD/MMC reset types.
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/// Represents the resets to enable on the MMC host controller.
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#[repr(u8)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum Reset {
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/// Reset the MMC peripheral.
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Mmc = 1,
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/// Reset the FIFO peripheral.
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Fifo = 2,
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/// Reset the DMA peripheral.
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Dma = 4,
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/// Reset the MMC + FIFO peripherals.
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MmcFifo = 3,
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/// Reset the MMC + DMA peripherals.
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MmcDma = 5,
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/// Reset the FIFO + DMA peripherals.
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FifoDma = 6,
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/// Reset all peripherals.
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All = 7,
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}
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impl Reset {
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/// Creates a new [Reset].
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pub const fn new() -> Self {
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Self::Mmc
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}
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}
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impl Default for Reset {
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fn default() -> Self {
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Self::new()
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}
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}

‎embedded-hal/src/mmc/response.rs‎

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//! SD/MMC response types.
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mod mode;
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mod types;
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pub use mode::*;
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pub use types::*;
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/// Represents common functionality for SD/MMC response types.
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pub trait MmcResponse {
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/// Gets the SD/MMC response type.
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fn response_type(&self) -> ResponseType;
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/// Gets the SD/MMC response mode.
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fn response_mode(&self) -> ResponseMode;
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}

‎embedded-hal/src/mmc/response/mode.rs‎

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/// Represents the response mode of the SD/MMC protocol.
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#[repr(C)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum ResponseMode {
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/// Standard SD mode of operation.
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Sd,
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/// SDIO mode of operation.
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Sdio,
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/// SPI mode of operation.
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Spi,
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}

‎embedded-hal/src/mmc/response/types.rs‎

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//! SD/MMC response types.
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use super::ResponseMode;
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/// Represents the response types used in the SD/MMC protocol.
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#[repr(C)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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pub enum ResponseType {
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/// No response type.
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None,
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/// The standard response sent for most command types.
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R1,
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/// The same as the `R1` response, but drives a `BUSY` signal on the `DAT` line(s).
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R1b,
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/// 136-bit response that includes the contents of the card `CID` or `CSD` register.
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R2,
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/// Returns the contents of the card `OCR` register.
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R3,
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/// SDIO response to the `IO_SEND_OP_COND` command.
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///
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/// Returns the card `IO_OCR` register contents, and other operating conditions.
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R4,
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/// SDIO response to the `IO_RW_DIRECT` commands.
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R5,
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/// Response containing the published RCA information.
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R6,
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/// Response containing the card interface condition.
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R7,
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}
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impl ResponseType {
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/// Represents the byte length for an 8-bit response.
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pub const LEN_8BIT: usize = 1;
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/// Represents the byte length for an 16-bit response.
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pub const LEN_16BIT: usize = 2;
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/// Represents the byte length for an 40-bit response.
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pub const LEN_40BIT: usize = 5;
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/// Represents the byte length for an 48-bit response.
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pub const LEN_48BIT: usize = 6;
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/// Represents the byte length for an 136-bit response.
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pub const LEN_136BIT: usize = 17;
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/// Represents the byte length for no response.
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pub const LEN_NONE: usize = 0;
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/// Creates a new [ResponseType].
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pub const fn new() -> Self {
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Self::R1
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}
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/// Gets the byte length of the [ResponseType] based on the operation mode.
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pub const fn len(&self, mode: ResponseMode) -> usize {
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match (mode, self) {
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(
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ResponseMode::Sd,
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Self::R1 | Self::R1b | Self::R3 | Self::R4 | Self::R6 | Self::R7,
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) => Self::LEN_48BIT,
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(ResponseMode::Sd | ResponseMode::Sdio, Self::R2) => Self::LEN_136BIT,
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(ResponseMode::Sdio, Self::R1 | Self::R1b | Self::R4 | Self::R5 | Self::R6) => {
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Self::LEN_48BIT
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}
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(ResponseMode::Spi, Self::R1 | Self::R1b) => Self::LEN_8BIT,
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(ResponseMode::Spi, Self::R2 | Self::R5) => Self::LEN_16BIT,
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(ResponseMode::Spi, Self::R3 | Self::R4 | Self::R7) => Self::LEN_40BIT,
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_ => Self::LEN_NONE,
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}
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}
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/// Gets whether the response type includes a `CRC-7` checksum field.
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pub const fn has_crc(&self, mode: ResponseMode) -> bool {
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matches!(
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(mode, self),
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(
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ResponseMode::Sd,
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Self::R1 | Self::R1b | Self::R2 | Self::R4 | Self::R5 | Self::R6 | Self::R7
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)
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) || matches!((mode, self), (ResponseMode::Sdio, Self::R5 | Self::R6))
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}
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}
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impl Default for ResponseType {
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fn default() -> Self {
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Self::new()
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}
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}

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