add riscv cas atomic support and cleanup the #cfg's for it

Author: TDHolmes

Cargo.toml

@@ -33,6 +33,12 @@ scoped_threadpool = "0.1.8"
 [target.thumbv6m-none-eabi.dependencies]
 atomic-polyfill = { version = "0.1.2", optional = true }
 
+[target.riscv32i-unknown-none-elf.dependencies]
+atomic-polyfill = { version = "0.1.4", optional = true }
+
+[target.riscv32imc-unknown-none-elf.dependencies]
+atomic-polyfill = { version = "0.1.4", optional = true }
+
 [dependencies]
 hash32 = "0.2.1"
 

build.rs

@@ -21,23 +21,44 @@ fn main() -> Result<(), Box<dyn Error>> {
         println!("cargo:rustc-cfg=armv7a");
     }
 
-    // built-in targets with no atomic / CAS support as of nightly-2019-12-17
+    // built-in targets with no atomic / CAS support as of nightly-2022-01-13
+    // AND not supported by the atomic-polyfill crate
     // see the `no-atomics.sh` / `no-cas.sh` script sitting next to this file
     match &target[..] {
-        "msp430-none-elf" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {}
+        "avr-unknown-gnu-atmega328"
+        | "bpfeb-unknown-none"
+        | "bpfel-unknown-none"
+        | "msp430-none-elf"
+        // | "riscv32i-unknown-none-elf"    // supported by atomic-polyfill
+        // | "riscv32imc-unknown-none-elf"  // supported by atomic-polyfill
+        | "thumbv4t-none-eabi"
+        // | "thumbv6m-none-eabi"           // supported by atomic-polyfill
+         => {}
 
         _ => {
             println!("cargo:rustc-cfg=has_cas");
         }
     };
 
     match &target[..] {
-        "msp430-none-elf" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {}
+        "avr-unknown-gnu-atmega328"
+        | "msp430-none-elf"
+        // | "riscv32i-unknown-none-elf"    // supported by atomic-polyfill
+        // | "riscv32imc-unknown-none-elf"  // supported by atomic-polyfill
+        => {}
 
         _ => {
             println!("cargo:rustc-cfg=has_atomics");
         }
     };
 
+    // Let the code know if it should use atomic-polyfill or not
+    match &target[..] {
+        "thumbv6m-none-eabi" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {
+            println!("cargo:rustc-cfg=use_atomic_polyfill");
+        }
+        _ => {}
+    }
+
     Ok(())
 }

src/mpmc.rs

@@ -84,18 +84,18 @@
 
 use core::{cell::UnsafeCell, mem::MaybeUninit};
 
-#[cfg(all(feature = "mpmc_large", not(armv6m)))]
+#[cfg(all(feature = "mpmc_large", not(use_atomic_polyfill)))]
 type AtomicTargetSize = core::sync::atomic::AtomicUsize;
-#[cfg(all(feature = "mpmc_large", armv6m))]
+#[cfg(all(feature = "mpmc_large", use_atomic_polyfill))]
 type AtomicTargetSize = atomic_polyfill::AtomicUsize;
-#[cfg(all(not(feature = "mpmc_large"), not(armv6m)))]
+#[cfg(all(not(feature = "mpmc_large"), not(use_atomic_polyfill)))]
 type AtomicTargetSize = core::sync::atomic::AtomicU8;
-#[cfg(all(not(feature = "mpmc_large"), armv6m))]
+#[cfg(all(not(feature = "mpmc_large"), use_atomic_polyfill))]
 type AtomicTargetSize = atomic_polyfill::AtomicU8;
 
-#[cfg(not(armv6m))]
+#[cfg(not(use_atomic_polyfill))]
 type Ordering = core::sync::atomic::Ordering;
-#[cfg(armv6m)]
+#[cfg(use_atomic_polyfill)]
 type Ordering = atomic_polyfill::Ordering;
 
 #[cfg(feature = "mpmc_large")]

src/pool/llsc.rs

@@ -3,10 +3,10 @@
 pub use core::ptr::NonNull as Ptr;
 use core::{cell::UnsafeCell, ptr};
 
-#[cfg(armv6m)]
+#[cfg(use_atomic_polyfill)]
 use atomic_polyfill::{AtomicPtr, Ordering};
 
-#[cfg(not(armv6m))]
+#[cfg(not(use_atomic_polyfill))]
 use core::sync::atomic::{AtomicPtr, Ordering};
 
 /// Unfortunate implementation detail required to use the

src/pool/singleton/arc.rs

@@ -81,10 +81,10 @@ use core::{
     sync::atomic,
 };
 
-#[cfg(armv6m)]
+#[cfg(use_atomic_polyfill)]
 use atomic_polyfill::{AtomicUsize, Ordering};
 
-#[cfg(not(armv6m))]
+#[cfg(not(use_atomic_polyfill))]
 use core::sync::atomic::{AtomicUsize, Ordering};
 
 use crate::pool::{self, stack::Ptr, Node};