Merge pull request #233 from japaric/x86-pool

korken89 · web-flow · commit f76a8bdb97da · 2021-08-25T18:30:11.000+02:00
Sync Pool support for (32-bit) x86
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
@@ -41,8 +41,8 @@ jobs:
       matrix:
         target:
           - x86_64-unknown-linux-gnu
+          - i686-unknown-linux-musl
           - riscv32imc-unknown-none-elf
-          - x86_64-unknown-linux-gnu
           - armv7r-none-eabi
           - thumbv6m-none-eabi
           - thumbv7m-none-eabi
@@ -102,6 +102,7 @@ jobs:
       matrix:
         target:
           - x86_64-unknown-linux-gnu
+          - i686-unknown-linux-musl
         toolchain:
           - stable
           - nightly
diff --git a/Cargo.toml b/Cargo.toml
@@ -26,7 +26,7 @@ __trybuild = []
 mpmc_large = []
 defmt-impl = ["defmt"]
 
-[target.x86_64-unknown-linux-gnu.dev-dependencies]
+[target.'cfg(any(target_arch = "x86_64", target_arch = "x86"))'.dev-dependencies]
 scoped_threadpool = "0.1.8"
 
 [target.thumbv6m-none-eabi.dependencies]
@@ -58,4 +58,3 @@ optional = true
 [dev-dependencies.defmt]
 version = "0.2.1"
 features = ["unstable-test"]
-
diff --git a/src/pool/cas.rs b/src/pool/cas.rs
@@ -5,12 +5,10 @@
 
 use core::{
     cell::UnsafeCell,
-    convert::TryFrom,
     marker::PhantomData,
-    mem,
-    num::NonZeroUsize,
+    num::NonZeroU64,
     ptr::NonNull,
-    sync::atomic::{AtomicUsize, Ordering},
+    sync::atomic::{AtomicU64, Ordering},
 };
 
 /// Unfortunate implementation detail required to use the
@@ -88,14 +86,16 @@ impl<T> Stack<T> {
     }
 }
 
+#[cfg(target_arch = "x86_64")]
 fn anchor<T>() -> *mut T {
     static mut ANCHOR: u8 = 0;
-    (unsafe { &mut ANCHOR } as *mut u8 as usize & !(mem::align_of::<T>() - 1)) as *mut T
+    (unsafe { &mut ANCHOR } as *mut u8 as usize & !(core::mem::align_of::<T>() - 1)) as *mut T
 }
 
-/// Anchored pointer. This is a (signed) 32-bit offset from `anchor` plus a 32-bit tag
+/// On x86_64, anchored pointer. This is a (signed) 32-bit offset from `anchor` plus a 32-bit tag
+/// On x86, this is a pointer plus a 32-bit tag
 pub struct Ptr<T> {
-    inner: NonZeroUsize,
+    inner: NonZeroU64,
     _marker: PhantomData<*mut T>,
 }
 
@@ -108,27 +108,35 @@ impl<T> Clone for Ptr<T> {
 impl<T> Copy for Ptr<T> {}
 
 impl<T> Ptr<T> {
+    #[cfg(target_arch = "x86_64")]
     pub fn new(p: *mut T) -> Option<Self> {
+        use core::convert::TryFrom;
+
         i32::try_from((p as isize).wrapping_sub(anchor::<T>() as isize))
             .ok()
             .map(|offset| unsafe { Ptr::from_parts(0, offset) })
     }
 
+    #[cfg(target_arch = "x86")]
+    pub fn new(p: *mut T) -> Option<Self> {
+        Some(unsafe { Ptr::from_parts(0, p as i32) })
+    }
+
     unsafe fn from_parts(tag: u32, offset: i32) -> Self {
         Self {
-            inner: NonZeroUsize::new_unchecked((tag as usize) << 32 | (offset as u32 as usize)),
+            inner: NonZeroU64::new_unchecked((tag as u64) << 32 | (offset as u32 as u64)),
             _marker: PhantomData,
         }
     }
 
-    fn from_usize(p: usize) -> Option<Self> {
-        NonZeroUsize::new(p).map(|inner| Self {
+    fn from_u64(p: u64) -> Option<Self> {
+        NonZeroU64::new(p).map(|inner| Self {
             inner,
             _marker: PhantomData,
         })
     }
 
-    fn into_usize(&self) -> usize {
+    fn into_u64(&self) -> u64 {
         self.inner.get()
     }
 
@@ -147,6 +155,7 @@ impl<T> Ptr<T> {
         self.inner.get() as i32
     }
 
+    #[cfg(target_arch = "x86_64")]
     fn as_raw(&self) -> NonNull<T> {
         unsafe {
             NonNull::new_unchecked(
@@ -155,6 +164,11 @@ impl<T> Ptr<T> {
         }
     }
 
+    #[cfg(target_arch = "x86")]
+    fn as_raw(&self) -> NonNull<T> {
+        unsafe { NonNull::new_unchecked(self.offset() as *mut T) }
+    }
+
     pub fn dangling() -> Self {
         unsafe { Self::from_parts(0, 1) }
     }
@@ -165,14 +179,14 @@ impl<T> Ptr<T> {
 }
 
 struct Atomic<T> {
-    inner: AtomicUsize,
+    inner: AtomicU64,
     _marker: PhantomData<*mut T>,
 }
 
 impl<T> Atomic<T> {
     const fn null() -> Self {
         Self {
-            inner: AtomicUsize::new(0),
+            inner: AtomicU64::new(0),
             _marker: PhantomData,
         }
     }
@@ -186,24 +200,24 @@ impl<T> Atomic<T> {
     ) -> Result<(), Option<Ptr<T>>> {
         self.inner
             .compare_exchange_weak(
-                current.map(|p| p.into_usize()).unwrap_or(0),
-                new.map(|p| p.into_usize()).unwrap_or(0),
+                current.map(|p| p.into_u64()).unwrap_or(0),
+                new.map(|p| p.into_u64()).unwrap_or(0),
                 succ,
                 fail,
             )
             .map(drop)
-            .map_err(Ptr::from_usize)
+            .map_err(Ptr::from_u64)
     }
 
     fn load(&self, ord: Ordering) -> Option<Ptr<T>> {
-        NonZeroUsize::new(self.inner.load(ord)).map(|inner| Ptr {
+        NonZeroU64::new(self.inner.load(ord)).map(|inner| Ptr {
             inner,
             _marker: PhantomData,
         })
     }
 
     fn store(&self, val: Option<Ptr<T>>, ord: Ordering) {
         self.inner
-            .store(val.map(|p| p.into_usize()).unwrap_or(0), ord)
+            .store(val.map(|p| p.into_u64()).unwrap_or(0), ord)
     }
 }
diff --git a/src/pool/mod.rs b/src/pool/mod.rs
@@ -153,7 +153,8 @@
 //!
 //! # x86_64 support / limitations
 //!
-//! *NOTE* `Pool` is only `Sync` on `x86_64` if the Cargo feature "x86-sync-pool" is enabled
+//! *NOTE* `Pool` is only `Sync` on `x86_64` and `x86` (`i686`) if the Cargo feature "x86-sync-pool"
+//! is enabled
 //!
 //! x86_64 support is a gamble. Yes, a gamble. Do you feel lucky enough to use `Pool` on x86_64?
 //!
@@ -203,6 +204,10 @@
 //!
 //! ## x86_64 Limitations
 //!
+//! *NOTE* this limitation does not apply to `x86` (32-bit address space). If you run into this
+//! issue, on an x86_64 processor try running your code compiled for `x86`, e.g. `cargo run --target
+//! i686-unknown-linux-musl`
+//!
 //! Because stack nodes must be located within +- 2 GB of the hidden `ANCHOR` variable, which
 //! lives in the `.bss` section, `Pool` may not be able to manage static references created using
 //! `Box::leak` -- these heap allocated chunks of memory may live in a very different address space.
@@ -240,8 +245,11 @@ pub use stack::Node;
 use stack::{Ptr, Stack};
 
 pub mod singleton;
-#[cfg_attr(target_arch = "x86_64", path = "cas.rs")]
-#[cfg_attr(not(target_arch = "x86_64"), path = "llsc.rs")]
+#[cfg_attr(any(target_arch = "x86_64", target_arch = "x86"), path = "cas.rs")]
+#[cfg_attr(
+    not(any(target_arch = "x86_64", target_arch = "x86")),
+    path = "llsc.rs"
+)]
 mod stack;
 
 /// A lock-free memory pool
@@ -259,7 +267,10 @@ pub struct Pool<T> {
     armv7r,
     armv7m,
     armv8m_main,
-    all(target_arch = "x86_64", feature = "x86-sync-pool"),
+    all(
+        any(target_arch = "x86_64", target_arch = "x86"),
+        feature = "x86-sync-pool"
+    ),
     test
 ))]
 unsafe impl<T> Sync for Pool<T> {}
@@ -355,15 +366,15 @@ impl<T> Pool<T> {
         let mut n = 0;
         while len >= sz {
             match () {
-                #[cfg(target_arch = "x86_64")]
+                #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
                 () => {
                     if let Some(p) = Ptr::new(p as *mut _) {
                         self.stack.push(p);
                         n += 1;
                     }
                 }
 
-                #[cfg(not(target_arch = "x86_64"))]
+                #[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
                 () => {
                     self.stack.push(unsafe { Ptr::new_unchecked(p as *mut _) });
                     n += 1;
@@ -393,14 +404,14 @@ impl<T> Pool<T> {
         let cap = nodes.len();
         for p in nodes {
             match () {
-                #[cfg(target_arch = "x86_64")]
+                #[cfg(any(target_arch = "x86_64", target_arch = "x86"))]
                 () => {
                     if let Some(p) = Ptr::new(p) {
                         self.stack.push(p);
                     }
                 }
 
-                #[cfg(not(target_arch = "x86_64"))]
+                #[cfg(not(any(target_arch = "x86_64", target_arch = "x86")))]
                 () => self.stack.push(core::ptr::NonNull::from(p)),
             }
         }
diff --git a/src/pool/singleton.rs b/src/pool/singleton.rs
@@ -19,7 +19,10 @@ use super::{Init, Node, Uninit};
     armv7r,
     armv7m,
     armv8m_main,
-    all(target_arch = "x86_64", feature = "x86-sync-pool"),
+    all(
+        any(target_arch = "x86_64", target_arch = "x86"),
+        feature = "x86-sync-pool"
+    ),
     test
 ))]
 #[macro_export]
