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Remove uses of unstable features
1 parent cd31989 commit 396fb9b

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3 files changed

+20
-21
lines changed

3 files changed

+20
-21
lines changed

.github/workflows/ci.yaml

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ jobs:
3636
run: cargo check --target riscv32imac-unknown-none-elf
3737
- name: Run CI script for riscv32imac-unknown-none-elf (inline-asm) under ${{ matrix.rust }}
3838
run: |
39-
if [ "${{ matrix.rust }}" == "nightly" ]; then
39+
# asm! requires Rust 1.59
40+
if [ "${{ matrix.rust }}" != "1.42.0" ]; then
4041
cargo check --target riscv32imac-unknown-none-elf --features inline-asm
4142
fi
4243
- name: Run CI script for riscv64imac-unknown-none-elf under ${{ matrix.rust }}
@@ -63,4 +64,4 @@ jobs:
6364
toolchain: stable
6465
override: true
6566
- name: Build crate for host OS
66-
run: cargo build
67+
run: cargo build

src/lib.rs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,6 @@
1414
//! - Wrappers around assembly instructions like `WFI`.
1515
1616
#![no_std]
17-
#![cfg_attr(feature = "inline-asm", feature(asm))]
18-
#![cfg_attr(feature = "inline-asm", feature(asm_const))]
1917

2018
extern crate bare_metal;
2119
extern crate bit_field;

src/register/macros.rs

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
11
macro_rules! read_csr {
2-
($csr_number:expr, $asm_fn: ident) => {
2+
($csr_number:literal, $asm_fn: ident) => {
33
/// Reads the CSR
44
#[inline]
55
unsafe fn _read() -> usize {
66
match () {
77
#[cfg(all(riscv, feature = "inline-asm"))]
88
() => {
99
let r: usize;
10-
core::arch::asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
10+
core::arch::asm!(concat!("csrrs {0}, ", stringify!($csr_number), ", x0"), out(reg) r);
1111
r
1212
}
1313

@@ -28,15 +28,15 @@ macro_rules! read_csr {
2828
}
2929

3030
macro_rules! read_csr_rv32 {
31-
($csr_number:expr, $asm_fn: ident) => {
31+
($csr_number:literal, $asm_fn: ident) => {
3232
/// Reads the CSR
3333
#[inline]
3434
unsafe fn _read() -> usize {
3535
match () {
3636
#[cfg(all(riscv32, feature = "inline-asm"))]
3737
() => {
3838
let r: usize;
39-
core::arch::asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
39+
core::arch::asm!(concat!("csrrs {0}, ", stringify!($csr_number), ", x0"), out(reg) r);
4040
r
4141
}
4242

@@ -57,7 +57,7 @@ macro_rules! read_csr_rv32 {
5757
}
5858

5959
macro_rules! read_csr_as {
60-
($register:ident, $csr_number:expr, $asm_fn: ident) => {
60+
($register:ident, $csr_number:literal, $asm_fn: ident) => {
6161
read_csr!($csr_number, $asm_fn);
6262

6363
/// Reads the CSR
@@ -71,7 +71,7 @@ macro_rules! read_csr_as {
7171
}
7272

7373
macro_rules! read_csr_as_usize {
74-
($csr_number:expr, $asm_fn: ident) => {
74+
($csr_number:literal, $asm_fn: ident) => {
7575
read_csr!($csr_number, $asm_fn);
7676

7777
/// Reads the CSR
@@ -83,7 +83,7 @@ macro_rules! read_csr_as_usize {
8383
}
8484

8585
macro_rules! read_csr_as_usize_rv32 {
86-
($csr_number:expr, $asm_fn: ident) => {
86+
($csr_number:literal, $asm_fn: ident) => {
8787
read_csr_rv32!($csr_number, $asm_fn);
8888

8989
/// Reads the CSR
@@ -95,14 +95,14 @@ macro_rules! read_csr_as_usize_rv32 {
9595
}
9696

9797
macro_rules! write_csr {
98-
($csr_number:expr, $asm_fn: ident) => {
98+
($csr_number:literal, $asm_fn: ident) => {
9999
/// Writes the CSR
100100
#[inline]
101101
#[allow(unused_variables)]
102102
unsafe fn _write(bits: usize) {
103103
match () {
104104
#[cfg(all(riscv, feature = "inline-asm"))]
105-
() => core::arch::asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
105+
() => core::arch::asm!(concat!("csrrw x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
106106

107107
#[cfg(all(riscv, not(feature = "inline-asm")))]
108108
() => {
@@ -121,14 +121,14 @@ macro_rules! write_csr {
121121
}
122122

123123
macro_rules! write_csr_rv32 {
124-
($csr_number:expr, $asm_fn: ident) => {
124+
($csr_number:literal, $asm_fn: ident) => {
125125
/// Writes the CSR
126126
#[inline]
127127
#[allow(unused_variables)]
128128
unsafe fn _write(bits: usize) {
129129
match () {
130130
#[cfg(all(riscv32, feature = "inline-asm"))]
131-
() => core::arch::asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
131+
() => core::arch::asm!(concat!("csrrw x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
132132

133133
#[cfg(all(riscv32, not(feature = "inline-asm")))]
134134
() => {
@@ -147,7 +147,7 @@ macro_rules! write_csr_rv32 {
147147
}
148148

149149
macro_rules! write_csr_as_usize {
150-
($csr_number:expr, $asm_fn: ident) => {
150+
($csr_number:literal, $asm_fn: ident) => {
151151
write_csr!($csr_number, $asm_fn);
152152

153153
/// Writes the CSR
@@ -159,7 +159,7 @@ macro_rules! write_csr_as_usize {
159159
}
160160

161161
macro_rules! write_csr_as_usize_rv32 {
162-
($csr_number:expr, $asm_fn: ident) => {
162+
($csr_number:literal, $asm_fn: ident) => {
163163
write_csr_rv32!($csr_number, $asm_fn);
164164

165165
/// Writes the CSR
@@ -171,14 +171,14 @@ macro_rules! write_csr_as_usize_rv32 {
171171
}
172172

173173
macro_rules! set {
174-
($csr_number:expr, $asm_fn: ident) => {
174+
($csr_number:literal, $asm_fn: ident) => {
175175
/// Set the CSR
176176
#[inline]
177177
#[allow(unused_variables)]
178178
unsafe fn _set(bits: usize) {
179179
match () {
180180
#[cfg(all(riscv, feature = "inline-asm"))]
181-
() => core::arch::asm!("csrrs x0, {1}, {0}", in(reg) bits, const $csr_number),
181+
() => core::arch::asm!(concat!("csrrs x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
182182

183183
#[cfg(all(riscv, not(feature = "inline-asm")))]
184184
() => {
@@ -197,14 +197,14 @@ macro_rules! set {
197197
}
198198

199199
macro_rules! clear {
200-
($csr_number:expr, $asm_fn: ident) => {
200+
($csr_number:literal, $asm_fn: ident) => {
201201
/// Clear the CSR
202202
#[inline]
203203
#[allow(unused_variables)]
204204
unsafe fn _clear(bits: usize) {
205205
match () {
206206
#[cfg(all(riscv, feature = "inline-asm"))]
207-
() => core::arch::asm!("csrrc x0, {1}, {0}", in(reg) bits, const $csr_number),
207+
() => core::arch::asm!(concat!("csrrc x0, ", stringify!($csr_number), ", {0}"), in(reg) bits),
208208

209209
#[cfg(all(riscv, not(feature = "inline-asm")))]
210210
() => {

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