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riscv-rt/CHANGELOG.md

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@@ -16,6 +16,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Cargo workspace for riscv and riscv-rt
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- Use inline assembly instead of pre-compiled blobs
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- Removed bors in favor of GitHub Merge Queue
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- `start_trap_rust` is now marked as `unsafe`

riscv/CHANGELOG.md

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@@ -20,7 +20,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Transitioning to cargo workspace
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- Cargo workspace for riscv and riscv-rt
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- Update `embedded-hal` dependency to v1.0 (bumps MSRV to 1.60)
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- `misa::MXL` renamed to `misa::XLEN`
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- Removed `bit_field` dependency

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