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riscv: add basic mvendorid unit tests
Adds basic unit tests for the `mvendorid` CSR.
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riscv/src/register/mvendorid.rs

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@@ -56,3 +56,45 @@ impl Mvendorid {
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})
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn test_mvendorid() {
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(0..u32::BITS)
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.map(|r| ((1u64 << r) - 1) as usize)
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.for_each(|raw| {
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let exp_bank = raw >> 7;
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let exp_offset = raw & (Mvendorid::CONTINUATION as usize);
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let exp_parity = ((1 - (exp_offset.count_ones() % 2)) << 7) as u8;
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let exp_mvendorid = Mvendorid::from_bits(raw);
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assert_eq!(exp_mvendorid.bank(), exp_bank);
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assert_eq!(exp_mvendorid.offset(), exp_offset);
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let mut jedec_iter = exp_mvendorid.jedec_manufacturer();
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(0..exp_bank)
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.for_each(|_| assert_eq!(jedec_iter.next(), Some(Mvendorid::CONTINUATION)));
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assert_eq!(jedec_iter.next(), Some(exp_parity | (exp_offset as u8)));
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assert_eq!(jedec_iter.next(), None);
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});
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// ISA example used as a concrete test vector.
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let exp_bank = 0xc;
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let exp_offset = 0x0a;
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let exp_decoded_offset = 0x8a;
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let raw_mvendorid = 0x60a;
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let exp_mvendorid = Mvendorid::from_bits(raw_mvendorid);
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assert_eq!(exp_mvendorid.bank(), exp_bank);
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assert_eq!(exp_mvendorid.offset(), exp_offset);
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let mut jedec_iter = exp_mvendorid.jedec_manufacturer();
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(0..exp_bank).for_each(|_| assert_eq!(jedec_iter.next(), Some(Mvendorid::CONTINUATION)));
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assert_eq!(jedec_iter.next(), Some(exp_decoded_offset));
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assert_eq!(jedec_iter.next(), None);
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}
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}

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