Skip to content

Commit 72d0527

Browse files
committed
riscv: impl composite write for mcycle, minstret
1 parent 87e4408 commit 72d0527

File tree

2 files changed

+2
-0
lines changed

2 files changed

+2
-0
lines changed

riscv/src/register/mcycle.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,3 +3,4 @@
33
read_csr_as_usize!(0xB00);
44
write_csr_as_usize!(0xB00);
55
read_composite_csr!(super::mcycleh::read(), read());
6+
write_composite_csr!(|bits| super::mcycleh::write(bits), |bits| write(bits));

riscv/src/register/minstret.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,3 +3,4 @@
33
read_csr_as_usize!(0xB02);
44
write_csr_as_usize!(0xB02);
55
read_composite_csr!(super::minstreth::read(), read());
6+
write_composite_csr!(|bits| super::minstreth::write(bits), |bits| write(bits));

0 commit comments

Comments
 (0)