rust-embedded
diff --git a/‎riscv-rt/asm.S
Lines changed: 3 additions & 0 deletions b/‎riscv-rt/asm.S
Lines changed: 3 additions & 0 deletions
diff --git a/‎riscv-rt/bin/riscv32i-unknown-none-elf.a
0 Bytes b/‎riscv-rt/bin/riscv32i-unknown-none-elf.a
0 Bytes
diff --git a/‎riscv-rt/bin/riscv32ic-unknown-none-elf.a
0 Bytes b/‎riscv-rt/bin/riscv32ic-unknown-none-elf.a
0 Bytes
diff --git a/‎riscv-rt/bin/riscv32im-unknown-none-elf.a
0 Bytes b/‎riscv-rt/bin/riscv32im-unknown-none-elf.a
0 Bytes
diff --git a/‎riscv-rt/bin/riscv32imc-unknown-none-elf.a
0 Bytes b/‎riscv-rt/bin/riscv32imc-unknown-none-elf.a
0 Bytes
diff --git a/‎riscv-rt/bin/riscv64i-unknown-none-elf.a
-72 Bytes b/‎riscv-rt/bin/riscv64i-unknown-none-elf.a
-72 Bytes
diff --git a/‎riscv-rt/bin/riscv64ic-unknown-none-elf.a
-72 Bytes b/‎riscv-rt/bin/riscv64ic-unknown-none-elf.a
-72 Bytes
diff --git a/‎riscv-rt/bin/riscv64im-unknown-none-elf.a
-72 Bytes b/‎riscv-rt/bin/riscv64im-unknown-none-elf.a
-72 Bytes
diff --git a/‎riscv-rt/bin/riscv64imc-unknown-none-elf.a
-72 Bytes b/‎riscv-rt/bin/riscv64imc-unknown-none-elf.a
-72 Bytes
@@ -30,13 +30,16 @@ _start:
 
     // for 64bit
     .if __riscv_xlen == 64
+.option push
+.option norelax // to prevent an unsupported R_RISCV_ALIGN relocation from being generated
 1:
     auipc ra, %pcrel_hi(1f)
     ld ra, %pcrel_lo(1b)(ra)
     jr ra
     .align  3
 1:
     .dword _abs_start
+.option pop
     .endif
 
 _abs_start: