Fix RISC-V name

https://riscv.org/risc-v-trademark-usage/

Author: Disasm

Cargo.toml

@@ -4,7 +4,7 @@ version = "0.3.0"
 repository = "https://github.com/rust-embedded/riscv"
 authors = ["David Craven <[email protected]>"]
 categories = ["embedded", "hardware-support", "no-std"]
-description = "Low level access to RISCV processors"
+description = "Low level access to RISC-V processors"
 keywords = ["riscv", "register", "peripheral"]
 license = "ISC"
 

src/lib.rs

@@ -1,4 +1,4 @@
-//! Low level access to RISCV processors
+//! Low level access to RISC-V processors
 //!
 //! This crate provides:
 //!

src/register/mod.rs

@@ -1,4 +1,4 @@
-//! RISCV CSR's
+//! RISC-V CSR's
 //!
 //! The following registers are not available on 64-bit implementations.
 //!