Fix formatting in riscv-peripheral

Author: romancardenas

riscv-peripheral/src/hal/aclint.rs

@@ -1,6 +1,6 @@
 //! Delay trait implementation for (A)CLINT peripherals
 
-use crate::aclint::mtimer::{Mtimer, MTIMER};
+use crate::aclint::mtimer::{MTIMER, Mtimer};
 use crate::hal::delay::DelayNs;
 
 impl<M: Mtimer> DelayNs for MTIMER<M> {

riscv-peripheral/src/plic/pendings.rs

@@ -1,6 +1,6 @@
 //! Interrupt pending bits register.
 
-use crate::common::{Reg, RO};
+use crate::common::{RO, Reg};
 use riscv_pac::ExternalInterruptNumber;
 
 /// Interrupts pending bits register.

riscv-peripheral/src/plic/priorities.rs

@@ -1,6 +1,6 @@
 //! Interrupts Priorities register.
 
-use crate::common::{Reg, RW};
+use crate::common::{RW, Reg};
 use riscv_pac::{ExternalInterruptNumber, PriorityNumber};
 
 /// Interrupts priorities register.