feat(09): Add initial BSP structure for Raspberry Pi 5

Introduces the Board Support Package for Tutorial 09 for the Raspberry Pi 5.

- Adds the 'bsp_rpi5' cargo feature
- creates the 'src/bsp/raspberrypi5' directory, including boilerplate files for cpu, driver, kernel.ld, and memory map.
- The memory map defines the base address for the RP1 I/O controller.

Author: devansh-lodha

09_privilege_level/Cargo.toml

@@ -11,6 +11,7 @@ lto = true
 default = []
 bsp_rpi3 = ["tock-registers"]
 bsp_rpi4 = ["tock-registers"]
+bsp_rpi5 = ["tock-registers"]
 
 [[bin]]
 name = "kernel"

09_privilege_level/src/bsp.rs

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 //
-// Copyright (c) 2018-2023 Andre Richter <[email protected]>
+// Copyright (c) 2018-2025 Andre Richter <[email protected]>
 
 //! Conditional reexporting of Board Support Packages.
 
@@ -11,3 +11,9 @@ mod raspberrypi;
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 pub use raspberrypi::*;
+
+#[cfg(feature = "bsp_rpi5")]
+mod raspberrypi5;
+
+#[cfg(feature = "bsp_rpi5")]
+pub use raspberrypi5::*;

09_privilege_level/src/bsp/raspberrypi5.rs

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2025 Andre Richter <[email protected]>
+// Copyright (c) 2025 Devansh Lodha <[email protected]>
+
+//! Top-level BSP file for the Raspberry Pi 5.
+
+pub mod cpu;
+pub mod driver;
+pub mod memory;
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Board identification.
+pub fn board_name() -> &'static str {
+    "Raspberry Pi 5"
+}

09_privilege_level/src/bsp/raspberrypi5/cpu.rs

@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2025 Andre Richter <[email protected]>
+
+//! BSP Processor code for the Raspberry Pi 5.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Used by `arch` code to find the early boot core.
+#[no_mangle]
+#[link_section = ".text._start_arguments"]
+pub static BOOT_CORE_ID: u64 = 0;

09_privilege_level/src/bsp/raspberrypi5/driver.rs

@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2025 Andre Richter <[email protected]>
+// Copyright (c) 2025 Devansh Lodha <[email protected]>
+
+//! BSP driver support for the Raspberry Pi 5.
+
+use super::memory::map::mmio;
+use crate::{bsp::device_driver, console, driver as generic_driver};
+use core::sync::atomic::{AtomicBool, Ordering};
+
+//--------------------------------------------------------------------------------------------------
+// Global instances
+//--------------------------------------------------------------------------------------------------
+
+static PL011_UART: device_driver::PL011Uart =
+    unsafe { device_driver::PL011Uart::new(mmio::PL011_UART_START) };
+
+static GPIO: device_driver::GPIO =
+    unsafe { device_driver::GPIO::new(mmio::GPIO_START, mmio::PADS_BANK0_START) };
+
+//--------------------------------------------------------------------------------------------------
+// Private Code
+//--------------------------------------------------------------------------------------------------
+
+/// This must be called only after successful init of the UART driver.
+fn post_init_uart() -> Result<(), &'static str> {
+    console::register_console(&PL011_UART);
+    Ok(())
+}
+
+/// This must be called only after successful init of the GPIO driver.
+fn post_init_gpio() -> Result<(), &'static str> {
+    GPIO.map_pl011_uart();
+    Ok(())
+}
+
+fn driver_uart() -> Result<(), &'static str> {
+    let uart_descriptor =
+        generic_driver::DeviceDriverDescriptor::new(&PL011_UART, Some(post_init_uart));
+    generic_driver::driver_manager().register_driver(uart_descriptor);
+    Ok(())
+}
+
+fn driver_gpio() -> Result<(), &'static str> {
+    let gpio_descriptor = generic_driver::DeviceDriverDescriptor::new(&GPIO, Some(post_init_gpio));
+    generic_driver::driver_manager().register_driver(gpio_descriptor);
+    Ok(())
+}
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Initialize the driver subsystem.
+///
+/// # Safety
+///
+/// See child function calls.
+pub unsafe fn init() -> Result<(), &'static str> {
+    static INIT_DONE: AtomicBool = AtomicBool::new(false);
+    if INIT_DONE.load(Ordering::Relaxed) {
+        return Err("Init already done");
+    }
+
+    // On the Raspberry Pi 5, GPIO pins must be configured for their peripheral
+    // function (e.g., UART) before the peripheral itself is initialized.
+    driver_gpio()?;
+    driver_uart()?;
+
+    INIT_DONE.store(true, Ordering::Relaxed);
+    Ok(())
+}

09_privilege_level/src/bsp/raspberrypi5/kernel.ld

@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2018-2025 Andre Richter <[email protected]>
+ */
+
+__rpi_phys_dram_start_addr = 0;
+
+/* The physical address at which the the kernel binary will be loaded by the Raspberry's firmware */
+__rpi_phys_binary_load_addr = 0x80000;
+
+
+ENTRY(__rpi_phys_binary_load_addr)
+
+/* Flags:
+ *     4 == R
+ *     5 == RX
+ *     6 == RW
+ *
+ * Segments are marked PT_LOAD below so that the ELF file provides virtual and physical addresses.
+ * It doesn't mean all of them need actually be loaded.
+ */
+PHDRS
+{
+    segment_boot_core_stack PT_LOAD FLAGS(6);
+    segment_code            PT_LOAD FLAGS(5);
+    segment_data            PT_LOAD FLAGS(6);
+}
+
+SECTIONS
+{
+    . =  __rpi_phys_dram_start_addr;
+
+    /***********************************************************************************************
+    * Boot Core Stack
+    ***********************************************************************************************/
+    .boot_core_stack (NOLOAD) :
+    {
+                                             /*   ^             */
+                                             /*   | stack       */
+        . += __rpi_phys_binary_load_addr;    /*   | growth      */
+                                             /*   | direction   */
+        __boot_core_stack_end_exclusive = .; /*   |             */
+    } :segment_boot_core_stack
+
+    /***********************************************************************************************
+    * Code + RO Data + Global Offset Table
+    ***********************************************************************************************/
+    .text :
+    {
+        KEEP(*(.text._start))
+        *(.text._start_arguments) /* Constants (or statics in Rust speak) read by _start(). */
+        *(.text._start_rust)      /* The Rust entry point */
+        *(.text*)                 /* Everything else */
+    } :segment_code
+
+    .rodata : ALIGN(8) { *(.rodata*) } :segment_code
+
+    /***********************************************************************************************
+    * Data + BSS
+    ***********************************************************************************************/
+    .data : { *(.data*) } :segment_data
+
+    /* Section is zeroed in pairs of u64. Align start and end to 16 bytes */
+    .bss (NOLOAD) : ALIGN(16)
+    {
+        __bss_start = .;
+        *(.bss*);
+        . = ALIGN(16);
+        __bss_end_exclusive = .;
+    } :segment_data
+
+    /***********************************************************************************************
+    * Misc
+    ***********************************************************************************************/
+    .got : { *(.got*) }
+    ASSERT(SIZEOF(.got) == 0, "Relocation support not expected")
+
+    /DISCARD/ : { *(.comment*) }
+}

09_privilege_level/src/bsp/raspberrypi5/memory.rs

@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2025 Andre Richter <[email protected]>
+// Copyright (c) 2025 Devansh Lodha <[email protected]>
+
+//! BSP Memory Management.
+
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// The board's physical memory map.
+#[rustfmt::skip]
+pub(super) mod map {
+    pub const RP1_PCI_ECAM_BASE: usize = 0x1f00000000;
+
+    /// Physical devices.
+    pub mod mmio {
+        use super::*;
+
+        // See `RP1 Peripherals` datasheet, table 5 and 22.
+        pub const GPIO_START:       usize = RP1_PCI_ECAM_BASE + 0xd0000;
+        pub const PADS_BANK0_START: usize = RP1_PCI_ECAM_BASE + 0xf0000;
+        pub const PL011_UART_START: usize = RP1_PCI_ECAM_BASE + 0x30000;
+    }
+}