Add support for delay transactions

Author: eldruin

CHANGELOG.md

@@ -4,6 +4,8 @@
 
 [Full Changelog](https://github.com/rust-embedded/rust-spidev/compare/0.5.1...HEAD)
 
+- Added support for delay transactions.
+
 ## 0.5.1 / 2021-11-22
 
 [Full Changelog](https://github.com/rust-embedded/rust-spidev/compare/0.5.0...0.5.1)

examples/spidev-bidir.rs

@@ -21,12 +21,14 @@ fn main() {
     println!("===== Multi Transfer =========");
     let mut rx_buf1 = [0; 10];
     let tx_buf2 = [0x00, 0x01, 0x02, 0x03];
+    let delay_usecs = 10;
     let tx_buf3 = [0xff, 0xfe, 0xfd];
     let mut rx_buf3 = [0; 3];
     let result = {
         let mut transfers = vec![
             SpidevTransfer::read(&mut rx_buf1),
             SpidevTransfer::write(&tx_buf2),
+            SpidevTransfer::delay(delay_usecs),
             SpidevTransfer::read_write(&tx_buf3, &mut rx_buf3),
         ];
         spidev.transfer_multiple(&mut transfers)
@@ -35,6 +37,7 @@ fn main() {
         Ok(_) => {
             println!("Read {:?}", rx_buf1);
             println!("Wrote {:?}", tx_buf2);
+            println!("Delayed by {} microseconds", delay_usecs);
             println!("Wrote {:?} and read {:?}", tx_buf3, rx_buf3);
         }
         Err(err) => println!("{:?}", err),

src/spidevioctl.rs

@@ -78,6 +78,7 @@ pub struct spi_ioc_transfer<'a, 'b> {
 }
 
 impl<'a, 'b> spi_ioc_transfer<'a, 'b> {
+    /// Create a read transfer
     pub fn read(buff: &'b mut [u8]) -> Self {
         spi_ioc_transfer {
             rx_buf: buff.as_ptr() as *const () as usize as u64,
@@ -86,6 +87,7 @@ impl<'a, 'b> spi_ioc_transfer<'a, 'b> {
         }
     }
 
+    /// Create a write transfer
     pub fn write(buff: &'a [u8]) -> Self {
         spi_ioc_transfer {
             tx_buf: buff.as_ptr() as *const () as usize as u64,
@@ -94,7 +96,8 @@ impl<'a, 'b> spi_ioc_transfer<'a, 'b> {
         }
     }
 
-    /// The `tx_buf` and `rx_buf` must be the same length.
+    /// Create a read/write transfer.
+    /// Note that the `tx_buf` and `rx_buf` must be the same length.
     pub fn read_write(tx_buf: &'a [u8], rx_buf: &'b mut [u8]) -> Self {
         assert_eq!(tx_buf.len(), rx_buf.len());
         spi_ioc_transfer {
@@ -104,6 +107,15 @@ impl<'a, 'b> spi_ioc_transfer<'a, 'b> {
             ..Default::default()
         }
     }
+
+    /// Create a delay transfer of a number of microseconds
+    pub fn delay(microseconds: u16) -> Self {
+        spi_ioc_transfer {
+            delay_usecs: microseconds,
+            len: 0,
+            ..Default::default()
+        }
+    }
 }
 
 mod ioctl {